Re: ✗ Xe.CI.Full: failure for drm/xe/pf: Access VF's register using dedicated MMIO view

[Michal Wajdeczko <michal.wajdeczko@intel.com>]

On 10/25/2025 11:46 AM, Patchwork wrote:
> *Patch Details*
> *Series:*	drm/xe/pf: Access VF's register using dedicated MMIO view
> *URL:*	https://patchwork.freedesktop.org/series/156516/ <https://patchwork.freedesktop.org/series/156516/>
> *State:*	failure
> *Details:*	https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156516v1/index.html <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156516v1/index.html>
> 
> 
>   CI Bug Log - changes from xe-3984-29a7e04b0cce50ab0bcd603c040d35682a643c78_FULL -> xe-pw-156516v1_FULL
> 
> 
>     Summary
> 
> *FAILURE*
> 
> Serious unknown changes coming with xe-pw-156516v1_FULL absolutely need to be
> verified manually.
> 
> If you think the reported changes have nothing to do with the changes
> introduced in xe-pw-156516v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives in CI.
> 
> 
>     Participating hosts (4 -> 4)
> 
> No changes in participating hosts
> 
> 
>     Possible new issues
> 
> Here are the unknown changes that may have been introduced in xe-pw-156516v1_FULL:
> 
> 
>       IGT changes
> 
> 
>         Possible regressions
> 
>   * igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_decode0:
>       o shard-adlp: PASS <https://intel-gfx-ci.01.org/tree/intel-xe/xe-3984-29a7e04b0cce50ab0bcd603c040d35682a643c78/shard-adlp-8/igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_decode0.html> -> FAIL <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156516v1/shard-adlp-4/igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_decode0.html> +5 other tests fail


(xe_pmu:5125) DEBUG: [0] Engine active ticks: after 0, before 0 delta 0
(xe_pmu:5125) DEBUG: [0] Engine total ticks: after 19250333, before 47827 delta 19202506
(xe_pmu:5125) CRITICAL: Test assertion failure function check_all_engines, file ../tests/intel/xe_pmu.c:258:
(xe_pmu:5125) CRITICAL: Failed assertion: (double)(engine_active_ticks) <= (1.0 + (tolerance)) * (double)(engine_total_ticks) && (double)(engine_active_ticks) >= (1.0 - (tolerance)) * (double)(engine_total_ticks)
(xe_pmu:5125) CRITICAL: 'engine_active_ticks' != 'engine_total_ticks' (0.000000 not within +10.0%/-10.0% tolerance of 19202506.000000)

doesn't look like related as change updates only existing small part of the VF FLR code (not related to the later execution of the VF/PF.