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From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
To: imre.deak@intel.com,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
	intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/display: Fix BMG CCS modifiers
Date: Fri, 30 Aug 2024 14:23:30 +0300	[thread overview]
Message-ID: <37e416a4-8250-4f38-9dbb-a543324738c8@gmail.com> (raw)
In-Reply-To: <ZtCQG4EOrYdUGDLX@ideak-desk.fi.intel.com>

On 29.8.2024 18.13, Imre Deak wrote:
> On Thu, Aug 29, 2024 at 04:36:52PM +0200, Maarten Lankhorst wrote:
>>
>>
>> Den 2024-08-29 kl. 16:29, skrev Rodrigo Vivi:
>>> On Thu, Aug 29, 2024 at 03:29:28PM +0300, Juha-Pekka Heikkila wrote:
>>>> Let I915_FORMAT_MOD_4_TILED_BMG_CCS show up as supported modifier
>>>>
>>>
>>> doh! I just did the pull-request with that... I guess this is one extra
>>> pull request next week or the first patch of -next-fixes :/
>>>
>>> Fixes: 97c6efb36497 ("drm/i915/display: Plane capability for 64k phys alignment")
>>>
>>>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>>>> ---
>>>>   drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++
>>>>   1 file changed, 3 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>>>> index 9452cad41d07..d28b98e7cbd7 100644
>>>> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
>>>> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>>>> @@ -2453,6 +2453,9 @@ static u8 skl_get_plane_caps(struct drm_i915_private *i915,
>>>>   	if (gen12_plane_has_mc_ccs(i915, plane_id))
>>>>   		caps |= INTEL_PLANE_CAP_CCS_MC;
>>>>   
>>>> +	if (GRAPHICS_VER(i915) >= 20 && IS_DGFX(i915))
>>>
>>> we should be using display version here, no?!
>>>
>>>> +		caps |= INTEL_PLANE_CAP_NEED64K_PHYS;
>>
>> Just set it unconditionally if you want to change it IMO, it's a
>> workaround not an actual capability, rest should filter...
> 
> I think it should be set only on platforms that actually require 64K
> pages. So IIUC simply
>     IS_BATTLEMAGE()
> or if it's known that future DGFX has this restriction too
>     IS_BATTLEMAGE() || (DISPLAY_VER() >= 20 && IS_DGFX())
> ? Then the BMG and LNL checks in plane_has_modifier() wouldn't be
> needed either.

This sound good idea for this case. It's bit of a trick to check with 
display versions we're on Xe2 which to me is synonym to gfx ver >= 20 
but I'll make v2 with this change. It is expected future dgfx will have 
same 64K requirement.

/Juha-Pekka

  reply	other threads:[~2024-08-30 11:23 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-29 12:29 [PATCH] drm/i915/display: Fix BMG CCS modifiers Juha-Pekka Heikkila
2024-08-29 12:31 ` ✓ CI.Patch_applied: success for " Patchwork
2024-08-29 12:31 ` ✓ CI.checkpatch: " Patchwork
2024-08-29 12:32 ` ✓ CI.KUnit: " Patchwork
2024-08-29 12:53 ` ✓ CI.Build: " Patchwork
2024-08-29 12:55 ` ✓ CI.Hooks: " Patchwork
2024-08-29 12:56 ` ✗ CI.checksparse: warning " Patchwork
2024-08-29 13:31 ` ✗ CI.BAT: failure " Patchwork
2024-08-29 13:48   ` Juha-Pekka Heikkila
2024-08-29 14:29 ` [PATCH] " Rodrigo Vivi
2024-08-29 14:35   ` Maarten Lankhorst
2024-08-29 14:36   ` Maarten Lankhorst
2024-08-29 15:13     ` Imre Deak
2024-08-30 11:23       ` Juha-Pekka Heikkila [this message]
2024-08-30  2:06 ` ✗ CI.FULL: failure for " Patchwork

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