From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: sowmiya.s@intel.com, uma.shankar@intel.com,
swati2.sharma@intel.com, chaitanya.kumar.borah@intel.com,
arun.r.murthy@intel.com, Suraj Kandpal <suraj.kandpal@intel.com>
Subject: Re: [PATCH v3 25/26] drm/i915/writeback: Make exception for writeback connector
Date: Tue, 07 Apr 2026 11:40:57 +0300 [thread overview]
Message-ID: <3b73497898b4ac266dbe49ff27cc2b31a89309f0@intel.com> (raw)
In-Reply-To: <20260325110744.1096786-26-suraj.kandpal@intel.com>
On Wed, 25 Mar 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Writeback connector is a special connector as it does not actually
> exist. This means a lot of checks and computations need to be skipped
> and exceptions need to be made when it comes to this connector.
> This commit contains all those changes for a writeback connector.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 115 ++++++++++++++----
> .../drm/i915/display/intel_display_debugfs.c | 3 +
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 3 +
> drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
> drivers/gpu/drm/i915/display/intel_pmdemand.c | 3 +
> drivers/gpu/drm/i915/display/intel_vdsc.c | 4 +
> .../gpu/drm/i915/display/intel_writeback.c | 5 +
> .../gpu/drm/i915/display/intel_writeback.h | 1 +
> 8 files changed, 110 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index b4cf7153b7c8..e47b4e667fec 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -127,6 +127,7 @@
> #include "intel_vrr.h"
> #include "intel_wm.h"
> #include "intel_writeback.h"
> +#include "intel_writeback_reg.h"
> #include "skl_scaler.h"
> #include "skl_universal_plane.h"
> #include "skl_watermark.h"
> @@ -1639,6 +1640,9 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
>
> intel_set_transcoder_timings(crtc_state);
>
> + if (intel_writeback_transcoder_is_wd(cpu_transcoder))
You'll probably want a function that takes intel_crtc_state rather than
enum transcoder.
Sprinkling these checks all over the place is a PITA.
> + return;
> +
> if (cpu_transcoder != TRANSCODER_EDP)
> intel_de_write(display, TRANS_MULT(display, cpu_transcoder),
> crtc_state->pixel_multiplier - 1);
> @@ -2687,6 +2691,10 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
> crtc_vblank_start = adjusted_mode->crtc_vblank_start;
> crtc_vblank_end = adjusted_mode->crtc_vblank_end;
>
> + if (intel_writeback_transcoder_is_wd(cpu_transcoder)) {
> + return;
> + }
> +
> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> /* the chip adds 2 halflines automatically */
> crtc_vtotal -= 1;
> @@ -2881,6 +2889,15 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc,
> struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> u32 tmp;
>
> + if (intel_writeback_transcoder_is_wd(cpu_transcoder)) {
> + tmp = intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder));
> + adjusted_mode->crtc_hdisplay = REG_FIELD_GET(HACTIVE_MASK, tmp) + 1;
> +
> + tmp = intel_de_read(display, TRANS_VTOTAL(display, cpu_transcoder));
> + adjusted_mode->crtc_vdisplay = REG_FIELD_GET(VACTIVE_MASK, tmp) + 1;
> + return;
> + }
> +
> tmp = intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder));
> adjusted_mode->crtc_hdisplay = REG_FIELD_GET(HACTIVE_MASK, tmp) + 1;
> adjusted_mode->crtc_htotal = REG_FIELD_GET(HTOTAL_MASK, tmp) + 1;
> @@ -3794,32 +3811,59 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
> u32 tmp = 0;
>
> power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> - with_intel_display_power_if_enabled(display, power_domain)
> - tmp = intel_de_read(display,
> - TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
> + if (cpu_transcoder == TRANSCODER_WD_0 ||
> + cpu_transcoder == TRANSCODER_WD_1) {
> + with_intel_display_power_if_enabled(display, power_domain)
> + tmp = intel_de_read(display,
> + WD_TRANS_FUNC_CTL(cpu_transcoder));
> + if (!(tmp & TRANS_WD_FUNC_ENABLE))
> + continue;
>
> - if (!(tmp & TRANS_DDI_FUNC_ENABLE))
> - continue;
> + switch (tmp & WD_INPUT_SELECT_MASK) {
> + case WD_INPUT_PIPE_A:
> + trans_pipe = PIPE_A;
> + break;
> + case WD_INPUT_PIPE_B:
> + trans_pipe = PIPE_B;
> + break;
> + case WD_INPUT_PIPE_C:
> + trans_pipe = PIPE_C;
> + break;
> + case WD_INPUT_PIPE_D:
> + trans_pipe = PIPE_D;
> + break;
> + default:
> + MISSING_CASE(tmp & WD_INPUT_SELECT_MASK);
> + break;
> + }
> + } else {
> + with_intel_display_power_if_enabled(display, power_domain)
> + tmp = intel_de_read(display,
> + TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
>
> - switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> - default:
> - drm_WARN(display->drm, 1,
> - "unknown pipe linked to transcoder %s\n",
> - transcoder_name(cpu_transcoder));
> - fallthrough;
> - case TRANS_DDI_EDP_INPUT_A_ONOFF:
> - case TRANS_DDI_EDP_INPUT_A_ON:
> - trans_pipe = PIPE_A;
> - break;
> - case TRANS_DDI_EDP_INPUT_B_ONOFF:
> - trans_pipe = PIPE_B;
> - break;
> - case TRANS_DDI_EDP_INPUT_C_ONOFF:
> - trans_pipe = PIPE_C;
> - break;
> - case TRANS_DDI_EDP_INPUT_D_ONOFF:
> - trans_pipe = PIPE_D;
> - break;
> + if (!(tmp & TRANS_DDI_FUNC_ENABLE))
> + continue;
> +
> + switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> + default:
> + drm_WARN(display->drm, 1,
> + "unknown pipe linked to transcoder %s\n",
> + transcoder_name(cpu_transcoder));
> + fallthrough;
> + case TRANS_DDI_EDP_INPUT_A_ONOFF:
> + case TRANS_DDI_EDP_INPUT_A_ON:
> + trans_pipe = PIPE_A;
> + break;
> + case TRANS_DDI_EDP_INPUT_B_ONOFF:
> + trans_pipe = PIPE_B;
> + break;
> + case TRANS_DDI_EDP_INPUT_C_ONOFF:
> + trans_pipe = PIPE_C;
> + break;
> + case TRANS_DDI_EDP_INPUT_D_ONOFF:
> + trans_pipe = PIPE_D;
> + break;
> + }
The above needs better abstractions first before just turning it into an
if-else.
> }
>
> if (trans_pipe == crtc->pipe)
> @@ -3908,6 +3952,13 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> pipe_config->pch_pfit.force_thru = true;
> }
>
> + if (intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder)) {
> + tmp = intel_de_read(display,
> + TRANSCONF_WD(pipe_config->cpu_transcoder));
> +
> + return tmp & WD_TRANS_ENABLE;
> + }
> +
> tmp = intel_de_read(display,
> TRANSCONF(display, pipe_config->cpu_transcoder));
>
> @@ -4017,7 +4068,8 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> DISPLAY_VER(display) >= 11)
> intel_get_transcoder_timings(crtc, pipe_config);
>
> - if (transcoder_has_vrr(pipe_config))
> + if (!intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder) &&
> + transcoder_has_vrr(pipe_config))
> intel_vrr_get_config(pipe_config);
>
> intel_get_pipe_src_size(crtc, pipe_config);
> @@ -4030,6 +4082,8 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_YCBCR444;
> else
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> + } else if (intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder)) {
> + pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> } else {
> pipe_config->output_format =
> bdw_get_pipe_misc_output_format(crtc);
> @@ -4056,6 +4110,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> hsw_ips_get_config(pipe_config);
>
> if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
> + !intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder) &&
> !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
> pipe_config->pixel_multiplier =
> intel_de_read(display,
> @@ -4064,6 +4119,16 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->pixel_multiplier = 1;
> }
>
> + if (!intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder) &&
> + !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
> + tmp = intel_de_read(display, CHICKEN_TRANS(display, pipe_config->cpu_transcoder));
> +
> + pipe_config->framestart_delay = REG_FIELD_GET(HSW_FRAME_START_DELAY_MASK, tmp) + 1;
> + } else {
> + /* no idea if this is correct */
> + pipe_config->framestart_delay = 1;
> + }
> +
> out:
> intel_display_power_put_all_in_set(display, &crtc->hw_readout_power_domains);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 2614c4863c87..350de3b3589d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -202,6 +202,9 @@ static void intel_panel_info(struct seq_file *m,
> {
> const struct drm_display_mode *fixed_mode;
>
> + if (connector->base.connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
> + return;
> +
Why wouldn't the fixed modes list be empty for writeback?
> if (list_empty(&connector->panel.fixed_modes))
> return;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index f5d4f7146fbc..4e3b655dc025 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4830,6 +4830,9 @@ int intel_dpll_compute(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(state);
> const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
>
> + if (encoder->type == INTEL_OUTPUT_WRITEBACK)
> + return 0;
> +
> if (drm_WARN_ON(display->drm, !dpll_mgr))
> return -EINVAL;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
> index e25be56e678b..fe01b283f783 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.c
> @@ -397,7 +397,7 @@ int intel_opregion_notify_encoder(struct intel_encoder *encoder,
> int ret;
>
> /* don't care about old stuff for now */
> - if (!HAS_DDI(display))
> + if (!HAS_DDI(display) || encoder->type == INTEL_OUTPUT_WRITEBACK)
These get really really really tedious and error prone.
> return 0;
>
> /* Avoid port out of bounds checks if SWSCI isn't there. */
> diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
> index 244806a26da3..e7b6e6d1ba63 100644
> --- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
> +++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
> @@ -158,6 +158,9 @@ intel_pmdemand_update_phys_mask(struct intel_display *display,
> if (!encoder)
> return;
>
> + if (encoder->type == INTEL_OUTPUT_WRITEBACK)
> + return;
> +
> if (intel_encoder_is_tc(encoder))
> return;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 6c09c6d99ffe..08594afdedd9 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -20,6 +20,7 @@
> #include "intel_qp_tables.h"
> #include "intel_vdsc.h"
> #include "intel_vdsc_regs.h"
> +#include "intel_writeback.h"
>
> bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
> {
> @@ -1081,6 +1082,9 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
> if (!intel_dsc_source_support(crtc_state))
> return;
>
> + if (intel_writeback_transcoder_is_wd(cpu_transcoder))
> + return;
> +
> power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);
>
> wakeref = intel_display_power_get_if_enabled(display, power_domain);
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 870fbfdddef5..52c2d8b91aff 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -53,6 +53,11 @@ static const u32 writeback_formats[] = {
> DRM_FORMAT_XBGR2101010,
> };
>
> +bool intel_writeback_transcoder_is_wd(enum transcoder transcoder)
> +{
> + return transcoder == TRANSCODER_WD_0 || transcoder == TRANSCODER_WD_1;
> +}
> +
> static struct intel_writeback_connector
> *conn_to_intel_writeback_connector(struct intel_connector *connector)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
> index 83a986753c4c..3a99a6526841 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.h
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.h
> @@ -17,6 +17,7 @@ struct intel_writeback_connector;
> int intel_writeback_init(struct intel_display *display);
> void intel_writeback_atomic_commit(struct intel_atomic_state *state);
> void intel_writeback_isr_handler(struct intel_display *display);
> +bool intel_writeback_transcoder_is_wd(enum transcoder transcoder);
>
> #endif /* __INTEL_WRITEBACK_H__ */
--
Jani Nikula, Intel
next prev parent reply other threads:[~2026-04-07 8:41 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 DO NOT REVIEW 01/26] drm: writeback: rename drm_writeback_connector_init_with_encoder() Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 DO NOT REVIEW 02/26] drm: writeback: Refactor drm_writeback_connector structure Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 03/26] drm/i915/writeback: Add writeback registers Suraj Kandpal
2026-03-25 11:42 ` Ville Syrjälä
2026-03-26 2:31 ` Kandpal, Suraj
2026-03-31 7:12 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions Suraj Kandpal
2026-03-25 11:52 ` Ville Syrjälä
2026-03-26 2:37 ` Kandpal, Suraj
2026-03-31 7:13 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 05/26] drm/i915/writeback: Init writeback connector Suraj Kandpal
2026-03-25 12:15 ` Ville Syrjälä
2026-03-26 2:52 ` Kandpal, Suraj
2026-03-31 7:13 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 06/26] drm/i915/writeback: Add function to get modes Suraj Kandpal
2026-03-31 7:14 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 07/26] drm/i915/writeback: Add hook to check modes Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 08/26] drm/i915/writeback: Define encoder->get_hw_state Suraj Kandpal
2026-03-25 12:08 ` Ville Syrjälä
2026-03-31 7:15 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config Suraj Kandpal
2026-03-25 12:15 ` Ville Syrjälä
2026-03-26 2:52 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job Suraj Kandpal
2026-03-25 12:17 ` Ville Syrjälä
2026-03-26 2:53 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 11/26] drm/i915/writeback: Define function for prepare and cleanup hooks Suraj Kandpal
2026-03-25 12:29 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback Suraj Kandpal
2026-03-25 12:19 ` Ville Syrjälä
2026-03-26 3:38 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 13/26] drm/i915/writeback: Define function for connector function detect Suraj Kandpal
2026-03-25 12:22 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector Suraj Kandpal
2026-03-25 12:23 ` Ville Syrjälä
2026-03-26 3:39 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check Suraj Kandpal
2026-03-25 12:25 ` Ville Syrjälä
2026-03-26 3:43 ` Kandpal, Suraj
2026-03-31 7:16 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile Suraj Kandpal
2026-03-25 12:25 ` Ville Syrjälä
2026-03-26 3:44 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 17/26] drm/i915/writeback: Add the enable sequence from writeback Suraj Kandpal
2026-03-25 12:31 ` Ville Syrjälä
2026-03-31 7:16 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function Suraj Kandpal
2026-03-25 12:33 ` Ville Syrjälä
2026-03-26 3:47 ` Kandpal, Suraj
2026-04-07 8:28 ` Jani Nikula
2026-04-08 3:02 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 19/26] drm/{i915/xe}/writeback: Add a writeback helper to get ggtt address Suraj Kandpal
2026-03-31 7:25 ` Borah, Chaitanya Kumar
2026-04-07 8:32 ` Jani Nikula
2026-04-08 3:24 ` Kandpal, Suraj
2026-04-08 4:11 ` Kandpal, Suraj
2026-03-25 11:07 ` [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg Suraj Kandpal
2026-03-25 12:35 ` Ville Syrjälä
2026-03-26 3:52 ` Kandpal, Suraj
2026-03-31 7:17 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 21/26] drm/i915/writeback: Configure WD_SURF register Suraj Kandpal
2026-03-31 7:17 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 22/26] drm/i915/writeback: Enable writeback interrupts Suraj Kandpal
2026-03-25 12:59 ` Ville Syrjälä
2026-03-31 7:19 ` Borah, Chaitanya Kumar
2026-04-07 8:36 ` Jani Nikula
2026-03-25 11:07 ` [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder Suraj Kandpal
2026-03-25 13:00 ` Ville Syrjälä
2026-03-26 4:01 ` Kandpal, Suraj
2026-03-31 7:23 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 24/26] drm/i915/writeback: Define the disable sequence for writeback Suraj Kandpal
2026-03-31 7:20 ` Borah, Chaitanya Kumar
2026-03-25 11:07 ` [PATCH v3 25/26] drm/i915/writeback: Make exception for writeback connector Suraj Kandpal
2026-03-31 7:20 ` Borah, Chaitanya Kumar
2026-04-07 8:40 ` Jani Nikula [this message]
2026-03-25 11:07 ` [PATCH v3 26/26] drm/i915/writeback: Modify state verify function Suraj Kandpal
2026-03-25 13:01 ` Ville Syrjälä
2026-03-26 3:57 ` Kandpal, Suraj
2026-03-25 11:19 ` ✗ CI.checkpatch: warning for Enable Pipe writeback (rev3) Patchwork
2026-03-25 11:20 ` ✓ CI.KUnit: success " Patchwork
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