Re: [PATCH 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror

[Jani Nikula <jani.nikula@linux.intel.com>]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add defines for the end of the MCHBAR mirror. I'm planning to
> use this for some range sanity checks.
>
> BSpec: 51771
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_mchbar_regs.h | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_mchbar_regs.h b/drivers/gpu/drm/i915/intel_mchbar_regs.h
> index 614d4017b57b..ca0d421be16c 100644
> --- a/drivers/gpu/drm/i915/intel_mchbar_regs.h
> +++ b/drivers/gpu/drm/i915/intel_mchbar_regs.h
> @@ -16,11 +16,16 @@
>   * every way.  It is not accessible from the CP register read instructions.
>   *
>   * Starting from Haswell, you can't write registers using the MCHBAR mirror,
> - * just read.
> + * just read. On MTL+ the mirror no longer exists.
>   */
>  
>  #define MCHBAR_MIRROR_BASE			0x10000
> +#define MCHBAR_MIRROR_END			0x13fff
> +
>  #define MCHBAR_MIRROR_BASE_SNB			0x140000
> +#define MCHBAR_MIRROR_END_SNB			0x147fff
> +#define MCHBAR_MIRROR_END_ICL_RKL		0x14ffff
> +#define MCHBAR_MIRROR_END_TGL			0x15ffff
>  
>  #define CTG_STOLEN_RESERVED			_MMIO(MCHBAR_MIRROR_BASE + 0x34)
>  #define ELK_STOLEN_RESERVED			_MMIO(MCHBAR_MIRROR_BASE + 0x48)

-- 
Jani Nikula, Intel