Re: [PATCH v2] drm/xe/hwmon: Read accepted power limit for CRI

["Nilawar, Badal" <badal.nilawar@intel.com>]

On 23-03-2026 17:28, Karthik Poosa wrote:
> Update xe_hwmon_pcode_read_power_limit() and
> xe_hwmon_pcode_rmw_power_limit() to read the accepted power limit for
> discrete platforms post CRI.
>
> For platforms before CRI only the last written pcode value was available.
>  From CRI onwards, pcode exposes a new param2 value 2 that allows reading
> the accepted power limit by the hardware.
>
> v2:
>   - Read resolved power limit in xe_hwmon_pcode_rmw_power_limit()
>     as well. (Badal)
>   - Rephrase commit message. (Badal)
>   - Add prepare_power_limit_param2() to prepare param2 for mailbox power
>     limit read.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_hwmon.c     | 21 ++++++++++++++-------
>   drivers/gpu/drm/xe/xe_pcode_api.h |  3 ++-
>   2 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 0fd4d4f1014a..0f92aa3fe8e8 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -180,6 +180,18 @@ struct xe_hwmon {
>   	struct xe_hwmon_thermal_info temp;
>   };
>   
> +static inline int prepare_power_limit_param2(const struct xe_hwmon *hwmon)
> +{
> +	if (hwmon->boot_power_limit_read) {
> +		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
> +			return READ_PL_ACCEPTED;
> +		else
> +			return READ_PL_FROM_PCODE;
> +	} else {
> +		return READ_PL_FROM_FW;
> +	}
> +}
> +
>   static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,
>   					   u32 *uval)
>   {
> @@ -191,9 +203,7 @@ static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 att
>   						  (channel == CHANNEL_CARD) ?
>   						  READ_PSYSGPU_POWER_LIMIT :
>   						  READ_PACKAGE_POWER_LIMIT,
> -						  hwmon->boot_power_limit_read ?
> -						  READ_PL_FROM_PCODE : READ_PL_FROM_FW),
> -						  &val0, &val1);
> +						  prepare_power_limit_param2(hwmon)), &val0, &val1);
>   
>   	if (ret) {
>   		drm_dbg(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
> @@ -226,10 +236,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
>   						  (channel == CHANNEL_CARD) ?
>   						  READ_PSYSGPU_POWER_LIMIT :
>   						  READ_PACKAGE_POWER_LIMIT,
> -						  hwmon->boot_power_limit_read ?
> -						  READ_PL_FROM_PCODE : READ_PL_FROM_FW),
> -						  &val0, &val1);
> -
> +						  prepare_power_limit_param2(hwmon)), &val0, &val1);
>   	if (ret)
>   		drm_dbg(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
>   			channel, val0, val1, ret);
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 85cc7478b787..d762226a9987 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -47,8 +47,9 @@
>   #define	WRITE_PSYSGPU_POWER_LIMIT		0x7
>   #define	READ_PACKAGE_POWER_LIMIT		0x8
>   #define	WRITE_PACKAGE_POWER_LIMIT		0x9
> -#define	READ_PL_FROM_FW				0x1
>   #define	READ_PL_FROM_PCODE			0x0
> +#define	READ_PL_FROM_FW				0x1
> +#define	READ_PL_ACCEPTED			0x2
>   
>   #define   PCODE_THERMAL_INFO			0x25
>   #define     READ_THERMAL_LIMITS			0x0

LGTM.
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>

Thanks,
Badal