Re: [PATCH v2 3/4] drm/xe/hw_error: Allow debugging hardware errors

["Tauro, Riana" <riana.tauro@intel.com>]

On 4/2/2026 11:12 PM, Raag Jadav wrote:
> Hardware errors are reported through System Controller on the platforms
> that support it, and never routed as direct IRQ to SGUnit other than
> debug cases. Wedge the device on XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET
> so that the hardware errors are available to the user for debugging.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
> v2: Explain the usecase (Matt Roper)
> ---
>   drivers/gpu/drm/xe/xe_hw_error.c | 24 ++++++++++++++++++++----
>   1 file changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index c7b720ba5a4f..79a85925a02f 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -169,11 +169,14 @@ static void hw_error_work(struct work_struct *work)
>   {
>   	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
>   	struct xe_device *xe = tile_to_xe(tile);
> -	int ret;
> +	bool wedge = xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET;
>   
> -	ret = xe_survivability_mode_runtime_enable(xe);
> -	if (ret)
> -		drm_err(&xe->drm, "Failed to enable runtime survivability mode\n");
> +	if (wedge) {

A fault_inject_csc_hw_error check should also be added here.
There could be a condition where fault injection is enabled along with 
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET. Thanks Riana
> +		xe_device_declare_wedged(xe);
> +		return;
> +	}
> +
> +	xe_survivability_mode_runtime_enable(xe);
>   }
>   
>   static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err)
> @@ -433,6 +436,19 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>   	if (!IS_DGFX(xe))
>   		return;
>   
> +	if (xe->info.has_sysctrl) {
> +		/*
> +		 * Hardware errors are reported through System Controller on the platforms that
> +		 * support it, so we should never be here other than debug cases. Retain the
> +		 * hardware state and bail without clearing error registers, so that they are
> +		 * available to the user for debugging.
> +		 */
> +		drm_err_ratelimited(&xe->drm, HW_ERR "Tile%d reported %s error\n",
> +				    tile->id, severity_str);
> +		schedule_work(&tile->hw_error_work);
> +		return;
> +	}
> +
>   	spin_lock_irqsave(&xe->irq.lock, flags);
>   	err_src = xe_mmio_read32(&tile->mmio, DEV_ERR_STAT_REG(hw_err));
>   	if (!err_src) {