Re: [PATCH 3/5] drm/xe/ras: Add flag for Xe RAS

Tauro, Riana
2026-04-06T05:26:13Z

On 4/1/2026 1:23 PM, Raag Jadav wrote:
> On Fri, Mar 20, 2026 at 03:55:58PM +0530, Riana Tauro wrote:
>> Add a flag for RAS. If enabled, XE driver registers with
>> DRM RAS and exposes supported counters.
>>
>> Currently this is enabled for PVC and CRI.
> This looks like it should be the last patch in the series.

yeah no other usage. I can move it to the end

Thanks
Riana

>
> Raag
>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_device_types.h | 2 ++
>> drivers/gpu/drm/xe/xe_hw_error.c | 2 +-
>> drivers/gpu/drm/xe/xe_pci.c | 3 +++
>> drivers/gpu/drm/xe/xe_pci_types.h | 1 +
>> 4 files changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>> index 150c76b2acaf..bfb23d6c0511 100644
>> --- a/drivers/gpu/drm/xe/xe_device_types.h
>> +++ b/drivers/gpu/drm/xe/xe_device_types.h
>> @@ -191,6 +191,8 @@ struct xe_device {
>> u8 has_ctx_tlb_inval:1;
>> /** @info.has_range_tlb_inval: Has range based TLB invalidations */
>> u8 has_range_tlb_inval:1;
>> + /** @info.has_ras: Device supports RAS (Reliability, Availability, Serviceability) */
>> + u8 has_ras:1;
>> /** @info.has_soc_remapper_sysctrl: Has SoC remapper system controller */
>> u8 has_soc_remapper_sysctrl:1;
>> /** @info.has_soc_remapper_telem: Has SoC remapper telemetry support */
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>> index 2a31b430570e..3ab0fceb151f 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>> @@ -520,7 +520,7 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
>>
>> static int hw_error_info_init(struct xe_device *xe)
>> {
>> - if (xe->info.platform != XE_PVC)
>> + if (!xe->info.has_ras)
>> return 0;
>>
>> return xe_drm_ras_init(xe);
>> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>> index f5dd77b6680f..e44003b5aee3 100644
>> --- a/drivers/gpu/drm/xe/xe_pci.c
>> +++ b/drivers/gpu/drm/xe/xe_pci.c
>> @@ -364,6 +364,7 @@ static const __maybe_unused struct xe_device_desc pvc_desc = {
>> .vm_max_level = 4,
>> .vram_flags = XE_VRAM_FLAGS_NEED64K,
>> .has_mbx_power_limits = false,
>> + .has_ras = true,
>> };
>>
>> static const struct xe_device_desc mtl_desc = {
>> @@ -471,6 +472,7 @@ static const struct xe_device_desc cri_desc = {
>> .require_force_probe = true,
>> .va_bits = 57,
>> .vm_max_level = 4,
>> + .has_ras = true,
>> };
>>
>> static const struct xe_device_desc nvlp_desc = {
>> @@ -761,6 +763,7 @@ static int xe_info_init_early(struct xe_device *xe,
>> xe->info.has_page_reclaim_hw_assist = desc->has_page_reclaim_hw_assist;
>> xe->info.has_pre_prod_wa = desc->has_pre_prod_wa;
>> xe->info.has_pxp = desc->has_pxp;
>> + xe->info.has_ras = desc->has_ras;
>> xe->info.has_soc_remapper_sysctrl = desc->has_soc_remapper_sysctrl;
>> xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
>> xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
>> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
>> index 08386c5eca27..cb7d79f51753 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_types.h
>> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
>> @@ -54,6 +54,7 @@ struct xe_device_desc {
>> u8 has_pre_prod_wa:1;
>> u8 has_page_reclaim_hw_assist:1;
>> u8 has_pxp:1;
>> + u8 has_ras:1;
>> u8 has_soc_remapper_sysctrl:1;
>> u8 has_soc_remapper_telem:1;
>> u8 has_sriov:1;
>> --
>> 2.47.1
>>