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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit On 14-06-2025 13:32, Gupta, Anshuman wrote: > >> -----Original Message----- >> From: Nilawar, Badal >> Sent: Friday, June 6, 2025 11:27 PM >> To:intel-xe@lists.freedesktop.org;dri-devel@lists.freedesktop.org >> Cc: Gupta, Anshuman; Vivi, Rodrigo >> ; Usyskin, Alexander; >> gregkh@linuxfoundation.org; Ceraolo Spurio, Daniele >> ;jgg@nvidia.com >> Subject: [PATCH v2 02/10] mei: late_bind: add late binding component driver >> >> From: Alexander Usyskin >> >> Add late binding component driver. >> It allows pushing the late binding configuration from, for example, the Xe >> graphics driver to the Intel discrete graphics card's CSE device. >> >> Signed-off-by: Alexander Usyskin >> Signed-off-by: Badal Nilawar >> --- >> v2: >> - Use generic naming (Jani) >> - Drop xe_late_bind_component struct to move to xe code (Daniele/Sasha) >> --- >> drivers/misc/mei/Kconfig | 1 + >> drivers/misc/mei/Makefile | 1 + >> drivers/misc/mei/late_bind/Kconfig | 12 + >> drivers/misc/mei/late_bind/Makefile | 9 + >> drivers/misc/mei/late_bind/mei_late_bind.c | 261 ++++++++++++++++++++ >> include/drm/intel/i915_component.h | 1 + >> include/drm/intel/late_bind_mei_interface.h | 37 +++ >> 7 files changed, 322 insertions(+) >> create mode 100644 drivers/misc/mei/late_bind/Kconfig >> create mode 100644 drivers/misc/mei/late_bind/Makefile >> create mode 100644 drivers/misc/mei/late_bind/mei_late_bind.c >> create mode 100644 include/drm/intel/late_bind_mei_interface.h >> >> diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig index >> 7575fee96cc6..771becc68095 100644 >> --- a/drivers/misc/mei/Kconfig >> +++ b/drivers/misc/mei/Kconfig >> @@ -84,5 +84,6 @@ config INTEL_MEI_VSC >> source "drivers/misc/mei/hdcp/Kconfig" >> source "drivers/misc/mei/pxp/Kconfig" >> source "drivers/misc/mei/gsc_proxy/Kconfig" >> +source "drivers/misc/mei/late_bind/Kconfig" >> >> endif >> diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile index >> 6f9fdbf1a495..84bfde888d81 100644 >> --- a/drivers/misc/mei/Makefile >> +++ b/drivers/misc/mei/Makefile >> @@ -31,6 +31,7 @@ CFLAGS_mei-trace.o = -I$(src) >> obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/ >> obj-$(CONFIG_INTEL_MEI_PXP) += pxp/ >> obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/ >> +obj-$(CONFIG_INTEL_MEI_LATE_BIND) += late_bind/ >> >> obj-$(CONFIG_INTEL_MEI_VSC_HW) += mei-vsc-hw.o mei-vsc-hw-y := vsc- >> tp.o diff --git a/drivers/misc/mei/late_bind/Kconfig >> b/drivers/misc/mei/late_bind/Kconfig >> new file mode 100644 >> index 000000000000..c5302303e5af >> --- /dev/null >> +++ b/drivers/misc/mei/late_bind/Kconfig >> @@ -0,0 +1,12 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +# Copyright (c) 2025, Intel Corporation. All rights reserved. >> +# >> +config INTEL_MEI_LATE_BIND >> + tristate "Intel late binding support on ME Interface" >> + select INTEL_MEI_ME >> + depends on DRM_XE >> + help >> + MEI Support for Late Binding for Intel graphics card. >> + >> + Enables the ME FW interfaces for Late Binding for >> + Xe display driver of Intel. > It is needed even for headless cards as well. Will change the description. >> diff --git a/drivers/misc/mei/late_bind/Makefile >> b/drivers/misc/mei/late_bind/Makefile >> new file mode 100644 >> index 000000000000..a0aeda5853f0 >> --- /dev/null >> +++ b/drivers/misc/mei/late_bind/Makefile >> @@ -0,0 +1,9 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +# >> +# Copyright (c) 2025, Intel Corporation. All rights reserved. >> +# >> +# Makefile - Late Binding client driver for Intel MEI Bus Driver. >> + >> +subdir-ccflags-y += -I$(srctree)/drivers/misc/mei/ >> + >> +obj-$(CONFIG_INTEL_MEI_LATE_BIND) += mei_late_bind.o >> diff --git a/drivers/misc/mei/late_bind/mei_late_bind.c >> b/drivers/misc/mei/late_bind/mei_late_bind.c >> new file mode 100644 >> index 000000000000..964757a9b33a >> --- /dev/null >> +++ b/drivers/misc/mei/late_bind/mei_late_bind.c >> @@ -0,0 +1,261 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Copyright (C) 2025 Intel Corporation */ #include >> + #include #include > Why do we need drm_connector header ? > Remove unnecessary headers. Sure >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include "mkhi.h" >> + >> +#define GFX_SRV_MKHI_LATE_BINDING_CMD 0x12 #define > Why it is not prefixed with DGFX. This is unique to DGFX cards ? > @alexander any comment on above ? >> +GFX_SRV_MKHI_LATE_BINDING_RSP (GFX_SRV_MKHI_LATE_BINDING_CMD >> | 0x80) >> + >> +#define LATE_BIND_SEND_TIMEOUT_MSEC 3000 #define >> +LATE_BIND_RECV_TIMEOUT_MSEC 3000 > From where we got these delay numbers, from any specs or it is arbitrary delay specific to let bind ? > Add a code comment in that case. >> + >> +/** >> + * struct csc_heci_late_bind_req - late binding request >> + * @header: @ref mkhi_msg_hdr >> + * @type: type of the late binding payload >> + * @flags: flags to be passed to the firmware >> + * @reserved: reserved field >> + * @payload_size: size of the payload data in bytes >> + * @payload: data to be sent to the firmware */ struct >> +csc_heci_late_bind_req { >> + struct mkhi_msg_hdr header; >> + u32 type; >> + u32 flags; >> + u32 reserved[2]; >> + u32 payload_size; >> + u8 payload[] __counted_by(payload_size); } __packed; >> + >> +/** >> + * struct csc_heci_late_bind_rsp - late binding response >> + * @header: @ref mkhi_msg_hdr >> + * @type: type of the late binding payload >> + * @reserved: reserved field >> + * @status: status of the late binding command execution by firmware >> +*/ struct csc_heci_late_bind_rsp { >> + struct mkhi_msg_hdr header; >> + u32 type; >> + u32 reserved[2]; >> + u32 status; >> +} __packed; >> + >> +static int mei_late_bind_check_response(const struct device *dev, const >> +struct mkhi_msg_hdr *hdr) { >> + if (hdr->group_id != MKHI_GROUP_ID_GFX) { >> + dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n", >> + hdr->group_id, MKHI_GROUP_ID_GFX); >> + return -EINVAL; >> + } >> + >> + if (hdr->command != GFX_SRV_MKHI_LATE_BINDING_RSP) { >> + dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n", >> + hdr->command, >> GFX_SRV_MKHI_LATE_BINDING_RSP); >> + return -EINVAL; >> + } >> + >> + return 0; >> +} >> + >> +/** >> + * mei_late_bind_push_config - Sends a config to the firmware. >> + * @dev: device struct corresponding to the mei device >> + * @type: payload type >> + * @flags: payload flags >> + * @payload: payload buffer >> + * @payload_size: payload buffer size >> + * >> + * Return: 0 success, negative errno value on transport failure, >> + * positive status returned by FW >> + */ >> +static int mei_late_bind_push_config(struct device *dev, u32 type, u32 flags, >> + const void *payload, size_t payload_size) { >> + struct mei_cl_device *cldev; >> + struct csc_heci_late_bind_req *req = NULL; >> + struct csc_heci_late_bind_rsp rsp; >> + size_t req_size; >> + int ret; >> + >> + if (!dev || !payload || !payload_size) >> + return -EINVAL; >> + >> + cldev = to_mei_cl_device(dev); >> + >> + ret = mei_cldev_enable(cldev); >> + if (ret < 0) { >> + dev_dbg(dev, "mei_cldev_enable failed. %d\n", ret); >> + return ret; >> + } >> + >> + req_size = struct_size(req, payload, payload_size); >> + if (req_size > mei_cldev_mtu(cldev)) { >> + dev_err(dev, "Payload is too big %zu\n", payload_size); >> + ret = -EMSGSIZE; >> + goto end; >> + } >> + >> + req = kmalloc(req_size, GFP_KERNEL); >> + if (!req) { >> + ret = -ENOMEM; >> + goto end; >> + } >> + >> + req->header.group_id = MKHI_GROUP_ID_GFX; >> + req->header.command = GFX_SRV_MKHI_LATE_BINDING_CMD; >> + req->type = type; >> + req->flags = flags; >> + req->reserved[0] = 0; >> + req->reserved[1] = 0; >> + req->payload_size = payload_size; >> + memcpy(req->payload, payload, payload_size); >> + >> + ret = mei_cldev_send_timeout(cldev, (void *)req, req_size, >> LATE_BIND_SEND_TIMEOUT_MSEC); >> + if (ret < 0) { >> + dev_err(dev, "mei_cldev_send failed. %d\n", ret); >> + goto end; >> + } >> + ret = mei_cldev_recv_timeout(cldev, (void *)&rsp, sizeof(rsp), >> LATE_BIND_RECV_TIMEOUT_MSEC); >> + if (ret < 0) { >> + dev_err(dev, "mei_cldev_recv failed. %d\n", ret); >> + goto end; >> + } >> + ret = mei_late_bind_check_response(dev, &rsp.header); >> + if (ret) { >> + dev_err(dev, "bad result response from the firmware: >> 0x%x\n", >> + *(uint32_t *)&rsp.header); >> + goto end; >> + } >> + ret = (int)rsp.status; >> + dev_dbg(dev, "mei_late_bind_push_config status = %d\n", ret); >> + >> +end: >> + mei_cldev_disable(cldev); >> + kfree(req); >> + return ret; >> +} >> + >> +static const struct late_bind_component_ops mei_late_bind_ops = { >> + .owner = THIS_MODULE, >> + .push_config = mei_late_bind_push_config, }; >> + >> +static int mei_component_master_bind(struct device *dev) { >> + return component_bind_all(dev, (void *)&mei_late_bind_ops); } >> + >> +static void mei_component_master_unbind(struct device *dev) { >> + component_unbind_all(dev, (void *)&mei_late_bind_ops); } >> + >> +static const struct component_master_ops mei_component_master_ops = { >> + .bind = mei_component_master_bind, >> + .unbind = mei_component_master_unbind, }; >> + >> +/** >> + * mei_late_bind_component_match - compare function for matching mei >> late bind. >> + * >> + * The function checks if requested is Intel VGA device >> + * and the parent of requester and the grand parent of mei_if are the same >> + * device. > This might be broken for headless card, headless care need to necessarily be VGA card. Will do %s/PCI_CLASS_DISPLAY_VGA/PCI_CLASS_DISPLAY to cover headless cards. >> + * >> + * @dev: master device >> + * @subcomponent: subcomponent to match >> (I915_COMPONENT_LATE_BIND) >> + * @data: compare data (mei late-bind bus device) >> + * >> + * Return: >> + * * 1 - if components match >> + * * 0 - otherwise >> + */ >> +static int mei_late_bind_component_match(struct device *dev, int >> subcomponent, >> + void *data) >> +{ >> + struct device *base = data; >> + struct pci_dev *pdev; >> + >> + if (!dev) >> + return 0; >> + >> + if (!dev_is_pci(dev)) >> + return 0; >> + >> + pdev = to_pci_dev(dev); >> + >> + if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) || >> + pdev->vendor != PCI_VENDOR_ID_INTEL) >> + return 0; >> + >> + if (subcomponent != I915_COMPONENT_LATE_BIND) >> + return 0; > Why I915_COMPONENT_LATE_BIND ? > Isn't this should be XE_ COMPONENT_LATE_BIND. Suggestion is not to use XE_ prefix in generic code. I915_ prefix is due to historical reasons, its being used for other components as well which are common in i915/xe. | If everyone agree then I will use INTEL_ prefix here. >> + >> + base = base->parent; >> + if (!base) /* mei device */ >> + return 0; >> + >> + base = base->parent; /* pci device */ > Is it sgunit pci endpoint ? > If yes then good to mention in comment. >> + >> + return !!base && dev == base; >> +} >> + >> +static int mei_late_bind_probe(struct mei_cl_device *cldev, >> + const struct mei_cl_device_id *id) { >> + struct component_match *master_match = NULL; >> + int ret; >> + >> + component_match_add_typed(&cldev->dev, &master_match, >> + mei_late_bind_component_match, &cldev- >>> dev); >> + if (IS_ERR_OR_NULL(master_match)) >> + return -ENOMEM; >> + >> + ret = component_master_add_with_match(&cldev->dev, >> + &mei_component_master_ops, >> + master_match); >> + if (ret < 0) >> + dev_err(&cldev->dev, "Master comp add failed %d\n", ret); >> + >> + return ret; >> +} >> + >> +static void mei_late_bind_remove(struct mei_cl_device *cldev) { >> + component_master_del(&cldev->dev, >> &mei_component_master_ops); } >> + >> +#define MEI_GUID_MKHI UUID_LE(0xe2c2afa2, 0x3817, 0x4d19, \ >> + 0x9d, 0x95, 0x6, 0xb1, 0x6b, 0x58, 0x8a, 0x5d) >> + >> +static struct mei_cl_device_id mei_late_bind_tbl[] = { >> + { .uuid = MEI_GUID_MKHI, .version = MEI_CL_VERSION_ANY }, >> + { } >> +}; >> +MODULE_DEVICE_TABLE(mei, mei_late_bind_tbl); >> + >> +static struct mei_cl_driver mei_late_bind_driver = { >> + .id_table = mei_late_bind_tbl, >> + .name = KBUILD_MODNAME, >> + .probe = mei_late_bind_probe, >> + .remove = mei_late_bind_remove, >> +}; >> + >> +module_mei_cl_driver(mei_late_bind_driver); >> + >> +MODULE_AUTHOR("Intel Corporation"); >> +MODULE_LICENSE("GPL"); >> +MODULE_DESCRIPTION("MEI Late Binding"); >> diff --git a/include/drm/intel/i915_component.h >> b/include/drm/intel/i915_component.h >> index 4ea3b17aa143..4945044d41e6 100644 >> --- a/include/drm/intel/i915_component.h >> +++ b/include/drm/intel/i915_component.h >> @@ -31,6 +31,7 @@ enum i915_component_type { >> I915_COMPONENT_HDCP, >> I915_COMPONENT_PXP, >> I915_COMPONENT_GSC_PROXY, >> + I915_COMPONENT_LATE_BIND, > We probably need a change here to make a xe specific component. Yes as mentioned in response of previous comment this can be INTEL_COMPONENT_LATE_BIND if everyone agree. Regards, Badal > > Thanks, > Anshuman Gupta. >> }; >> >> /* MAX_PORT is the number of port >> diff --git a/include/drm/intel/late_bind_mei_interface.h >> b/include/drm/intel/late_bind_mei_interface.h >> new file mode 100644 >> index 000000000000..6b54b8cec5ae >> --- /dev/null >> +++ b/include/drm/intel/late_bind_mei_interface.h >> @@ -0,0 +1,37 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright (c) 2025 Intel Corporation */ >> + >> +#ifndef _LATE_BIND_MEI_INTERFACE_H_ >> +#define _LATE_BIND_MEI_INTERFACE_H_ >> + >> +#include >> + >> +struct device; >> +struct module; >> + >> +/** >> + * struct late_bind_component_ops - ops for Late Binding services. >> + * @owner: Module providing the ops >> + * @push_config: Sends a config to FW. >> + */ >> +struct late_bind_component_ops { >> + struct module *owner; >> + >> + /** >> + * @push_config: Sends a config to FW. >> + * @dev: device struct corresponding to the mei device >> + * @type: payload type >> + * @flags: payload flags >> + * @payload: payload buffer >> + * @payload_size: payload buffer size >> + * >> + * Return: 0 success, negative errno value on transport failure, >> + * positive status returned by FW >> + */ >> + int (*push_config)(struct device *dev, u32 type, u32 flags, >> + const void *payload, size_t payload_size); }; >> + >> +#endif /* _LATE_BIND_MEI_INTERFACE_H_ */ >> -- >> 2.34.1 --------------1hU2m1wuwqPMs06TiGRINpRe Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: 8bit


On 14-06-2025 13:32, Gupta, Anshuman wrote:


-----Original Message-----
From: Nilawar, Badal <badal.nilawar@intel.com>
Sent: Friday, June 6, 2025 11:27 PM
To: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Cc: Gupta, Anshuman <anshuman.gupta@intel.com>; Vivi, Rodrigo
<rodrigo.vivi@intel.com>; Usyskin, Alexander <alexander.usyskin@intel.com>;
gregkh@linuxfoundation.org; Ceraolo Spurio, Daniele
<daniele.ceraolospurio@intel.com>; jgg@nvidia.com
Subject: [PATCH v2 02/10] mei: late_bind: add late binding component driver

From: Alexander Usyskin <alexander.usyskin@intel.com>

Add late binding component driver.
It allows pushing the late binding configuration from, for example, the Xe
graphics driver to the Intel discrete graphics card's CSE device.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v2:
 - Use generic naming (Jani)
 - Drop xe_late_bind_component struct to move to xe code (Daniele/Sasha)
---
 drivers/misc/mei/Kconfig                    |   1 +
 drivers/misc/mei/Makefile                   |   1 +
 drivers/misc/mei/late_bind/Kconfig          |  12 +
 drivers/misc/mei/late_bind/Makefile         |   9 +
 drivers/misc/mei/late_bind/mei_late_bind.c  | 261 ++++++++++++++++++++
 include/drm/intel/i915_component.h          |   1 +
 include/drm/intel/late_bind_mei_interface.h |  37 +++
 7 files changed, 322 insertions(+)
 create mode 100644 drivers/misc/mei/late_bind/Kconfig
 create mode 100644 drivers/misc/mei/late_bind/Makefile
 create mode 100644 drivers/misc/mei/late_bind/mei_late_bind.c
 create mode 100644 include/drm/intel/late_bind_mei_interface.h

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig index
7575fee96cc6..771becc68095 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -84,5 +84,6 @@ config INTEL_MEI_VSC
 source "drivers/misc/mei/hdcp/Kconfig"
 source "drivers/misc/mei/pxp/Kconfig"
 source "drivers/misc/mei/gsc_proxy/Kconfig"
+source "drivers/misc/mei/late_bind/Kconfig"

 endif
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile index
6f9fdbf1a495..84bfde888d81 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -31,6 +31,7 @@ CFLAGS_mei-trace.o = -I$(src)
 obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
 obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
 obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/
+obj-$(CONFIG_INTEL_MEI_LATE_BIND) += late_bind/

 obj-$(CONFIG_INTEL_MEI_VSC_HW) += mei-vsc-hw.o  mei-vsc-hw-y := vsc-
tp.o diff --git a/drivers/misc/mei/late_bind/Kconfig
b/drivers/misc/mei/late_bind/Kconfig
new file mode 100644
index 000000000000..c5302303e5af
--- /dev/null
+++ b/drivers/misc/mei/late_bind/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2025, Intel Corporation. All rights reserved.
+#
+config INTEL_MEI_LATE_BIND
+	tristate "Intel late binding support on ME Interface"
+	select INTEL_MEI_ME
+	depends on DRM_XE
+	help
+	  MEI Support for Late Binding for Intel graphics card.
+
+	  Enables the ME FW interfaces for Late Binding for
+          Xe display driver of Intel.

It is needed even for headless cards as well.
Will change the description.  

      

        
diff --git a/drivers/misc/mei/late_bind/Makefile
b/drivers/misc/mei/late_bind/Makefile
new file mode 100644
index 000000000000..a0aeda5853f0
--- /dev/null
+++ b/drivers/misc/mei/late_bind/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (c) 2025, Intel Corporation. All rights reserved.
+#
+# Makefile - Late Binding client driver for Intel MEI Bus Driver.
+
+subdir-ccflags-y += -I$(srctree)/drivers/misc/mei/
+
+obj-$(CONFIG_INTEL_MEI_LATE_BIND) += mei_late_bind.o
diff --git a/drivers/misc/mei/late_bind/mei_late_bind.c
b/drivers/misc/mei/late_bind/mei_late_bind.c
new file mode 100644
index 000000000000..964757a9b33a
--- /dev/null
+++ b/drivers/misc/mei/late_bind/mei_late_bind.c
@@ -0,0 +1,261 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Intel Corporation  */ #include
+<drm/drm_connector.h> #include <drm/intel/i915_component.h> #include


      

      
Why do we need drm_connector header ?
Remove unnecessary headers.

    

    Sure
    

      

      

        
+<drm/intel/late_bind_mei_interface.h>
+#include <linux/component.h>
+#include <linux/pci.h>
+#include <linux/mei_cl_bus.h>
+#include <linux/module.h>
+#include <linux/overflow.h>
+#include <linux/slab.h>
+#include <linux/uuid.h>
+
+#include "mkhi.h"
+
+#define GFX_SRV_MKHI_LATE_BINDING_CMD 0x12 #define


      

      
Why it is not prefixed with DGFX. This is unique to DGFX cards ?
@alexander any comment on above ?


      

        
+GFX_SRV_MKHI_LATE_BINDING_RSP (GFX_SRV_MKHI_LATE_BINDING_CMD
| 0x80)
+
+#define LATE_BIND_SEND_TIMEOUT_MSEC 3000 #define
+LATE_BIND_RECV_TIMEOUT_MSEC 3000


      

      
From where we got these delay numbers, from any specs or it is arbitrary delay specific to let bind ?
Add a code comment in that case.


      

        
+
+/**
+ * struct csc_heci_late_bind_req - late binding request
+ * @header: @ref mkhi_msg_hdr
+ * @type: type of the late binding payload
+ * @flags: flags to be passed to the firmware
+ * @reserved: reserved field
+ * @payload_size: size of the payload data in bytes
+ * @payload: data to be sent to the firmware  */ struct
+csc_heci_late_bind_req {
+	struct mkhi_msg_hdr header;
+	u32 type;
+	u32 flags;
+	u32 reserved[2];
+	u32 payload_size;
+	u8  payload[] __counted_by(payload_size); } __packed;
+
+/**
+ * struct csc_heci_late_bind_rsp - late binding response
+ * @header: @ref mkhi_msg_hdr
+ * @type: type of the late binding payload
+ * @reserved: reserved field
+ * @status: status of the late binding command execution by firmware
+*/ struct csc_heci_late_bind_rsp {
+	struct mkhi_msg_hdr header;
+	u32 type;
+	u32 reserved[2];
+	u32 status;
+} __packed;
+
+static int mei_late_bind_check_response(const struct device *dev, const
+struct mkhi_msg_hdr *hdr) {
+	if (hdr->group_id != MKHI_GROUP_ID_GFX) {
+		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
+			hdr->group_id, MKHI_GROUP_ID_GFX);
+		return -EINVAL;
+	}
+
+	if (hdr->command != GFX_SRV_MKHI_LATE_BINDING_RSP) {
+		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
+			hdr->command,
GFX_SRV_MKHI_LATE_BINDING_RSP);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/**
+ * mei_late_bind_push_config - Sends a config to the firmware.
+ * @dev: device struct corresponding to the mei device
+ * @type: payload type
+ * @flags: payload flags
+ * @payload: payload buffer
+ * @payload_size: payload buffer size
+ *
+ * Return: 0 success, negative errno value on transport failure,
+ *         positive status returned by FW
+ */
+static int mei_late_bind_push_config(struct device *dev, u32 type, u32 flags,
+				     const void *payload, size_t payload_size) {
+	struct mei_cl_device *cldev;
+	struct csc_heci_late_bind_req *req = NULL;
+	struct csc_heci_late_bind_rsp rsp;
+	size_t req_size;
+	int ret;
+
+	if (!dev || !payload || !payload_size)
+		return -EINVAL;
+
+	cldev = to_mei_cl_device(dev);
+
+	ret = mei_cldev_enable(cldev);
+	if (ret < 0) {
+		dev_dbg(dev, "mei_cldev_enable failed. %d\n", ret);
+		return ret;
+	}
+
+	req_size = struct_size(req, payload, payload_size);
+	if (req_size > mei_cldev_mtu(cldev)) {
+		dev_err(dev, "Payload is too big %zu\n", payload_size);
+		ret = -EMSGSIZE;
+		goto end;
+	}
+
+	req = kmalloc(req_size, GFP_KERNEL);
+	if (!req) {
+		ret = -ENOMEM;
+		goto end;
+	}
+
+	req->header.group_id = MKHI_GROUP_ID_GFX;
+	req->header.command = GFX_SRV_MKHI_LATE_BINDING_CMD;
+	req->type = type;
+	req->flags = flags;
+	req->reserved[0] = 0;
+	req->reserved[1] = 0;
+	req->payload_size = payload_size;
+	memcpy(req->payload, payload, payload_size);
+
+	ret = mei_cldev_send_timeout(cldev, (void *)req, req_size,
LATE_BIND_SEND_TIMEOUT_MSEC);
+	if (ret < 0) {
+		dev_err(dev, "mei_cldev_send failed. %d\n", ret);
+		goto end;
+	}
+	ret = mei_cldev_recv_timeout(cldev, (void *)&rsp, sizeof(rsp),
LATE_BIND_RECV_TIMEOUT_MSEC);
+	if (ret < 0) {
+		dev_err(dev, "mei_cldev_recv failed. %d\n", ret);
+		goto end;
+	}
+	ret = mei_late_bind_check_response(dev, &rsp.header);
+	if (ret) {
+		dev_err(dev, "bad result response from the firmware:
0x%x\n",
+			*(uint32_t *)&rsp.header);
+		goto end;
+	}
+	ret = (int)rsp.status;
+	dev_dbg(dev, "mei_late_bind_push_config status = %d\n", ret);
+
+end:
+	mei_cldev_disable(cldev);
+	kfree(req);
+	return ret;
+}
+
+static const struct late_bind_component_ops mei_late_bind_ops = {
+	.owner = THIS_MODULE,
+	.push_config = mei_late_bind_push_config, };
+
+static int mei_component_master_bind(struct device *dev) {
+	return component_bind_all(dev, (void *)&mei_late_bind_ops); }
+
+static void mei_component_master_unbind(struct device *dev) {
+	component_unbind_all(dev, (void *)&mei_late_bind_ops); }
+
+static const struct component_master_ops mei_component_master_ops = {
+	.bind = mei_component_master_bind,
+	.unbind = mei_component_master_unbind, };
+
+/**
+ * mei_late_bind_component_match - compare function for matching mei
late bind.
+ *
+ *    The function checks if requested is Intel VGA device
+ *    and the parent of requester and the grand parent of mei_if are the same
+ *    device.


      

      
This might be broken for headless card, headless care need to necessarily be VGA card.

    

    Will do %s/PCI_CLASS_DISPLAY_VGA/PCI_CLASS_DISPLAY to cover headless cards. 
    

      

      

        
+ *
+ * @dev: master device
+ * @subcomponent: subcomponent to match
(I915_COMPONENT_LATE_BIND)
+ * @data: compare data (mei late-bind bus device)
+ *
+ * Return:
+ * * 1 - if components match
+ * * 0 - otherwise
+ */
+static int mei_late_bind_component_match(struct device *dev, int
subcomponent,
+					 void *data)
+{
+	struct device *base = data;
+	struct pci_dev *pdev;
+
+	if (!dev)
+		return 0;
+
+	if (!dev_is_pci(dev))
+		return 0;
+
+	pdev = to_pci_dev(dev);
+
+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) ||
+	    pdev->vendor != PCI_VENDOR_ID_INTEL)
+		return 0;
+
+	if (subcomponent != I915_COMPONENT_LATE_BIND)
+		return 0;


      

      
Why I915_COMPONENT_LATE_BIND ?
Isn't this should be XE_ COMPONENT_LATE_BIND.

    

    
Suggestion is not to use XE_ prefix in generic code. I915_ prefix
      is due to historical reasons, its being used for other components
      as well which are common in i915/xe. |

      If everyone agree then I will use INTEL_ prefix here.  

    

      

      

        
+
+	base = base->parent;
+	if (!base) /* mei device */
+		return 0;
+
+	base = base->parent; /* pci device */


      

      
Is it sgunit pci endpoint ? 
If yes then good to mention in comment.


      

        
+
+	return !!base && dev == base;
+}
+
+static int mei_late_bind_probe(struct mei_cl_device *cldev,
+			       const struct mei_cl_device_id *id) {
+	struct component_match *master_match = NULL;
+	int ret;
+
+	component_match_add_typed(&cldev->dev, &master_match,
+				  mei_late_bind_component_match, &cldev-


        

          
dev);


        

        
+	if (IS_ERR_OR_NULL(master_match))
+		return -ENOMEM;
+
+	ret = component_master_add_with_match(&cldev->dev,
+					      &mei_component_master_ops,
+					      master_match);
+	if (ret < 0)
+		dev_err(&cldev->dev, "Master comp add failed %d\n", ret);
+
+	return ret;
+}
+
+static void mei_late_bind_remove(struct mei_cl_device *cldev) {
+	component_master_del(&cldev->dev,
&mei_component_master_ops); }
+
+#define MEI_GUID_MKHI UUID_LE(0xe2c2afa2, 0x3817, 0x4d19, \
+			      0x9d, 0x95, 0x6, 0xb1, 0x6b, 0x58, 0x8a, 0x5d)
+
+static struct mei_cl_device_id mei_late_bind_tbl[] = {
+	{ .uuid = MEI_GUID_MKHI, .version = MEI_CL_VERSION_ANY },
+	{ }
+};
+MODULE_DEVICE_TABLE(mei, mei_late_bind_tbl);
+
+static struct mei_cl_driver mei_late_bind_driver = {
+	.id_table = mei_late_bind_tbl,
+	.name = KBUILD_MODNAME,
+	.probe = mei_late_bind_probe,
+	.remove	= mei_late_bind_remove,
+};
+
+module_mei_cl_driver(mei_late_bind_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MEI Late Binding");
diff --git a/include/drm/intel/i915_component.h
b/include/drm/intel/i915_component.h
index 4ea3b17aa143..4945044d41e6 100644
--- a/include/drm/intel/i915_component.h
+++ b/include/drm/intel/i915_component.h
@@ -31,6 +31,7 @@ enum i915_component_type {
 	I915_COMPONENT_HDCP,
 	I915_COMPONENT_PXP,
 	I915_COMPONENT_GSC_PROXY,
+	I915_COMPONENT_LATE_BIND,


      

      
We probably need a change here to make a xe specific component.

    

    
Yes as mentioned in response of previous comment this can be
      INTEL_COMPONENT_LATE_BIND if everyone agree.

    
Regards,

      Badal

    

      

Thanks,
Anshuman Gupta.


      

        
 };

 /* MAX_PORT is the number of port
diff --git a/include/drm/intel/late_bind_mei_interface.h
b/include/drm/intel/late_bind_mei_interface.h
new file mode 100644
index 000000000000..6b54b8cec5ae
--- /dev/null
+++ b/include/drm/intel/late_bind_mei_interface.h	
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (c) 2025 Intel Corporation  */
+
+#ifndef _LATE_BIND_MEI_INTERFACE_H_
+#define _LATE_BIND_MEI_INTERFACE_H_
+
+#include <linux/types.h>
+
+struct device;
+struct module;
+
+/**
+ * struct late_bind_component_ops - ops for Late Binding services.
+ * @owner: Module providing the ops
+ * @push_config: Sends a config to FW.
+ */
+struct late_bind_component_ops {
+	struct module *owner;
+
+	/**
+	 * @push_config: Sends a config to FW.
+	 * @dev: device struct corresponding to the mei device
+	 * @type: payload type
+	 * @flags: payload flags
+	 * @payload: payload buffer
+	 * @payload_size: payload buffer size
+	 *
+	 * Return: 0 success, negative errno value on transport failure,
+	 *         positive status returned by FW
+	 */
+	int (*push_config)(struct device *dev, u32 type, u32 flags,
+			   const void *payload, size_t payload_size); };
+
+#endif /* _LATE_BIND_MEI_INTERFACE_H_ */
--
2.34.1


      

      

    

  


--------------1hU2m1wuwqPMs06TiGRINpRe--