[PATCH v6 00/12] Crashlog Type1 Version2 support

[PATCH v6 00/12] Crashlog Type1 Version2 support

[Michael J. Ruhl]

The Intel BMG GPU device supports the crashlog feature, which was
exposed in an Xe driver patch (drm/xe/vsec: Support BMG devices),
however the version of crashlog used by the BMG GPU does not have
a supporing PMT driver.

Update the PMT crashlog driver to support the BMG crashlog feature.

v2:
 - fix a misconfig for the crashlog DVSEC info in the xe driver
 - address review comments
v3:
 - re-order bug fix patches for stable
 - added re-order trigger logic patch
 - added helper patch to address repeated code patterns
 - address review comments
v4:
 - added pcidev to intel_pmt_entry to address null issue
 - dropped endpoint update patches
 - patch cleanup and address review comments
v5:
 - renamed helpers to avoid namespace issues
 - separate mutex cleanup from gaurd usage
 - refactor base paramters to a separate patch (from version struct)
 - add r/b reviewed patches
v6:
 - use correct fixes tag for NULL pointer patch
 - added ack to Xe driver patch
 - bug fix for access helpers patch

Michael J. Ruhl (12):
  platform/x86/intel/pmt: fix a crashlog NULL pointer access
  drm/xe: Correct BMG VSEC header sizing
  platform/x86/intel/pmt: white space cleanup
  platform/x86/intel/pmt: mutex clean up
  platform/x86/intel/pmt: use guard(mutex)
  platform/x86/intel/pmt: re-order trigger logic
  platform/x86/intel/pmt: correct types
  platform/x86/intel/pmt: decouple sysfs and namespace
  platform/x86/intel/pmt: add register access helpers
  platform/x86/intel/pmt: refactor base parameter
  platform/x86/intel/pmt: use a version struct
  platform/x86/intel/pmt: support BMG crashlog

 drivers/gpu/drm/xe/xe_vsec.c              |  20 +-
 drivers/platform/x86/intel/pmt/class.c    |  15 +-
 drivers/platform/x86/intel/pmt/class.h    |   3 +-
 drivers/platform/x86/intel/pmt/crashlog.c | 468 ++++++++++++++++++----
 4 files changed, 394 insertions(+), 112 deletions(-)

-- 
2.49.0

[PATCH v6 01/12] platform/x86/intel/pmt: fix a crashlog NULL pointer access

[Michael J. Ruhl]

Usage of the intel_pmt_read() for binary sysfs, requires a pcidev. The
current use of the endpoint value is only valid for telemetry endpoint
usage.

Without the ep, the crashlog usage causes the following NULL pointer
exception:

BUG: kernel NULL pointer dereference, address: 0000000000000000
Oops: Oops: 0000 [#1] SMP NOPTI
RIP: 0010:intel_pmt_read+0x3b/0x70 [pmt_class]
Code:
Call Trace:
 <TASK>
 ? sysfs_kf_bin_read+0xc0/0xe0
 kernfs_fop_read_iter+0xac/0x1a0
 vfs_read+0x26d/0x350
 ksys_read+0x6b/0xe0
 __x64_sys_read+0x1d/0x30
 x64_sys_call+0x1bc8/0x1d70
 do_syscall_64+0x6d/0x110

Augment struct intel_pmt_entry with a pointer to the pcidev to avoid
the NULL pointer exception.

Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Fixes: 045a513040cc ("platform/x86/intel/pmt: Use PMT callbacks")
Cc: <stable@vger.kernel.org>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/class.c | 3 ++-
 drivers/platform/x86/intel/pmt/class.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index 7233b654bbad..d046e8752173 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -97,7 +97,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
 	if (count > entry->size - off)
 		count = entry->size - off;
 
-	count = pmt_telem_read_mmio(entry->ep->pcidev, entry->cb, entry->header.guid, buf,
+	count = pmt_telem_read_mmio(entry->pcidev, entry->cb, entry->header.guid, buf,
 				    entry->base, off, count);
 
 	return count;
@@ -252,6 +252,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
 		return -EINVAL;
 	}
 
+	entry->pcidev = pci_dev;
 	entry->guid = header->guid;
 	entry->size = header->size;
 	entry->cb = ivdev->priv_data;
diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
index b2006d57779d..f6ce80c4e051 100644
--- a/drivers/platform/x86/intel/pmt/class.h
+++ b/drivers/platform/x86/intel/pmt/class.h
@@ -39,6 +39,7 @@ struct intel_pmt_header {
 
 struct intel_pmt_entry {
 	struct telem_endpoint	*ep;
+	struct pci_dev		*pcidev;
 	struct intel_pmt_header	header;
 	struct bin_attribute	pmt_bin_attr;
 	struct kobject		*kobj;
-- 
2.49.0

[PATCH v6 02/12] drm/xe: Correct BMG VSEC header sizing

[Michael J. Ruhl]

The intel_vsec_header information for the crashlog feature is
incorrect.

Update the VSEC header with correct sizing and count.

Since the crashlog entries are "merged" (num_entries = 2), the
separate capabilities entries must be merged as well.

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Fixes: 0c45e76fcc62 ("drm/xe/vsec: Support BMG devices")
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 20 +++++---------------
 1 file changed, 5 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 3e573b0b7ebd..67238fc57a4d 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -32,28 +32,18 @@ static struct intel_vsec_header bmg_telemetry = {
 	.offset = BMG_DISCOVERY_OFFSET,
 };
 
-static struct intel_vsec_header bmg_punit_crashlog = {
-	.length = 0x10,
+static struct intel_vsec_header bmg_crashlog = {
+	.length = 0x18,
 	.id = VSEC_ID_CRASHLOG,
-	.num_entries = 1,
-	.entry_size = 4,
+	.num_entries = 2,
+	.entry_size = 6,
 	.tbir = 0,
 	.offset = BMG_DISCOVERY_OFFSET + 0x60,
 };
 
-static struct intel_vsec_header bmg_oobmsm_crashlog = {
-	.length = 0x10,
-	.id = VSEC_ID_CRASHLOG,
-	.num_entries = 1,
-	.entry_size = 4,
-	.tbir = 0,
-	.offset = BMG_DISCOVERY_OFFSET + 0x78,
-};
-
 static struct intel_vsec_header *bmg_capabilities[] = {
 	&bmg_telemetry,
-	&bmg_punit_crashlog,
-	&bmg_oobmsm_crashlog,
+	&bmg_crashlog,
 	NULL
 };
 
-- 
2.49.0

[PATCH v6 03/12] platform/x86/intel/pmt: white space cleanup

[Michael J. Ruhl]

Noticed two white space issues; cleaned them.

Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 6a9eb3c4b313..d40c8e212733 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -143,7 +143,7 @@ enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 
 static ssize_t
 enable_store(struct device *dev, struct device_attribute *attr,
-	    const char *buf, size_t count)
+	     const char *buf, size_t count)
 {
 	struct crashlog_entry *entry;
 	bool enabled;
@@ -177,7 +177,7 @@ trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 
 static ssize_t
 trigger_store(struct device *dev, struct device_attribute *attr,
-	    const char *buf, size_t count)
+	      const char *buf, size_t count)
 {
 	struct crashlog_entry *entry;
 	bool trigger;
-- 
2.49.0

[PATCH v6 04/12] platform/x86/intel/pmt: mutex clean up

[Michael J. Ruhl]

The header file for mutex usage and mutex_destroy() cleanup code is
absent from this module.

Add the header file and mutex_destroy().

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index d40c8e212733..6e32fc1f8f1d 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -12,6 +12,7 @@
 #include <linux/intel_vsec.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/mutex.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/uaccess.h>
@@ -262,8 +263,12 @@ static void pmt_crashlog_remove(struct auxiliary_device *auxdev)
 	struct pmt_crashlog_priv *priv = auxiliary_get_drvdata(auxdev);
 	int i;
 
-	for (i = 0; i < priv->num_entries; i++)
-		intel_pmt_dev_destroy(&priv->entry[i].entry, &pmt_crashlog_ns);
+	for (i = 0; i < priv->num_entries; i++) {
+		struct crashlog_entry *crashlog = &priv->entry[i];
+
+		intel_pmt_dev_destroy(&crashlog->entry, &pmt_crashlog_ns);
+		mutex_destroy(&crashlog->control_mutex);
+	}
 }
 
 static int pmt_crashlog_probe(struct auxiliary_device *auxdev,
-- 
2.49.0

[PATCH v6 05/12] platform/x86/intel/pmt: use guard(mutex)

[Michael J. Ruhl]

Update the mutex paths to use the new guard() mechanism.

With the removal of goto, do some minor cleanup of the current logic
path.

Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 33 +++++++++++------------
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 6e32fc1f8f1d..c3ca95854aba 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/auxiliary_bus.h>
+#include <linux/cleanup.h>
 #include <linux/intel_vsec.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -156,9 +157,9 @@ enable_store(struct device *dev, struct device_attribute *attr,
 	if (result)
 		return result;
 
-	mutex_lock(&entry->control_mutex);
+	guard(mutex)(&entry->control_mutex);
+
 	pmt_crashlog_set_disable(&entry->entry, !enabled);
-	mutex_unlock(&entry->control_mutex);
 
 	return count;
 }
@@ -190,26 +191,24 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 	if (result)
 		return result;
 
-	mutex_lock(&entry->control_mutex);
+	guard(mutex)(&entry->control_mutex);
 
 	if (!trigger) {
 		pmt_crashlog_set_clear(&entry->entry);
-	} else if (pmt_crashlog_complete(&entry->entry)) {
-		/* we cannot trigger a new crash if one is still pending */
-		result = -EEXIST;
-		goto err;
-	} else if (pmt_crashlog_disabled(&entry->entry)) {
-		/* if device is currently disabled, return busy */
-		result = -EBUSY;
-		goto err;
-	} else {
-		pmt_crashlog_set_execute(&entry->entry);
+		return count;
 	}
 
-	result = count;
-err:
-	mutex_unlock(&entry->control_mutex);
-	return result;
+	/* we cannot trigger a new crash if one is still pending */
+	if (pmt_crashlog_complete(&entry->entry))
+		return -EEXIST;
+
+	/* if device is currently disabled, return busy */
+	if (pmt_crashlog_disabled(&entry->entry))
+		return -EBUSY;
+
+	pmt_crashlog_set_execute(&entry->entry);
+
+	return count;
 }
 static DEVICE_ATTR_RW(trigger);
 
-- 
2.49.0

[PATCH v6 06/12] platform/x86/intel/pmt: re-order trigger logic

[Michael J. Ruhl]

Setting the clear bit or checking the complete bit before checking to
see if crashlog is disabled seems incorrect.

Check disable before accessing any other bits.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index c3ca95854aba..440d2045e90d 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -193,6 +193,10 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 
 	guard(mutex)(&entry->control_mutex);
 
+	/* if device is currently disabled, return busy */
+	if (pmt_crashlog_disabled(&entry->entry))
+		return -EBUSY;
+
 	if (!trigger) {
 		pmt_crashlog_set_clear(&entry->entry);
 		return count;
@@ -202,10 +206,6 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 	if (pmt_crashlog_complete(&entry->entry))
 		return -EEXIST;
 
-	/* if device is currently disabled, return busy */
-	if (pmt_crashlog_disabled(&entry->entry))
-		return -EBUSY;
-
 	pmt_crashlog_set_execute(&entry->entry);
 
 	return count;
-- 
2.49.0

[PATCH v6 07/12] platform/x86/intel/pmt: correct types

[Michael J. Ruhl]

A couple of auto variables do not match the return types of some of
the functions.

Update the mismatched types to match.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 440d2045e90d..881f4abdae14 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -138,7 +138,7 @@ static ssize_t
 enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct intel_pmt_entry *entry = dev_get_drvdata(dev);
-	int enabled = !pmt_crashlog_disabled(entry);
+	bool enabled = !pmt_crashlog_disabled(entry);
 
 	return sprintf(buf, "%d\n", enabled);
 }
@@ -169,7 +169,7 @@ static ssize_t
 trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct intel_pmt_entry *entry;
-	int trigger;
+	bool trigger;
 
 	entry = dev_get_drvdata(dev);
 	trigger = pmt_crashlog_complete(entry);
-- 
2.49.0

[PATCH v6 08/12] platform/x86/intel/pmt: decouple sysfs and namespace

[Michael J. Ruhl]

The PMT namespace includes the crashlog sysfs attribute information.
Other crashlog version/types may need different sysfs attributes.
Coupling the attributes with the namespace blocks this usage.

Decouple sysfs attributes from the name space and add them to the
specific entry.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/class.c    | 12 ++++++------
 drivers/platform/x86/intel/pmt/class.h    |  2 +-
 drivers/platform/x86/intel/pmt/crashlog.c |  3 ++-
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index d046e8752173..3b6bf2f14dcb 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -285,8 +285,8 @@ static int intel_pmt_dev_register(struct intel_pmt_entry *entry,
 
 	entry->kobj = &dev->kobj;
 
-	if (ns->attr_grp) {
-		ret = sysfs_create_group(entry->kobj, ns->attr_grp);
+	if (entry->attr_grp) {
+		ret = sysfs_create_group(entry->kobj, entry->attr_grp);
 		if (ret)
 			goto fail_sysfs_create_group;
 	}
@@ -327,8 +327,8 @@ static int intel_pmt_dev_register(struct intel_pmt_entry *entry,
 fail_add_endpoint:
 	sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr);
 fail_ioremap:
-	if (ns->attr_grp)
-		sysfs_remove_group(entry->kobj, ns->attr_grp);
+	if (entry->attr_grp)
+		sysfs_remove_group(entry->kobj, entry->attr_grp);
 fail_sysfs_create_group:
 	device_unregister(dev);
 fail_dev_create:
@@ -370,8 +370,8 @@ void intel_pmt_dev_destroy(struct intel_pmt_entry *entry,
 	if (entry->size)
 		sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr);
 
-	if (ns->attr_grp)
-		sysfs_remove_group(entry->kobj, ns->attr_grp);
+	if (entry->attr_grp)
+		sysfs_remove_group(entry->kobj, entry->attr_grp);
 
 	device_unregister(dev);
 	xa_erase(ns->xa, entry->devid);
diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
index f6ce80c4e051..d5d86b8a2d15 100644
--- a/drivers/platform/x86/intel/pmt/class.h
+++ b/drivers/platform/x86/intel/pmt/class.h
@@ -42,6 +42,7 @@ struct intel_pmt_entry {
 	struct pci_dev		*pcidev;
 	struct intel_pmt_header	header;
 	struct bin_attribute	pmt_bin_attr;
+	const struct attribute_group *attr_grp;
 	struct kobject		*kobj;
 	void __iomem		*disc_table;
 	void __iomem		*base;
@@ -55,7 +56,6 @@ struct intel_pmt_entry {
 struct intel_pmt_namespace {
 	const char *name;
 	struct xarray *xa;
-	const struct attribute_group *attr_grp;
 	int (*pmt_header_decode)(struct intel_pmt_entry *entry,
 				 struct device *dev);
 	int (*pmt_add_endpoint)(struct intel_vsec_device *ivdev,
diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 881f4abdae14..23b3971da40a 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -243,6 +243,8 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 	/* Size is measured in DWORDS, but accessor returns bytes */
 	header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
 
+	entry->attr_grp = &pmt_crashlog_group;
+
 	return 0;
 }
 
@@ -250,7 +252,6 @@ static DEFINE_XARRAY_ALLOC(crashlog_array);
 static struct intel_pmt_namespace pmt_crashlog_ns = {
 	.name = "crashlog",
 	.xa = &crashlog_array,
-	.attr_grp = &pmt_crashlog_group,
 	.pmt_header_decode = pmt_crashlog_header_decode,
 };
 
-- 
2.49.0

[PATCH v6 09/12] platform/x86/intel/pmt: add register access helpers

[Michael J. Ruhl]

The control register is used in a read/modify/write pattern.
The status register is used in a read/check bit pattern.

Add helpers to eliminate common code.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 60 ++++++++++++-----------
 1 file changed, 31 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 23b3971da40a..888946a8ba46 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -64,20 +64,42 @@ struct pmt_crashlog_priv {
 /*
  * I/O
  */
-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+#define CRASHLOG_SET_BIT	true
+#define CRASHLOG_CLEAR_BIT	false
+
+/* read/modify/write */
+static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
+
+	if (set)
+		reg |= bit;
+	else
+		reg &= ~bit;
+
+	writel(reg, entry->disc_table + CONTROL_OFFSET);
+}
+
+/* read/check */
+static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
+{
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	return !!(reg & bit);
+}
 
+static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+{
 	/* return current value of the crashlog complete flag */
-	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
 }
 
 static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
 	/* return current value of the crashlog disabled flag */
-	return !!(control & CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -98,37 +120,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
 				     bool disable)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	/* clear trigger bits so we are only modifying disable flag */
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-
-	if (disable)
-		control |= CRASHLOG_FLAG_DISABLE;
-	else
-		control &= ~CRASHLOG_FLAG_DISABLE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
 }
 
 static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
 }
 
 static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
 }
 
 /*
-- 
2.49.0

[PATCH v6 10/12] platform/x86/intel/pmt: refactor base parameter

[Michael J. Ruhl]

For the crashlog driver, struct crashlog_entry is the parent of
struct intel_pmt_entry. To support multiple crashlog versions, most
accesses will be to the struct crashlog_entry.

- Refactor to use struct crashlog_entry in place of
  struct intel_pmt_entry
- Rename some usages (auto-variables) from entry to crashlog

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 59 ++++++++++++-----------
 1 file changed, 30 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 888946a8ba46..8cca520c5a1c 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -68,8 +68,9 @@ struct pmt_crashlog_priv {
 #define CRASHLOG_CLEAR_BIT	false
 
 /* read/modify/write */
-static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
+static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 {
+	struct intel_pmt_entry *entry = &crashlog->entry;
 	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
 
 	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
@@ -83,23 +84,24 @@ static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
 }
 
 /* read/check */
-static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
+static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 {
+	struct intel_pmt_entry *entry = &crashlog->entry;
 	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
 
 	return !!(reg & bit);
 }
 
-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog complete flag */
-	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
 }
 
-static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
+static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog disabled flag */
-	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -117,20 +119,19 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
 }
 
-static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
-				     bool disable)
+static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
 {
-	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
+	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
 }
 
-static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
+static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
 }
 
-static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
+static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
 }
 
 /*
@@ -139,8 +140,8 @@ static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
 static ssize_t
 enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
-	struct intel_pmt_entry *entry = dev_get_drvdata(dev);
-	bool enabled = !pmt_crashlog_disabled(entry);
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool enabled = !pmt_crashlog_disabled(crashlog);
 
 	return sprintf(buf, "%d\n", enabled);
 }
@@ -149,19 +150,19 @@ static ssize_t
 enable_store(struct device *dev, struct device_attribute *attr,
 	     const char *buf, size_t count)
 {
-	struct crashlog_entry *entry;
+	struct crashlog_entry *crashlog;
 	bool enabled;
 	int result;
 
-	entry = dev_get_drvdata(dev);
+	crashlog = dev_get_drvdata(dev);
 
 	result = kstrtobool(buf, &enabled);
 	if (result)
 		return result;
 
-	guard(mutex)(&entry->control_mutex);
+	guard(mutex)(&crashlog->control_mutex);
 
-	pmt_crashlog_set_disable(&entry->entry, !enabled);
+	pmt_crashlog_set_disable(crashlog, !enabled);
 
 	return count;
 }
@@ -170,11 +171,11 @@ static DEVICE_ATTR_RW(enable);
 static ssize_t
 trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
-	struct intel_pmt_entry *entry;
+	struct crashlog_entry *crashlog;
 	bool trigger;
 
-	entry = dev_get_drvdata(dev);
-	trigger = pmt_crashlog_complete(entry);
+	crashlog = dev_get_drvdata(dev);
+	trigger = pmt_crashlog_complete(crashlog);
 
 	return sprintf(buf, "%d\n", trigger);
 }
@@ -183,32 +184,32 @@ static ssize_t
 trigger_store(struct device *dev, struct device_attribute *attr,
 	      const char *buf, size_t count)
 {
-	struct crashlog_entry *entry;
+	struct crashlog_entry *crashlog;
 	bool trigger;
 	int result;
 
-	entry = dev_get_drvdata(dev);
+	crashlog = dev_get_drvdata(dev);
 
 	result = kstrtobool(buf, &trigger);
 	if (result)
 		return result;
 
-	guard(mutex)(&entry->control_mutex);
+	guard(mutex)(&crashlog->control_mutex);
 
 	/* if device is currently disabled, return busy */
-	if (pmt_crashlog_disabled(&entry->entry))
+	if (pmt_crashlog_disabled(crashlog))
 		return -EBUSY;
 
 	if (!trigger) {
-		pmt_crashlog_set_clear(&entry->entry);
+		pmt_crashlog_set_clear(crashlog);
 		return count;
 	}
 
 	/* we cannot trigger a new crash if one is still pending */
-	if (pmt_crashlog_complete(&entry->entry))
+	if (pmt_crashlog_complete(crashlog))
 		return -EEXIST;
 
-	pmt_crashlog_set_execute(&entry->entry);
+	pmt_crashlog_set_execute(crashlog);
 
 	return count;
 }
-- 
2.49.0

[PATCH v6 11/12] platform/x86/intel/pmt: use a version struct

[Michael J. Ruhl]

In preparation for supporting multiple crashlog versions, use a struct
to keep bit offset info for the status and control bits.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 92 ++++++++++++++++-------
 1 file changed, 66 insertions(+), 26 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 8cca520c5a1c..edc41144909c 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -24,21 +24,6 @@
 /* Crashlog discovery header types */
 #define CRASH_TYPE_OOBMSM	1
 
-/* Control Flags */
-#define CRASHLOG_FLAG_DISABLE		BIT(28)
-
-/*
- * Bits 29 and 30 control the state of bit 31.
- *
- * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
- * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
- * Bit 31 is the read-only status with a 1 indicating log is complete.
- */
-#define CRASHLOG_FLAG_TRIGGER_CLEAR	BIT(29)
-#define CRASHLOG_FLAG_TRIGGER_EXECUTE	BIT(30)
-#define CRASHLOG_FLAG_TRIGGER_COMPLETE	BIT(31)
-#define CRASHLOG_FLAG_TRIGGER_MASK	GENMASK(31, 28)
-
 /* Crashlog Discovery Header */
 #define CONTROL_OFFSET		0x0
 #define GUID_OFFSET		0x4
@@ -50,10 +35,63 @@
 /* size is in bytes */
 #define GET_SIZE(v)		((v) * sizeof(u32))
 
+/*
+ * Type 1 Version 0
+ * status and control registers are combined.
+ *
+ * Bits 29 and 30 control the state of bit 31.
+ * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
+ * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
+ * Bit 31 is the read-only status with a 1 indicating log is complete.
+ */
+#define TYPE1_VER0_STATUS_OFFSET	0x00
+#define TYPE1_VER0_CONTROL_OFFSET	0x00
+
+#define TYPE1_VER0_DISABLE		BIT(28)
+#define TYPE1_VER0_CLEAR		BIT(29)
+#define TYPE1_VER0_EXECUTE		BIT(30)
+#define TYPE1_VER0_COMPLETE		BIT(31)
+#define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
+
+/* After offset, order alphabetically, not bit ordered */
+struct crashlog_status {
+	u32 offset;
+	u32 cleared;
+	u32 complete;
+	u32 disabled;
+};
+
+struct crashlog_control {
+	u32 offset;
+	u32 trigger_mask;
+	u32 clear;
+	u32 disable;
+	u32 manual;
+};
+
+struct crashlog_info {
+	struct crashlog_status status;
+	struct crashlog_control control;
+};
+
+static const struct crashlog_info crashlog_type1_ver0 = {
+	.status.offset = TYPE1_VER0_STATUS_OFFSET,
+	.status.cleared = TYPE1_VER0_CLEAR,
+	.status.complete = TYPE1_VER0_COMPLETE,
+	.status.disabled = TYPE1_VER0_DISABLE,
+
+	.control.offset = TYPE1_VER0_CONTROL_OFFSET,
+	.control.trigger_mask = TYPE1_VER0_TRIGGER_MASK,
+	.control.clear = TYPE1_VER0_CLEAR,
+	.control.disable = TYPE1_VER0_DISABLE,
+	.control.manual = TYPE1_VER0_EXECUTE,
+};
+
 struct crashlog_entry {
 	/* entry must be first member of struct */
 	struct intel_pmt_entry		entry;
 	struct mutex			control_mutex;
+	const struct crashlog_info	*info;
 };
 
 struct pmt_crashlog_priv {
@@ -70,24 +108,25 @@ struct pmt_crashlog_priv {
 /* read/modify/write */
 static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 {
+	const struct crashlog_control *control = &crashlog->info->control;
 	struct intel_pmt_entry *entry = &crashlog->entry;
-	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+	u32 reg = readl(entry->disc_table + control->offset);
 
-	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
+	reg &= ~control->trigger_mask;
 
 	if (set)
 		reg |= bit;
 	else
 		reg &= ~bit;
 
-	writel(reg, entry->disc_table + CONTROL_OFFSET);
+	writel(reg, entry->disc_table + control->offset);
 }
 
 /* read/check */
 static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 {
-	struct intel_pmt_entry *entry = &crashlog->entry;
-	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+	const struct crashlog_status *status = &crashlog->info->status;
+	u32 reg = readl(crashlog->entry.disc_table + status->offset);
 
 	return !!(reg & bit);
 }
@@ -95,13 +134,13 @@ static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog complete flag */
-	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.complete);
 }
 
 static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog disabled flag */
-	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -121,17 +160,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 
 static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
 {
-	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.disable, disable);
 }
 
 static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.clear, CRASHLOG_SET_BIT);
 }
 
 static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
 }
 
 /*
@@ -235,9 +274,10 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 	if (!pmt_crashlog_supported(entry))
 		return 1;
 
-	/* initialize control mutex */
+	/* initialize the crashlog struct */
 	crashlog = container_of(entry, struct crashlog_entry, entry);
 	mutex_init(&crashlog->control_mutex);
+	crashlog->info = &crashlog_type1_ver0;
 
 	header->access_type = GET_ACCESS(readl(disc_table));
 	header->guid = readl(disc_table + GUID_OFFSET);
-- 
2.49.0

[PATCH v6 12/12] platform/x86/intel/pmt: support BMG crashlog

[Michael J. Ruhl]

The Battlemage GPU has the type 1 version 2 crashlog feature.

Update the crashlog driver to support this crashlog version.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 268 ++++++++++++++++++++--
 1 file changed, 255 insertions(+), 13 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index edc41144909c..35c19e9a2bb6 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -53,20 +53,52 @@
 #define TYPE1_VER0_COMPLETE		BIT(31)
 #define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
 
+/*
+ * Type 1 Version 2
+ * status and control are two different registers
+ */
+#define TYPE1_VER2_STATUS_OFFSET	0x00
+#define TYPE1_VER2_CONTROL_OFFSET	0x14
+
+/* status register */
+#define TYPE1_VER2_CLEAR_SUPPORT	BIT(20)
+#define TYPE1_VER2_REARMED		BIT(25)
+#define TYPE1_VER2_ERROR		BIT(26)
+#define TYPE1_VER2_CONSUMED		BIT(27)
+#define TYPE1_VER2_DISABLED		BIT(28)
+#define TYPE1_VER2_CLEARED		BIT(29)
+#define TYPE1_VER2_IN_PROGRESS		BIT(30)
+#define TYPE1_VER2_COMPLETE		BIT(31)
+
+/* control register */
+#define TYPE1_VER2_CONSUME		BIT(25)
+#define TYPE1_VER2_REARM		BIT(28)
+#define TYPE1_VER2_EXECUTE		BIT(29)
+#define TYPE1_VER2_CLEAR		BIT(30)
+#define TYPE1_VER2_DISABLE		BIT(31)
+#define TYPE1_VER2_TRIGGER_MASK		(TYPE1_VER2_EXECUTE | TYPE1_VER2_CLEAR | TYPE1_VER2_DISABLE)
+
 /* After offset, order alphabetically, not bit ordered */
 struct crashlog_status {
 	u32 offset;
+	u32 clear_supported;
 	u32 cleared;
 	u32 complete;
+	u32 consumed;
 	u32 disabled;
+	u32 error;
+	u32 in_progress;
+	u32 rearmed;
 };
 
 struct crashlog_control {
 	u32 offset;
 	u32 trigger_mask;
 	u32 clear;
+	u32 consume;
 	u32 disable;
 	u32 manual;
+	u32 rearm;
 };
 
 struct crashlog_info {
@@ -87,6 +119,26 @@ static const struct crashlog_info crashlog_type1_ver0 = {
 	.control.manual = TYPE1_VER0_EXECUTE,
 };
 
+const struct crashlog_info crashlog_type1_ver2 = {
+	.status.offset = TYPE1_VER2_STATUS_OFFSET,
+	.status.clear_supported = TYPE1_VER2_CLEAR_SUPPORT,
+	.status.cleared = TYPE1_VER2_CLEARED,
+	.status.complete = TYPE1_VER2_COMPLETE,
+	.status.consumed = TYPE1_VER2_CONSUMED,
+	.status.disabled = TYPE1_VER2_DISABLED,
+	.status.error = TYPE1_VER2_ERROR,
+	.status.in_progress = TYPE1_VER2_IN_PROGRESS,
+	.status.rearmed = TYPE1_VER2_REARMED,
+
+	.control.offset = TYPE1_VER2_CONTROL_OFFSET,
+	.control.trigger_mask = TYPE1_VER2_TRIGGER_MASK,
+	.control.clear = TYPE1_VER2_CLEAR,
+	.control.consume = TYPE1_VER2_CONSUME,
+	.control.disable = TYPE1_VER2_DISABLE,
+	.control.manual = TYPE1_VER2_EXECUTE,
+	.control.rearm = TYPE1_VER2_REARM,
+};
+
 struct crashlog_entry {
 	/* entry must be first member of struct */
 	struct intel_pmt_entry		entry;
@@ -143,19 +195,23 @@ static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
 	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
 }
 
-static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
+static bool pmt_crashlog_supported(struct intel_pmt_entry *entry, u32 *crash_type, u32 *version)
 {
 	u32 discovery_header = readl(entry->disc_table + CONTROL_OFFSET);
-	u32 crash_type, version;
 
-	crash_type = GET_TYPE(discovery_header);
-	version = GET_VERSION(discovery_header);
+	*crash_type = GET_TYPE(discovery_header);
+	*version = GET_VERSION(discovery_header);
 
 	/*
-	 * Currently we only recognize OOBMSM version 0 devices.
-	 * We can ignore all other crashlog devices in the system.
+	 * Currently we only recognize OOBMSM (type 1) and version 0 or 2
+	 * devices.
+	 *
+	 * Ignore all other crashlog devices in the system.
 	 */
-	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
+	if (*crash_type == CRASH_TYPE_OOBMSM && (*version == 0 || *version == 2))
+		return true;
+
+	return false;
 }
 
 static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
@@ -173,9 +229,118 @@ static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
 	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
 }
 
+static bool pmt_crashlog_cleared(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog cleared flag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.cleared);
+}
+
+static bool pmt_crashlog_consumed(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog consumedflag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.consumed);
+}
+
+static void pmt_crashlog_set_consumed(struct crashlog_entry *crashlog)
+{
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.consume, CRASHLOG_SET_BIT);
+}
+
+static bool pmt_crashlog_error(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog error flag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.error);
+}
+
+static bool pmt_crashlog_rearm(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog reamed flag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.rearmed);
+}
+
+static void pmt_crashlog_set_rearm(struct crashlog_entry *crashlog)
+{
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.rearm, CRASHLOG_SET_BIT);
+}
+
 /*
  * sysfs
  */
+static ssize_t
+clear_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool cleared = pmt_crashlog_cleared(crashlog);
+
+	return sysfs_emit(buf, "%d\n", cleared);
+}
+
+static ssize_t
+clear_store(struct device *dev, struct device_attribute *attr,
+	    const char *buf, size_t count)
+{
+	struct crashlog_entry *crashlog;
+	bool clear;
+	int result;
+
+	crashlog = dev_get_drvdata(dev);
+
+	result = kstrtobool(buf, &clear);
+	if (result)
+		return result;
+
+	/* set bit only */
+	if (!clear)
+		return -EINVAL;
+
+	guard(mutex)(&crashlog->control_mutex);
+
+	pmt_crashlog_set_clear(crashlog);
+
+	return count;
+}
+static DEVICE_ATTR_RW(clear);
+
+static ssize_t
+consumed_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool consumed = pmt_crashlog_consumed(crashlog);
+
+	return sysfs_emit(buf, "%d\n", consumed);
+}
+
+static ssize_t consumed_store(struct device *dev, struct device_attribute *attr,
+			      const char *buf, size_t count)
+{
+	struct crashlog_entry *crashlog;
+	bool consumed;
+	int result;
+
+	crashlog = dev_get_drvdata(dev);
+
+	result = kstrtobool(buf, &consumed);
+	if (result)
+		return result;
+
+	/* set bit only */
+	if (!consumed)
+		return -EINVAL;
+
+	guard(mutex)(&crashlog->control_mutex);
+
+	if (pmt_crashlog_disabled(crashlog))
+		return -EBUSY;
+
+	if (!pmt_crashlog_complete(crashlog))
+		return -EEXIST;
+
+	pmt_crashlog_set_consumed(crashlog);
+
+	return count;
+}
+static DEVICE_ATTR_RW(consumed);
+
 static ssize_t
 enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -207,6 +372,50 @@ enable_store(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR_RW(enable);
 
+static ssize_t
+error_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool error = pmt_crashlog_error(crashlog);
+
+	return sysfs_emit(buf, "%d\n", error);
+}
+static DEVICE_ATTR_RO(error);
+
+static ssize_t
+rearm_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	int rearmed = pmt_crashlog_rearm(crashlog);
+
+	return sysfs_emit(buf, "%d\n", rearmed);
+}
+
+static ssize_t rearm_store(struct device *dev, struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	struct crashlog_entry *crashlog;
+	bool rearm;
+	int result;
+
+	crashlog = dev_get_drvdata(dev);
+
+	result = kstrtobool(buf, &rearm);
+	if (result)
+		return result;
+
+	/* set only */
+	if (!rearm)
+		return -EINVAL;
+
+	guard(mutex)(&crashlog->control_mutex);
+
+	pmt_crashlog_set_rearm(crashlog);
+
+	return count;
+}
+static DEVICE_ATTR_RW(rearm);
+
 static ssize_t
 trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -254,30 +463,63 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR_RW(trigger);
 
-static struct attribute *pmt_crashlog_attrs[] = {
+static struct attribute *pmt_crashlog_type1_ver0_attrs[] = {
 	&dev_attr_enable.attr,
 	&dev_attr_trigger.attr,
 	NULL
 };
 
-static const struct attribute_group pmt_crashlog_group = {
-	.attrs	= pmt_crashlog_attrs,
+static struct attribute *pmt_crashlog_type1_ver2_attrs[] = {
+	&dev_attr_clear.attr,
+	&dev_attr_consumed.attr,
+	&dev_attr_enable.attr,
+	&dev_attr_error.attr,
+	&dev_attr_rearm.attr,
+	&dev_attr_trigger.attr,
+	NULL
+};
+
+static const struct attribute_group pmt_crashlog_type1_ver0_group = {
+	.attrs	= pmt_crashlog_type1_ver0_attrs,
 };
 
+static const struct attribute_group pmt_crashlog_type1_ver2_group = {
+	.attrs = pmt_crashlog_type1_ver2_attrs,
+};
+
+static const struct crashlog_info *select_crashlog_info(u32 type, u32 version)
+{
+	if (version == 0)
+		return &crashlog_type1_ver0;
+
+	return &crashlog_type1_ver2;
+}
+
+static const struct attribute_group *select_sysfs_grp(u32 type, u32 version)
+{
+	if (version == 0)
+		return &pmt_crashlog_type1_ver2_group;
+
+	return &pmt_crashlog_type1_ver2_group;
+}
+
 static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 				      struct device *dev)
 {
 	void __iomem *disc_table = entry->disc_table;
 	struct intel_pmt_header *header = &entry->header;
 	struct crashlog_entry *crashlog;
+	u32 version;
+	u32 type;
 
-	if (!pmt_crashlog_supported(entry))
+	if (!pmt_crashlog_supported(entry, &type, &version))
 		return 1;
 
 	/* initialize the crashlog struct */
 	crashlog = container_of(entry, struct crashlog_entry, entry);
 	mutex_init(&crashlog->control_mutex);
-	crashlog->info = &crashlog_type1_ver0;
+
+	crashlog->info = select_crashlog_info(type, version);
 
 	header->access_type = GET_ACCESS(readl(disc_table));
 	header->guid = readl(disc_table + GUID_OFFSET);
@@ -286,7 +528,7 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 	/* Size is measured in DWORDS, but accessor returns bytes */
 	header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
 
-	entry->attr_grp = &pmt_crashlog_group;
+	entry->attr_grp = select_sysfs_grp(type, version);
 
 	return 0;
 }
-- 
2.49.0

✓ CI.KUnit: success for Crashlog Type1 Version2 support (rev6)

[Patchwork]

== Series Details ==

Series: Crashlog Type1 Version2 support (rev6)
URL   : https://patchwork.freedesktop.org/series/149120/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:18:04] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:18:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:18:35] Starting KUnit Kernel (1/1)...
[21:18:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:18:35] ================== guc_buf (11 subtests) ===================
[21:18:35] [PASSED] test_smallest
[21:18:35] [PASSED] test_largest
[21:18:36] [PASSED] test_granular
[21:18:36] [PASSED] test_unique
[21:18:36] [PASSED] test_overlap
[21:18:36] [PASSED] test_reusable
[21:18:36] [PASSED] test_too_big
[21:18:36] [PASSED] test_flush
[21:18:36] [PASSED] test_lookup
[21:18:36] [PASSED] test_data
[21:18:36] [PASSED] test_class
[21:18:36] ===================== [PASSED] guc_buf =====================
[21:18:36] =================== guc_dbm (7 subtests) ===================
[21:18:36] [PASSED] test_empty
[21:18:36] [PASSED] test_default
[21:18:36] ======================== test_size  ========================
[21:18:36] [PASSED] 4
[21:18:36] [PASSED] 8
[21:18:36] [PASSED] 32
[21:18:36] [PASSED] 256
[21:18:36] ==================== [PASSED] test_size ====================
[21:18:36] ======================= test_reuse  ========================
[21:18:36] [PASSED] 4
[21:18:36] [PASSED] 8
[21:18:36] [PASSED] 32
[21:18:36] [PASSED] 256
[21:18:36] =================== [PASSED] test_reuse ====================
[21:18:36] =================== test_range_overlap  ====================
[21:18:36] [PASSED] 4
[21:18:36] [PASSED] 8
[21:18:36] [PASSED] 32
[21:18:36] [PASSED] 256
[21:18:36] =============== [PASSED] test_range_overlap ================
[21:18:36] =================== test_range_compact  ====================
[21:18:36] [PASSED] 4
[21:18:36] [PASSED] 8
[21:18:36] [PASSED] 32
[21:18:36] [PASSED] 256
[21:18:36] =============== [PASSED] test_range_compact ================
[21:18:36] ==================== test_range_spare  =====================
[21:18:36] [PASSED] 4
[21:18:36] [PASSED] 8
[21:18:36] [PASSED] 32
[21:18:36] [PASSED] 256
[21:18:36] ================ [PASSED] test_range_spare =================
[21:18:36] ===================== [PASSED] guc_dbm =====================
[21:18:36] =================== guc_idm (6 subtests) ===================
[21:18:36] [PASSED] bad_init
[21:18:36] [PASSED] no_init
[21:18:36] [PASSED] init_fini
[21:18:36] [PASSED] check_used
[21:18:36] [PASSED] check_quota
[21:18:36] [PASSED] check_all
[21:18:36] ===================== [PASSED] guc_idm =====================
[21:18:36] ================== no_relay (3 subtests) ===================
[21:18:36] [PASSED] xe_drops_guc2pf_if_not_ready
[21:18:36] [PASSED] xe_drops_guc2vf_if_not_ready
[21:18:36] [PASSED] xe_rejects_send_if_not_ready
[21:18:36] ==================== [PASSED] no_relay =====================
[21:18:36] ================== pf_relay (14 subtests) ==================
[21:18:36] [PASSED] pf_rejects_guc2pf_too_short
[21:18:36] [PASSED] pf_rejects_guc2pf_too_long
[21:18:36] [PASSED] pf_rejects_guc2pf_no_payload
[21:18:36] [PASSED] pf_fails_no_payload
[21:18:36] [PASSED] pf_fails_bad_origin
[21:18:36] [PASSED] pf_fails_bad_type
[21:18:36] [PASSED] pf_txn_reports_error
[21:18:36] [PASSED] pf_txn_sends_pf2guc
[21:18:36] [PASSED] pf_sends_pf2guc
[21:18:36] [SKIPPED] pf_loopback_nop
[21:18:36] [SKIPPED] pf_loopback_echo
[21:18:36] [SKIPPED] pf_loopback_fail
[21:18:36] [SKIPPED] pf_loopback_busy
[21:18:36] [SKIPPED] pf_loopback_retry
[21:18:36] ==================== [PASSED] pf_relay =====================
[21:18:36] ================== vf_relay (3 subtests) ===================
[21:18:36] [PASSED] vf_rejects_guc2vf_too_short
[21:18:36] [PASSED] vf_rejects_guc2vf_too_long
[21:18:36] [PASSED] vf_rejects_guc2vf_no_payload
[21:18:36] ==================== [PASSED] vf_relay =====================
[21:18:36] ================= pf_service (11 subtests) =================
[21:18:36] [PASSED] pf_negotiate_any
[21:18:36] [PASSED] pf_negotiate_base_match
[21:18:36] [PASSED] pf_negotiate_base_newer
[21:18:36] [PASSED] pf_negotiate_base_next
[21:18:36] [SKIPPED] pf_negotiate_base_older
[21:18:36] [PASSED] pf_negotiate_base_prev
[21:18:36] [PASSED] pf_negotiate_latest_match
[21:18:36] [PASSED] pf_negotiate_latest_newer
[21:18:36] [PASSED] pf_negotiate_latest_next
[21:18:36] [SKIPPED] pf_negotiate_latest_older
[21:18:36] [SKIPPED] pf_negotiate_latest_prev
[21:18:36] =================== [PASSED] pf_service ====================
[21:18:36] ===================== lmtt (1 subtest) =====================
[21:18:36] ======================== test_ops  =========================
[21:18:36] [PASSED] 2-level
[21:18:36] [PASSED] multi-level
[21:18:36] ==================== [PASSED] test_ops =====================
[21:18:36] ====================== [PASSED] lmtt =======================
[21:18:36] =================== xe_mocs (2 subtests) ===================
[21:18:36] ================ xe_live_mocs_kernel_kunit  ================
[21:18:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:18:36] ================ xe_live_mocs_reset_kunit  =================
[21:18:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:18:36] ==================== [SKIPPED] xe_mocs =====================
[21:18:36] ================= xe_migrate (2 subtests) ==================
[21:18:36] ================= xe_migrate_sanity_kunit  =================
[21:18:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:18:36] ================== xe_validate_ccs_kunit  ==================
[21:18:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:18:36] =================== [SKIPPED] xe_migrate ===================
[21:18:36] ================== xe_dma_buf (1 subtest) ==================
[21:18:36] ==================== xe_dma_buf_kunit  =====================
[21:18:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:18:36] =================== [SKIPPED] xe_dma_buf ===================
[21:18:36] ================= xe_bo_shrink (1 subtest) =================
[21:18:36] =================== xe_bo_shrink_kunit  ====================
[21:18:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:18:36] ================== [SKIPPED] xe_bo_shrink ==================
[21:18:36] ==================== xe_bo (2 subtests) ====================
[21:18:36] ================== xe_ccs_migrate_kunit  ===================
[21:18:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:18:36] ==================== xe_bo_evict_kunit  ====================
[21:18:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:18:36] ===================== [SKIPPED] xe_bo ======================
[21:18:36] ==================== args (11 subtests) ====================
[21:18:36] [PASSED] count_args_test
[21:18:36] [PASSED] call_args_example
[21:18:36] [PASSED] call_args_test
[21:18:36] [PASSED] drop_first_arg_example
[21:18:36] [PASSED] drop_first_arg_test
[21:18:36] [PASSED] first_arg_example
[21:18:36] [PASSED] first_arg_test
[21:18:36] [PASSED] last_arg_example
[21:18:36] [PASSED] last_arg_test
[21:18:36] [PASSED] pick_arg_example
[21:18:36] [PASSED] sep_comma_example
[21:18:36] ====================== [PASSED] args =======================
[21:18:36] =================== xe_pci (3 subtests) ====================
[21:18:36] ==================== check_graphics_ip  ====================
[21:18:36] [PASSED] 12.70 Xe_LPG
[21:18:36] [PASSED] 12.71 Xe_LPG
[21:18:36] [PASSED] 12.74 Xe_LPG+
[21:18:36] [PASSED] 20.01 Xe2_HPG
[21:18:36] [PASSED] 20.02 Xe2_HPG
[21:18:36] [PASSED] 20.04 Xe2_LPG
[21:18:36] [PASSED] 30.00 Xe3_LPG
[21:18:36] [PASSED] 30.01 Xe3_LPG
[21:18:36] [PASSED] 30.03 Xe3_LPG
[21:18:36] ================ [PASSED] check_graphics_ip ================
[21:18:36] ===================== check_media_ip  ======================
[21:18:36] [PASSED] 13.00 Xe_LPM+
[21:18:36] [PASSED] 13.01 Xe2_HPM
[21:18:36] [PASSED] 20.00 Xe2_LPM
[21:18:36] [PASSED] 30.00 Xe3_LPM
[21:18:36] [PASSED] 30.02 Xe3_LPM
[21:18:36] ================= [PASSED] check_media_ip ==================
[21:18:36] ================= check_platform_gt_count  =================
[21:18:36] [PASSED] 0x9A60 (TIGERLAKE)
[21:18:36] [PASSED] 0x9A68 (TIGERLAKE)
[21:18:36] [PASSED] 0x9A70 (TIGERLAKE)
[21:18:36] [PASSED] 0x9A40 (TIGERLAKE)
[21:18:36] [PASSED] 0x9A49 (TIGERLAKE)
[21:18:36] [PASSED] 0x9A59 (TIGERLAKE)
[21:18:36] [PASSED] 0x9A78 (TIGERLAKE)
[21:18:36] [PASSED] 0x9AC0 (TIGERLAKE)
[21:18:36] [PASSED] 0x9AC9 (TIGERLAKE)
[21:18:36] [PASSED] 0x9AD9 (TIGERLAKE)
[21:18:36] [PASSED] 0x9AF8 (TIGERLAKE)
[21:18:36] [PASSED] 0x4C80 (ROCKETLAKE)
[21:18:36] [PASSED] 0x4C8A (ROCKETLAKE)
[21:18:36] [PASSED] 0x4C8B (ROCKETLAKE)
[21:18:36] [PASSED] 0x4C8C (ROCKETLAKE)
[21:18:36] [PASSED] 0x4C90 (ROCKETLAKE)
[21:18:36] [PASSED] 0x4C9A (ROCKETLAKE)
[21:18:36] [PASSED] 0x4680 (ALDERLAKE_S)
[21:18:36] [PASSED] 0x4682 (ALDERLAKE_S)
[21:18:36] [PASSED] 0x4688 (ALDERLAKE_S)
[21:18:36] [PASSED] 0x468A (ALDERLAKE_S)
[21:18:36] [PASSED] 0x468B (ALDERLAKE_S)
[21:18:36] [PASSED] 0x4690 (ALDERLAKE_S)
[21:18:36] [PASSED] 0x4692 (ALDERLAKE_S)
[21:18:36] [PASSED] 0x4693 (ALDERLAKE_S)
[21:18:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46AA (ALDERLAKE_P)
[21:18:36] [PASSED] 0x462A (ALDERLAKE_P)
[21:18:36] [PASSED] 0x4626 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x4628 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:18:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:18:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:18:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:18:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:18:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:18:36] [PASSED] 0xA721 (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA720 (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:18:36] [PASSED] 0xA780 (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA781 (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA782 (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA783 (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA788 (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA789 (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA78A (ALDERLAKE_S)
[21:18:36] [PASSED] 0xA78B (ALDERLAKE_S)
[21:18:36] [PASSED] 0x4905 (DG1)
[21:18:36] [PASSED] 0x4906 (DG1)
[21:18:36] [PASSED] 0x4907 (DG1)
[21:18:36] [PASSED] 0x4908 (DG1)
[21:18:36] [PASSED] 0x4909 (DG1)
[21:18:36] [PASSED] 0x56C0 (DG2)
[21:18:36] [PASSED] 0x56C2 (DG2)
[21:18:36] [PASSED] 0x56C1 (DG2)
[21:18:36] [PASSED] 0x7D51 (METEORLAKE)
[21:18:36] [PASSED] 0x7DD1 (METEORLAKE)
[21:18:36] [PASSED] 0x7D41 (METEORLAKE)
[21:18:36] [PASSED] 0x7D67 (METEORLAKE)
[21:18:36] [PASSED] 0xB640 (METEORLAKE)
[21:18:36] [PASSED] 0x56A0 (DG2)
[21:18:36] [PASSED] 0x56A1 (DG2)
[21:18:36] [PASSED] 0x56A2 (DG2)
[21:18:36] [PASSED] 0x56BE (DG2)
[21:18:36] [PASSED] 0x56BF (DG2)
[21:18:36] [PASSED] 0x5690 (DG2)
[21:18:36] [PASSED] 0x5691 (DG2)
[21:18:36] [PASSED] 0x5692 (DG2)
[21:18:36] [PASSED] 0x56A5 (DG2)
[21:18:36] [PASSED] 0x56A6 (DG2)
[21:18:36] [PASSED] 0x56B0 (DG2)
[21:18:36] [PASSED] 0x56B1 (DG2)
[21:18:36] [PASSED] 0x56BA (DG2)
[21:18:36] [PASSED] 0x56BB (DG2)
[21:18:36] [PASSED] 0x56BC (DG2)
[21:18:36] [PASSED] 0x56BD (DG2)
[21:18:36] [PASSED] 0x5693 (DG2)
[21:18:36] [PASSED] 0x5694 (DG2)
[21:18:36] [PASSED] 0x5695 (DG2)
[21:18:36] [PASSED] 0x56A3 (DG2)
[21:18:36] [PASSED] 0x56A4 (DG2)
[21:18:36] [PASSED] 0x56B2 (DG2)
[21:18:36] [PASSED] 0x56B3 (DG2)
[21:18:36] [PASSED] 0x5696 (DG2)
[21:18:36] [PASSED] 0x5697 (DG2)
[21:18:36] [PASSED] 0xB69 (PVC)
[21:18:36] [PASSED] 0xB6E (PVC)
[21:18:36] [PASSED] 0xBD4 (PVC)
[21:18:36] [PASSED] 0xBD5 (PVC)
[21:18:36] [PASSED] 0xBD6 (PVC)
[21:18:36] [PASSED] 0xBD7 (PVC)
[21:18:36] [PASSED] 0xBD8 (PVC)
[21:18:36] [PASSED] 0xBD9 (PVC)
[21:18:36] [PASSED] 0xBDA (PVC)
[21:18:36] [PASSED] 0xBDB (PVC)
[21:18:36] [PASSED] 0xBE0 (PVC)
[21:18:36] [PASSED] 0xBE1 (PVC)
[21:18:36] [PASSED] 0xBE5 (PVC)
[21:18:36] [PASSED] 0x7D40 (METEORLAKE)
[21:18:36] [PASSED] 0x7D45 (METEORLAKE)
[21:18:36] [PASSED] 0x7D55 (METEORLAKE)
[21:18:36] [PASSED] 0x7D60 (METEORLAKE)
[21:18:36] [PASSED] 0x7DD5 (METEORLAKE)
[21:18:36] [PASSED] 0x6420 (LUNARLAKE)
[21:18:36] [PASSED] 0x64A0 (LUNARLAKE)
[21:18:36] [PASSED] 0x64B0 (LUNARLAKE)
[21:18:36] [PASSED] 0xE202 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE20B (BATTLEMAGE)
[21:18:36] [PASSED] 0xE20C (BATTLEMAGE)
[21:18:36] [PASSED] 0xE20D (BATTLEMAGE)
[21:18:36] [PASSED] 0xE210 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE211 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE212 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE216 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE220 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE221 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE222 (BATTLEMAGE)
[21:18:36] [PASSED] 0xE223 (BATTLEMAGE)
[21:18:36] [PASSED] 0xB080 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB081 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB082 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB083 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB084 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB085 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB086 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB087 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB08F (PANTHERLAKE)
[21:18:36] [PASSED] 0xB090 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:18:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:18:36] [PASSED] 0xFD80 (PANTHERLAKE)
[21:18:36] [PASSED] 0xFD81 (PANTHERLAKE)
[21:18:36] ============= [PASSED] check_platform_gt_count =============
[21:18:36] ===================== [PASSED] xe_pci ======================
[21:18:36] =================== xe_rtp (2 subtests) ====================
[21:18:36] =============== xe_rtp_process_to_sr_tests  ================
[21:18:36] [PASSED] coalesce-same-reg
[21:18:36] [PASSED] no-match-no-add
[21:18:36] [PASSED] match-or
[21:18:36] [PASSED] match-or-xfail
[21:18:36] [PASSED] no-match-no-add-multiple-rules
[21:18:36] [PASSED] two-regs-two-entries
[21:18:36] [PASSED] clr-one-set-other
[21:18:36] [PASSED] set-field
[21:18:36] [PASSED] conflict-duplicate
[21:18:36] [PASSED] conflict-not-disjoint
[21:18:36] [PASSED] conflict-reg-type
[21:18:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:18:36] ================== xe_rtp_process_tests  ===================
[21:18:36] [PASSED] active1
[21:18:36] [PASSED] active2
[21:18:36] [PASSED] active-inactive
[21:18:36] [PASSED] inactive-active
[21:18:36] [PASSED] inactive-1st_or_active-inactive
[21:18:36] [PASSED] inactive-2nd_or_active-inactive
[21:18:36] [PASSED] inactive-last_or_active-inactive
[21:18:36] [PASSED] inactive-no_or_active-inactive
[21:18:36] ============== [PASSED] xe_rtp_process_tests ===============
[21:18:36] ===================== [PASSED] xe_rtp ======================
[21:18:36] ==================== xe_wa (1 subtest) =====================
[21:18:36] ======================== xe_wa_gt  =========================
[21:18:36] [PASSED] TIGERLAKE (B0)
[21:18:36] [PASSED] DG1 (A0)
[21:18:36] [PASSED] DG1 (B0)
[21:18:36] [PASSED] ALDERLAKE_S (A0)
[21:18:36] [PASSED] ALDERLAKE_S (B0)
[21:18:36] [PASSED] ALDERLAKE_S (C0)
[21:18:36] [PASSED] ALDERLAKE_S (D0)
[21:18:36] [PASSED] ALDERLAKE_P (A0)
[21:18:36] [PASSED] ALDERLAKE_P (B0)
[21:18:36] [PASSED] ALDERLAKE_P (C0)
[21:18:36] [PASSED] ALDERLAKE_S_RPLS (D0)
[21:18:36] [PASSED] ALDERLAKE_P_RPLU (E0)
[21:18:36] [PASSED] DG2_G10 (C0)
[21:18:36] [PASSED] DG2_G11 (B1)
[21:18:36] [PASSED] DG2_G12 (A1)
[21:18:36] [PASSED] METEORLAKE (g:A0, m:A0)
[21:18:36] [PASSED] METEORLAKE (g:A0, m:A0)
[21:18:36] [PASSED] METEORLAKE (g:A0, m:A0)
[21:18:36] [PASSED] LUNARLAKE (g:A0, m:A0)
[21:18:36] [PASSED] LUNARLAKE (g:B0, m:A0)
[21:18:36] [PASSED] BATTLEMAGE (g:A0, m:A1)
stty: 'standard input': Inappropriate ioctl for device
[21:18:36] ==================== [PASSED] xe_wa_gt =====================
[21:18:36] ====================== [PASSED] xe_wa ======================
[21:18:36] ============================================================
[21:18:36] Testing complete. Ran 296 tests: passed: 280, skipped: 16
[21:18:36] Elapsed time: 32.099s total, 4.188s configuring, 27.545s building, 0.314s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:18:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:18:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:18:59] Starting KUnit Kernel (1/1)...
[21:18:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:18:59] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:18:59] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:18:59] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:18:59] =========== drm_validate_clone_mode (2 subtests) ===========
[21:18:59] ============== drm_test_check_in_clone_mode  ===============
[21:18:59] [PASSED] in_clone_mode
[21:18:59] [PASSED] not_in_clone_mode
[21:18:59] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:18:59] =============== drm_test_check_valid_clones  ===============
[21:18:59] [PASSED] not_in_clone_mode
[21:18:59] [PASSED] valid_clone
[21:18:59] [PASSED] invalid_clone
[21:18:59] =========== [PASSED] drm_test_check_valid_clones ===========
[21:18:59] ============= [PASSED] drm_validate_clone_mode =============
[21:18:59] ============= drm_validate_modeset (1 subtest) =============
[21:18:59] [PASSED] drm_test_check_connector_changed_modeset
[21:18:59] ============== [PASSED] drm_validate_modeset ===============
[21:18:59] ====== drm_test_bridge_get_current_state (2 subtests) ======
[21:18:59] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:18:59] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[21:18:59] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:18:59] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:18:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:18:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:18:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[21:18:59] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:18:59] ============== drm_bridge_alloc (2 subtests) ===============
[21:18:59] [PASSED] drm_test_drm_bridge_alloc_basic
[21:18:59] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:18:59] ================ [PASSED] drm_bridge_alloc =================
[21:18:59] ================== drm_buddy (7 subtests) ==================
[21:18:59] [PASSED] drm_test_buddy_alloc_limit
[21:18:59] [PASSED] drm_test_buddy_alloc_optimistic
[21:18:59] [PASSED] drm_test_buddy_alloc_pessimistic
[21:18:59] [PASSED] drm_test_buddy_alloc_pathological
[21:18:59] [PASSED] drm_test_buddy_alloc_contiguous
[21:18:59] [PASSED] drm_test_buddy_alloc_clear
[21:18:59] [PASSED] drm_test_buddy_alloc_range_bias
[21:18:59] ==================== [PASSED] drm_buddy ====================
[21:18:59] ============= drm_cmdline_parser (40 subtests) =============
[21:18:59] [PASSED] drm_test_cmdline_force_d_only
[21:18:59] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:18:59] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:18:59] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:18:59] [PASSED] drm_test_cmdline_force_e_only
[21:18:59] [PASSED] drm_test_cmdline_res
[21:18:59] [PASSED] drm_test_cmdline_res_vesa
[21:18:59] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:18:59] [PASSED] drm_test_cmdline_res_rblank
[21:18:59] [PASSED] drm_test_cmdline_res_bpp
[21:18:59] [PASSED] drm_test_cmdline_res_refresh
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:18:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:18:59] [PASSED] drm_test_cmdline_res_margins_force_on
[21:18:59] [PASSED] drm_test_cmdline_res_vesa_margins
[21:18:59] [PASSED] drm_test_cmdline_name
[21:18:59] [PASSED] drm_test_cmdline_name_bpp
[21:18:59] [PASSED] drm_test_cmdline_name_option
[21:18:59] [PASSED] drm_test_cmdline_name_bpp_option
[21:18:59] [PASSED] drm_test_cmdline_rotate_0
[21:18:59] [PASSED] drm_test_cmdline_rotate_90
[21:18:59] [PASSED] drm_test_cmdline_rotate_180
[21:18:59] [PASSED] drm_test_cmdline_rotate_270
[21:18:59] [PASSED] drm_test_cmdline_hmirror
[21:18:59] [PASSED] drm_test_cmdline_vmirror
[21:18:59] [PASSED] drm_test_cmdline_margin_options
[21:18:59] [PASSED] drm_test_cmdline_multiple_options
[21:18:59] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:18:59] [PASSED] drm_test_cmdline_extra_and_option
[21:18:59] [PASSED] drm_test_cmdline_freestanding_options
[21:18:59] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:18:59] [PASSED] drm_test_cmdline_panel_orientation
[21:18:59] ================ drm_test_cmdline_invalid  =================
[21:18:59] [PASSED] margin_only
[21:18:59] [PASSED] interlace_only
[21:18:59] [PASSED] res_missing_x
[21:18:59] [PASSED] res_missing_y
[21:18:59] [PASSED] res_bad_y
[21:18:59] [PASSED] res_missing_y_bpp
[21:18:59] [PASSED] res_bad_bpp
[21:18:59] [PASSED] res_bad_refresh
[21:18:59] [PASSED] res_bpp_refresh_force_on_off
[21:18:59] [PASSED] res_invalid_mode
[21:18:59] [PASSED] res_bpp_wrong_place_mode
[21:18:59] [PASSED] name_bpp_refresh
[21:18:59] [PASSED] name_refresh
[21:18:59] [PASSED] name_refresh_wrong_mode
[21:18:59] [PASSED] name_refresh_invalid_mode
[21:18:59] [PASSED] rotate_multiple
[21:18:59] [PASSED] rotate_invalid_val
[21:18:59] [PASSED] rotate_truncated
[21:18:59] [PASSED] invalid_option
[21:18:59] [PASSED] invalid_tv_option
[21:18:59] [PASSED] truncated_tv_option
[21:18:59] ============ [PASSED] drm_test_cmdline_invalid =============
[21:18:59] =============== drm_test_cmdline_tv_options  ===============
[21:18:59] [PASSED] NTSC
[21:18:59] [PASSED] NTSC_443
[21:18:59] [PASSED] NTSC_J
[21:18:59] [PASSED] PAL
[21:18:59] [PASSED] PAL_M
[21:18:59] [PASSED] PAL_N
[21:18:59] [PASSED] SECAM
[21:18:59] [PASSED] MONO_525
[21:18:59] [PASSED] MONO_625
[21:18:59] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:18:59] =============== [PASSED] drm_cmdline_parser ================
[21:18:59] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:18:59] [PASSED] drm_test_connector_hdmi_init_valid
[21:18:59] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:18:59] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:18:59] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:18:59] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:18:59] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:18:59] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:18:59] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:18:59] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[21:18:59] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:18:59] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:18:59] [PASSED] supported_formats=0x3 yuv420_allowed=1
[21:18:59] [PASSED] supported_formats=0x3 yuv420_allowed=0
[21:18:59] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:18:59] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:18:59] [PASSED] drm_test_connector_hdmi_init_null_product
[21:18:59] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:18:59] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:18:59] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:18:59] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:18:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:18:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:18:59] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:18:59] ========= drm_test_connector_hdmi_init_type_valid  =========
[21:18:59] [PASSED] HDMI-A
[21:18:59] [PASSED] HDMI-B
[21:18:59] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:18:59] ======== drm_test_connector_hdmi_init_type_invalid  ========
[21:18:59] [PASSED] Unknown
[21:18:59] [PASSED] VGA
[21:18:59] [PASSED] DVI-I
[21:18:59] [PASSED] DVI-D
[21:18:59] [PASSED] DVI-A
[21:18:59] [PASSED] Composite
[21:18:59] [PASSED] SVIDEO
[21:18:59] [PASSED] LVDS
[21:18:59] [PASSED] Component
[21:18:59] [PASSED] DIN
[21:18:59] [PASSED] DP
[21:18:59] [PASSED] TV
[21:18:59] [PASSED] eDP
[21:18:59] [PASSED] Virtual
[21:18:59] [PASSED] DSI
[21:18:59] [PASSED] DPI
[21:18:59] [PASSED] Writeback
[21:18:59] [PASSED] SPI
[21:18:59] [PASSED] USB
[21:18:59] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:18:59] ============ [PASSED] drmm_connector_hdmi_init =============
[21:18:59] ============= drmm_connector_init (3 subtests) =============
[21:18:59] [PASSED] drm_test_drmm_connector_init
[21:18:59] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:18:59] ========= drm_test_drmm_connector_init_type_valid  =========
[21:18:59] [PASSED] Unknown
[21:18:59] [PASSED] VGA
[21:18:59] [PASSED] DVI-I
[21:18:59] [PASSED] DVI-D
[21:18:59] [PASSED] DVI-A
[21:18:59] [PASSED] Composite
[21:18:59] [PASSED] SVIDEO
[21:18:59] [PASSED] LVDS
[21:18:59] [PASSED] Component
[21:18:59] [PASSED] DIN
[21:18:59] [PASSED] DP
[21:18:59] [PASSED] HDMI-A
[21:18:59] [PASSED] HDMI-B
[21:18:59] [PASSED] TV
[21:18:59] [PASSED] eDP
[21:18:59] [PASSED] Virtual
[21:18:59] [PASSED] DSI
[21:18:59] [PASSED] DPI
[21:18:59] [PASSED] Writeback
[21:18:59] [PASSED] SPI
[21:18:59] [PASSED] USB
[21:18:59] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:18:59] =============== [PASSED] drmm_connector_init ===============
[21:18:59] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_init
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:18:59] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[21:18:59] [PASSED] Unknown
[21:18:59] [PASSED] VGA
[21:18:59] [PASSED] DVI-I
[21:18:59] [PASSED] DVI-D
[21:18:59] [PASSED] DVI-A
[21:18:59] [PASSED] Composite
[21:18:59] [PASSED] SVIDEO
[21:18:59] [PASSED] LVDS
[21:18:59] [PASSED] Component
[21:18:59] [PASSED] DIN
[21:18:59] [PASSED] DP
[21:18:59] [PASSED] HDMI-A
[21:18:59] [PASSED] HDMI-B
[21:18:59] [PASSED] TV
[21:18:59] [PASSED] eDP
[21:18:59] [PASSED] Virtual
[21:18:59] [PASSED] DSI
[21:18:59] [PASSED] DPI
[21:18:59] [PASSED] Writeback
[21:18:59] [PASSED] SPI
[21:18:59] [PASSED] USB
[21:18:59] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:18:59] ======== drm_test_drm_connector_dynamic_init_name  =========
[21:18:59] [PASSED] Unknown
[21:18:59] [PASSED] VGA
[21:18:59] [PASSED] DVI-I
[21:18:59] [PASSED] DVI-D
[21:18:59] [PASSED] DVI-A
[21:18:59] [PASSED] Composite
[21:18:59] [PASSED] SVIDEO
[21:18:59] [PASSED] LVDS
[21:18:59] [PASSED] Component
[21:18:59] [PASSED] DIN
[21:18:59] [PASSED] DP
[21:18:59] [PASSED] HDMI-A
[21:18:59] [PASSED] HDMI-B
[21:18:59] [PASSED] TV
[21:18:59] [PASSED] eDP
[21:18:59] [PASSED] Virtual
[21:18:59] [PASSED] DSI
[21:18:59] [PASSED] DPI
[21:18:59] [PASSED] Writeback
[21:18:59] [PASSED] SPI
[21:18:59] [PASSED] USB
[21:18:59] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:18:59] =========== [PASSED] drm_connector_dynamic_init ============
[21:18:59] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:18:59] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:18:59] ======= drm_connector_dynamic_register (7 subtests) ========
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:18:59] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:18:59] ========= [PASSED] drm_connector_dynamic_register ==========
[21:18:59] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:18:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:18:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:18:59] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:18:59] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:18:59] ========== drm_test_get_tv_mode_from_name_valid  ===========
[21:18:59] [PASSED] NTSC
[21:18:59] [PASSED] NTSC-443
[21:18:59] [PASSED] NTSC-J
[21:18:59] [PASSED] PAL
[21:18:59] [PASSED] PAL-M
[21:18:59] [PASSED] PAL-N
[21:18:59] [PASSED] SECAM
[21:18:59] [PASSED] Mono
[21:18:59] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:18:59] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:18:59] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:18:59] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:18:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:18:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:18:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:18:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:18:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:18:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:18:59] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[21:18:59] [PASSED] VIC 96
[21:18:59] [PASSED] VIC 97
[21:18:59] [PASSED] VIC 101
[21:18:59] [PASSED] VIC 102
[21:18:59] [PASSED] VIC 106
[21:18:59] [PASSED] VIC 107
[21:18:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:18:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:18:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:18:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:18:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:18:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:18:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:18:59] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:18:59] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[21:18:59] [PASSED] Automatic
[21:18:59] [PASSED] Full
[21:18:59] [PASSED] Limited 16:235
[21:18:59] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:18:59] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:18:59] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:18:59] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:18:59] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[21:18:59] [PASSED] RGB
[21:18:59] [PASSED] YUV 4:2:0
[21:18:59] [PASSED] YUV 4:2:2
[21:18:59] [PASSED] YUV 4:4:4
[21:18:59] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:18:59] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:18:59] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:18:59] ============= drm_damage_helper (21 subtests) ==============
[21:18:59] [PASSED] drm_test_damage_iter_no_damage
[21:18:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:18:59] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:18:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:18:59] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:18:59] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:18:59] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:18:59] [PASSED] drm_test_damage_iter_simple_damage
[21:18:59] [PASSED] drm_test_damage_iter_single_damage
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:18:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:18:59] [PASSED] drm_test_damage_iter_damage
[21:18:59] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:18:59] [PASSED] drm_test_damage_iter_damage_one_outside
[21:18:59] [PASSED] drm_test_damage_iter_damage_src_moved
[21:18:59] [PASSED] drm_test_damage_iter_damage_not_visible
[21:18:59] ================ [PASSED] drm_damage_helper ================
[21:18:59] ============== drm_dp_mst_helper (3 subtests) ==============
[21:18:59] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[21:18:59] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:18:59] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:18:59] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:18:59] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:18:59] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:18:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:18:59] ============== drm_test_dp_mst_calc_pbn_div  ===============
[21:18:59] [PASSED] Link rate 2000000 lane count 4
[21:18:59] [PASSED] Link rate 2000000 lane count 2
[21:18:59] [PASSED] Link rate 2000000 lane count 1
[21:18:59] [PASSED] Link rate 1350000 lane count 4
[21:18:59] [PASSED] Link rate 1350000 lane count 2
[21:18:59] [PASSED] Link rate 1350000 lane count 1
[21:18:59] [PASSED] Link rate 1000000 lane count 4
[21:18:59] [PASSED] Link rate 1000000 lane count 2
[21:18:59] [PASSED] Link rate 1000000 lane count 1
[21:18:59] [PASSED] Link rate 810000 lane count 4
[21:18:59] [PASSED] Link rate 810000 lane count 2
[21:18:59] [PASSED] Link rate 810000 lane count 1
[21:18:59] [PASSED] Link rate 540000 lane count 4
[21:18:59] [PASSED] Link rate 540000 lane count 2
[21:18:59] [PASSED] Link rate 540000 lane count 1
[21:18:59] [PASSED] Link rate 270000 lane count 4
[21:18:59] [PASSED] Link rate 270000 lane count 2
[21:18:59] [PASSED] Link rate 270000 lane count 1
[21:18:59] [PASSED] Link rate 162000 lane count 4
[21:18:59] [PASSED] Link rate 162000 lane count 2
[21:18:59] [PASSED] Link rate 162000 lane count 1
[21:18:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:18:59] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[21:18:59] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:18:59] [PASSED] DP_POWER_UP_PHY with port number
[21:18:59] [PASSED] DP_POWER_DOWN_PHY with port number
[21:18:59] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:18:59] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:18:59] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:18:59] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:18:59] [PASSED] DP_QUERY_PAYLOAD with port number
[21:18:59] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:18:59] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:18:59] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:18:59] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:18:59] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:18:59] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:18:59] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:18:59] [PASSED] DP_REMOTE_I2C_READ with port number
[21:18:59] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:18:59] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:18:59] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:18:59] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:18:59] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:18:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:18:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:18:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:18:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:18:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:18:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:18:59] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:18:59] ================ [PASSED] drm_dp_mst_helper ================
[21:18:59] ================== drm_exec (7 subtests) ===================
[21:18:59] [PASSED] sanitycheck
[21:18:59] [PASSED] test_lock
[21:18:59] [PASSED] test_lock_unlock
[21:18:59] [PASSED] test_duplicates
[21:18:59] [PASSED] test_prepare
[21:18:59] [PASSED] test_prepare_array
[21:18:59] [PASSED] test_multiple_loops
[21:18:59] ==================== [PASSED] drm_exec =====================
[21:18:59] =========== drm_format_helper_test (17 subtests) ===========
[21:18:59] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:18:59] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:18:59] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:18:59] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:18:59] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:18:59] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:18:59] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:18:59] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:18:59] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:18:59] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:18:59] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:18:59] ============== drm_test_fb_xrgb8888_to_mono  ===============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:18:59] ==================== drm_test_fb_swab  =====================
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ================ [PASSED] drm_test_fb_swab =================
[21:18:59] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:18:59] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[21:18:59] [PASSED] single_pixel_source_buffer
[21:18:59] [PASSED] single_pixel_clip_rectangle
[21:18:59] [PASSED] well_known_colors
[21:18:59] [PASSED] destination_pitch
[21:18:59] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:18:59] ================= drm_test_fb_clip_offset  =================
[21:18:59] [PASSED] pass through
[21:18:59] [PASSED] horizontal offset
[21:18:59] [PASSED] vertical offset
[21:18:59] [PASSED] horizontal and vertical offset
[21:18:59] [PASSED] horizontal offset (custom pitch)
[21:18:59] [PASSED] vertical offset (custom pitch)
[21:18:59] [PASSED] horizontal and vertical offset (custom pitch)
[21:18:59] ============= [PASSED] drm_test_fb_clip_offset =============
[21:18:59] =================== drm_test_fb_memcpy  ====================
[21:18:59] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:18:59] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:18:59] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:18:59] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:18:59] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:18:59] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:18:59] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:18:59] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:18:59] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:18:59] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:18:59] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:18:59] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:18:59] =============== [PASSED] drm_test_fb_memcpy ================
[21:18:59] ============= [PASSED] drm_format_helper_test ==============
[21:18:59] ================= drm_format (18 subtests) =================
[21:18:59] [PASSED] drm_test_format_block_width_invalid
[21:18:59] [PASSED] drm_test_format_block_width_one_plane
[21:18:59] [PASSED] drm_test_format_block_width_two_plane
[21:18:59] [PASSED] drm_test_format_block_width_three_plane
[21:18:59] [PASSED] drm_test_format_block_width_tiled
[21:18:59] [PASSED] drm_test_format_block_height_invalid
[21:18:59] [PASSED] drm_test_format_block_height_one_plane
[21:18:59] [PASSED] drm_test_format_block_height_two_plane
[21:18:59] [PASSED] drm_test_format_block_height_three_plane
[21:18:59] [PASSED] drm_test_format_block_height_tiled
[21:18:59] [PASSED] drm_test_format_min_pitch_invalid
[21:18:59] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:18:59] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:18:59] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:18:59] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:18:59] [PASSED] drm_test_format_min_pitch_two_plane
[21:18:59] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:18:59] [PASSED] drm_test_format_min_pitch_tiled
[21:18:59] =================== [PASSED] drm_format ====================
[21:18:59] ============== drm_framebuffer (10 subtests) ===============
[21:18:59] ========== drm_test_framebuffer_check_src_coords  ==========
[21:18:59] [PASSED] Success: source fits into fb
[21:18:59] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:18:59] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:18:59] [PASSED] Fail: overflowing fb with source width
[21:18:59] [PASSED] Fail: overflowing fb with source height
[21:18:59] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:18:59] [PASSED] drm_test_framebuffer_cleanup
[21:18:59] =============== drm_test_framebuffer_create  ===============
[21:18:59] [PASSED] ABGR8888 normal sizes
[21:18:59] [PASSED] ABGR8888 max sizes
[21:18:59] [PASSED] ABGR8888 pitch greater than min required
[21:18:59] [PASSED] ABGR8888 pitch less than min required
[21:18:59] [PASSED] ABGR8888 Invalid width
[21:18:59] [PASSED] ABGR8888 Invalid buffer handle
[21:18:59] [PASSED] No pixel format
[21:18:59] [PASSED] ABGR8888 Width 0
[21:18:59] [PASSED] ABGR8888 Height 0
[21:18:59] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:18:59] [PASSED] ABGR8888 Large buffer offset
[21:18:59] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:18:59] [PASSED] ABGR8888 Invalid flag
[21:18:59] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:18:59] [PASSED] ABGR8888 Valid buffer modifier
[21:18:59] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:18:59] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] NV12 Normal sizes
[21:18:59] [PASSED] NV12 Max sizes
[21:18:59] [PASSED] NV12 Invalid pitch
[21:18:59] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:18:59] [PASSED] NV12 different  modifier per-plane
[21:18:59] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:18:59] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] NV12 Modifier for inexistent plane
[21:18:59] [PASSED] NV12 Handle for inexistent plane
[21:18:59] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:18:59] [PASSED] YVU420 Normal sizes
[21:18:59] [PASSED] YVU420 Max sizes
[21:18:59] [PASSED] YVU420 Invalid pitch
[21:18:59] [PASSED] YVU420 Different pitches
[21:18:59] [PASSED] YVU420 Different buffer offsets/pitches
[21:18:59] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:18:59] [PASSED] YVU420 Valid modifier
[21:18:59] [PASSED] YVU420 Different modifiers per plane
[21:18:59] [PASSED] YVU420 Modifier for inexistent plane
[21:18:59] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:18:59] [PASSED] X0L2 Normal sizes
[21:18:59] [PASSED] X0L2 Max sizes
[21:18:59] [PASSED] X0L2 Invalid pitch
[21:18:59] [PASSED] X0L2 Pitch greater than minimum required
[21:18:59] [PASSED] X0L2 Handle for inexistent plane
[21:18:59] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:18:59] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:18:59] [PASSED] X0L2 Valid modifier
[21:18:59] [PASSED] X0L2 Modifier for inexistent plane
[21:18:59] =========== [PASSED] drm_test_framebuffer_create ===========
[21:18:59] [PASSED] drm_test_framebuffer_free
[21:18:59] [PASSED] drm_test_framebuffer_init
[21:18:59] [PASSED] drm_test_framebuffer_init_bad_format
[21:18:59] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:18:59] [PASSED] drm_test_framebuffer_lookup
[21:18:59] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:18:59] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:18:59] ================= [PASSED] drm_framebuffer =================
[21:18:59] ================ drm_gem_shmem (8 subtests) ================
[21:18:59] [PASSED] drm_gem_shmem_test_obj_create
[21:18:59] [PASSED] drm_gem_shmem_test_obj_create_private
[21:18:59] [PASSED] drm_gem_shmem_test_pin_pages
[21:18:59] [PASSED] drm_gem_shmem_test_vmap
[21:18:59] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:18:59] [PASSED] drm_gem_shmem_test_get_sg_table
[21:18:59] [PASSED] drm_gem_shmem_test_madvise
[21:18:59] [PASSED] drm_gem_shmem_test_purge
[21:18:59] ================== [PASSED] drm_gem_shmem ==================
[21:18:59] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:18:59] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[21:18:59] [PASSED] Automatic
[21:18:59] [PASSED] Full
[21:18:59] [PASSED] Limited 16:235
[21:18:59] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:18:59] [PASSED] drm_test_check_disable_connector
[21:18:59] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:18:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:18:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:18:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:18:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:18:59] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:18:59] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:18:59] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:18:59] [PASSED] drm_test_check_output_bpc_dvi
[21:18:59] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:18:59] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:18:59] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:18:59] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:18:59] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:18:59] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:18:59] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:18:59] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:18:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:18:59] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:18:59] [PASSED] drm_test_check_broadcast_rgb_value
[21:18:59] [PASSED] drm_test_check_bpc_8_value
[21:18:59] [PASSED] drm_test_check_bpc_10_value
[21:18:59] [PASSED] drm_test_check_bpc_12_value
[21:18:59] [PASSED] drm_test_check_format_value
[21:18:59] [PASSED] drm_test_check_tmds_char_value
[21:18:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:18:59] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[21:18:59] [PASSED] drm_test_check_mode_valid
[21:18:59] [PASSED] drm_test_check_mode_valid_reject
[21:18:59] [PASSED] drm_test_check_mode_valid_reject_rate
[21:18:59] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:18:59] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:18:59] ================= drm_managed (2 subtests) =================
[21:18:59] [PASSED] drm_test_managed_release_action
[21:18:59] [PASSED] drm_test_managed_run_action
[21:18:59] =================== [PASSED] drm_managed ===================
[21:18:59] =================== drm_mm (6 subtests) ====================
[21:18:59] [PASSED] drm_test_mm_init
[21:18:59] [PASSED] drm_test_mm_debug
[21:18:59] [PASSED] drm_test_mm_align32
[21:18:59] [PASSED] drm_test_mm_align64
[21:18:59] [PASSED] drm_test_mm_lowest
[21:18:59] [PASSED] drm_test_mm_highest
[21:18:59] ===================== [PASSED] drm_mm ======================
[21:18:59] ============= drm_modes_analog_tv (5 subtests) =============
[21:18:59] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:18:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:18:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:18:59] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:18:59] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:18:59] =============== [PASSED] drm_modes_analog_tv ===============
[21:18:59] ============== drm_plane_helper (2 subtests) ===============
[21:18:59] =============== drm_test_check_plane_state  ================
[21:18:59] [PASSED] clipping_simple
[21:18:59] [PASSED] clipping_rotate_reflect
[21:18:59] [PASSED] positioning_simple
[21:18:59] [PASSED] upscaling
[21:18:59] [PASSED] downscaling
[21:18:59] [PASSED] rounding1
[21:18:59] [PASSED] rounding2
[21:18:59] [PASSED] rounding3
[21:18:59] [PASSED] rounding4
[21:18:59] =========== [PASSED] drm_test_check_plane_state ============
[21:18:59] =========== drm_test_check_invalid_plane_state  ============
[21:18:59] [PASSED] positioning_invalid
[21:18:59] [PASSED] upscaling_invalid
[21:18:59] [PASSED] downscaling_invalid
[21:18:59] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:18:59] ================ [PASSED] drm_plane_helper =================
[21:18:59] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:18:59] ====== drm_test_connector_helper_tv_get_modes_check  =======
[21:18:59] [PASSED] None
[21:18:59] [PASSED] PAL
[21:18:59] [PASSED] NTSC
[21:18:59] [PASSED] Both, NTSC Default
[21:18:59] [PASSED] Both, PAL Default
[21:18:59] [PASSED] Both, NTSC Default, with PAL on command-line
[21:18:59] [PASSED] Both, PAL Default, with NTSC on command-line
[21:18:59] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:18:59] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:18:59] ================== drm_rect (9 subtests) ===================
[21:18:59] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:18:59] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:18:59] [PASSED] drm_test_rect_clip_scaled_clipped
[21:18:59] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:18:59] ================= drm_test_rect_intersect  =================
[21:18:59] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:18:59] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:18:59] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:18:59] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:18:59] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:18:59] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:18:59] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:18:59] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:18:59] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:18:59] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:18:59] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:18:59] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:18:59] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:18:59] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:18:59] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:18:59] ============= [PASSED] drm_test_rect_intersect =============
[21:18:59] ================ drm_test_rect_calc_hscale  ================
[21:18:59] [PASSED] normal use
[21:18:59] [PASSED] out of max range
[21:18:59] [PASSED] out of min range
[21:18:59] [PASSED] zero dst
[21:18:59] [PASSED] negative src
[21:18:59] [PASSED] negative dst
[21:18:59] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:18:59] ================ drm_test_rect_calc_vscale  ================
[21:18:59] [PASSED] normal use
[21:18:59] [PASSED] out of max range
[21:18:59] [PASSED] out of min range
[21:18:59] [PASSED] zero dst
[21:18:59] [PASSED] negative src
[21:18:59] [PASSED] negative dst
[21:18:59] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:18:59] ================== drm_test_rect_rotate  ===================
[21:18:59] [PASSED] reflect-x
[21:18:59] [PASSED] reflect-y
[21:18:59] [PASSED] rotate-0
[21:18:59] [PASSED] rotate-90
[21:18:59] [PASSED] rotate-180
[21:18:59] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[21:18:59] ============== [PASSED] drm_test_rect_rotate ===============
[21:18:59] ================ drm_test_rect_rotate_inv  =================
[21:18:59] [PASSED] reflect-x
[21:18:59] [PASSED] reflect-y
[21:18:59] [PASSED] rotate-0
[21:18:59] [PASSED] rotate-90
[21:18:59] [PASSED] rotate-180
[21:18:59] [PASSED] rotate-270
[21:18:59] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:18:59] ==================== [PASSED] drm_rect =====================
[21:18:59] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:18:59] ============ drm_test_sysfb_build_fourcc_list  =============
[21:18:59] [PASSED] no native formats
[21:18:59] [PASSED] XRGB8888 as native format
[21:18:59] [PASSED] remove duplicates
[21:18:59] [PASSED] convert alpha formats
[21:18:59] [PASSED] random formats
[21:18:59] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:18:59] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:18:59] ============================================================
[21:18:59] Testing complete. Ran 616 tests: passed: 616
[21:18:59] Elapsed time: 23.571s total, 1.672s configuring, 21.677s building, 0.193s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:18:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:19:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:19:09] Starting KUnit Kernel (1/1)...
[21:19:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:19:09] ================= ttm_device (5 subtests) ==================
[21:19:09] [PASSED] ttm_device_init_basic
[21:19:09] [PASSED] ttm_device_init_multiple
[21:19:09] [PASSED] ttm_device_fini_basic
[21:19:09] [PASSED] ttm_device_init_no_vma_man
[21:19:09] ================== ttm_device_init_pools  ==================
[21:19:09] [PASSED] No DMA allocations, no DMA32 required
[21:19:09] [PASSED] DMA allocations, DMA32 required
[21:19:09] [PASSED] No DMA allocations, DMA32 required
[21:19:09] [PASSED] DMA allocations, no DMA32 required
[21:19:09] ============== [PASSED] ttm_device_init_pools ==============
[21:19:09] =================== [PASSED] ttm_device ====================
[21:19:09] ================== ttm_pool (8 subtests) ===================
[21:19:09] ================== ttm_pool_alloc_basic  ===================
[21:19:09] [PASSED] One page
[21:19:09] [PASSED] More than one page
[21:19:09] [PASSED] Above the allocation limit
[21:19:09] [PASSED] One page, with coherent DMA mappings enabled
[21:19:09] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:19:09] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:19:09] ============== ttm_pool_alloc_basic_dma_addr  ==============
[21:19:09] [PASSED] One page
[21:19:09] [PASSED] More than one page
[21:19:09] [PASSED] Above the allocation limit
[21:19:09] [PASSED] One page, with coherent DMA mappings enabled
[21:19:09] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:19:09] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:19:09] [PASSED] ttm_pool_alloc_order_caching_match
[21:19:09] [PASSED] ttm_pool_alloc_caching_mismatch
[21:19:09] [PASSED] ttm_pool_alloc_order_mismatch
[21:19:09] [PASSED] ttm_pool_free_dma_alloc
[21:19:09] [PASSED] ttm_pool_free_no_dma_alloc
[21:19:09] [PASSED] ttm_pool_fini_basic
[21:19:09] ==================== [PASSED] ttm_pool =====================
[21:19:09] ================ ttm_resource (8 subtests) =================
[21:19:09] ================= ttm_resource_init_basic  =================
[21:19:09] [PASSED] Init resource in TTM_PL_SYSTEM
[21:19:09] [PASSED] Init resource in TTM_PL_VRAM
[21:19:09] [PASSED] Init resource in a private placement
[21:19:09] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:19:09] ============= [PASSED] ttm_resource_init_basic =============
[21:19:09] [PASSED] ttm_resource_init_pinned
[21:19:09] [PASSED] ttm_resource_fini_basic
[21:19:09] [PASSED] ttm_resource_manager_init_basic
[21:19:09] [PASSED] ttm_resource_manager_usage_basic
[21:19:09] [PASSED] ttm_resource_manager_set_used_basic
[21:19:09] [PASSED] ttm_sys_man_alloc_basic
[21:19:09] [PASSED] ttm_sys_man_free_basic
[21:19:09] ================== [PASSED] ttm_resource ===================
[21:19:09] =================== ttm_tt (15 subtests) ===================
[21:19:09] ==================== ttm_tt_init_basic  ====================
[21:19:09] [PASSED] Page-aligned size
[21:19:09] [PASSED] Extra pages requested
[21:19:09] ================ [PASSED] ttm_tt_init_basic ================
[21:19:09] [PASSED] ttm_tt_init_misaligned
[21:19:09] [PASSED] ttm_tt_fini_basic
[21:19:09] [PASSED] ttm_tt_fini_sg
[21:19:09] [PASSED] ttm_tt_fini_shmem
[21:19:09] [PASSED] ttm_tt_create_basic
[21:19:09] [PASSED] ttm_tt_create_invalid_bo_type
[21:19:09] [PASSED] ttm_tt_create_ttm_exists
[21:19:09] [PASSED] ttm_tt_create_failed
[21:19:09] [PASSED] ttm_tt_destroy_basic
[21:19:09] [PASSED] ttm_tt_populate_null_ttm
[21:19:09] [PASSED] ttm_tt_populate_populated_ttm
[21:19:09] [PASSED] ttm_tt_unpopulate_basic
[21:19:09] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:19:09] [PASSED] ttm_tt_swapin_basic
[21:19:09] ===================== [PASSED] ttm_tt ======================
[21:19:09] =================== ttm_bo (14 subtests) ===================
[21:19:09] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[21:19:09] [PASSED] Cannot be interrupted and sleeps
[21:19:09] [PASSED] Cannot be interrupted, locks straight away
[21:19:09] [PASSED] Can be interrupted, sleeps
[21:19:09] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:19:09] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:19:09] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:19:09] [PASSED] ttm_bo_reserve_double_resv
[21:19:09] [PASSED] ttm_bo_reserve_interrupted
[21:19:09] [PASSED] ttm_bo_reserve_deadlock
[21:19:09] [PASSED] ttm_bo_unreserve_basic
[21:19:09] [PASSED] ttm_bo_unreserve_pinned
[21:19:09] [PASSED] ttm_bo_unreserve_bulk
[21:19:09] [PASSED] ttm_bo_put_basic
[21:19:09] [PASSED] ttm_bo_put_shared_resv
[21:19:09] [PASSED] ttm_bo_pin_basic
[21:19:09] [PASSED] ttm_bo_pin_unpin_resource
[21:19:09] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:19:09] ===================== [PASSED] ttm_bo ======================
[21:19:09] ============== ttm_bo_validate (22 subtests) ===============
[21:19:09] ============== ttm_bo_init_reserved_sys_man  ===============
[21:19:09] [PASSED] Buffer object for userspace
[21:19:09] [PASSED] Kernel buffer object
[21:19:09] [PASSED] Shared buffer object
[21:19:09] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:19:09] ============== ttm_bo_init_reserved_mock_man  ==============
[21:19:09] [PASSED] Buffer object for userspace
[21:19:09] [PASSED] Kernel buffer object
[21:19:09] [PASSED] Shared buffer object
[21:19:09] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:19:09] [PASSED] ttm_bo_init_reserved_resv
[21:19:09] ================== ttm_bo_validate_basic  ==================
[21:19:09] [PASSED] Buffer object for userspace
[21:19:09] [PASSED] Kernel buffer object
[21:19:09] [PASSED] Shared buffer object
[21:19:09] ============== [PASSED] ttm_bo_validate_basic ==============
[21:19:09] [PASSED] ttm_bo_validate_invalid_placement
[21:19:09] ============= ttm_bo_validate_same_placement  ==============
[21:19:09] [PASSED] System manager
[21:19:09] [PASSED] VRAM manager
[21:19:09] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:19:09] [PASSED] ttm_bo_validate_failed_alloc
[21:19:09] [PASSED] ttm_bo_validate_pinned
[21:19:09] [PASSED] ttm_bo_validate_busy_placement
[21:19:09] ================ ttm_bo_validate_multihop  =================
[21:19:09] [PASSED] Buffer object for userspace
[21:19:09] [PASSED] Kernel buffer object
[21:19:09] [PASSED] Shared buffer object
[21:19:09] ============ [PASSED] ttm_bo_validate_multihop =============
[21:19:09] ========== ttm_bo_validate_no_placement_signaled  ==========
[21:19:09] [PASSED] Buffer object in system domain, no page vector
[21:19:09] [PASSED] Buffer object in system domain with an existing page vector
[21:19:09] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:19:09] ======== ttm_bo_validate_no_placement_not_signaled  ========
[21:19:09] [PASSED] Buffer object for userspace
[21:19:09] [PASSED] Kernel buffer object
[21:19:09] [PASSED] Shared buffer object
[21:19:09] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:19:09] [PASSED] ttm_bo_validate_move_fence_signaled
[21:19:09] ========= ttm_bo_validate_move_fence_not_signaled  =========
[21:19:09] [PASSED] Waits for GPU
[21:19:09] [PASSED] Tries to lock straight away
[21:19:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:19:10] [PASSED] ttm_bo_validate_swapout
[21:19:10] [PASSED] ttm_bo_validate_happy_evict
[21:19:10] [PASSED] ttm_bo_validate_all_pinned_evict
[21:19:10] [PASSED] ttm_bo_validate_allowed_only_evict
[21:19:10] [PASSED] ttm_bo_validate_deleted_evict
[21:19:10] [PASSED] ttm_bo_validate_busy_domain_evict
[21:19:10] [PASSED] ttm_bo_validate_evict_gutting
[21:19:10] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[21:19:10] ================= [PASSED] ttm_bo_validate =================
[21:19:10] ============================================================
[21:19:10] Testing complete. Ran 102 tests: passed: 102
[21:19:10] Elapsed time: 10.154s total, 1.649s configuring, 7.889s building, 0.521s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Crashlog Type1 Version2 support (rev6)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1452 bytes --]

== Series Details ==

Series: Crashlog Type1 Version2 support (rev6)
URL   : https://patchwork.freedesktop.org/series/149120/
State : success

== Summary ==

CI Bug Log - changes from xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac_BAT -> xe-pw-149120v6_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 8)
------------------------------

  Missing    (1): bat-adlp-vm 

Known issues
------------

  Here are the changes found in xe-pw-149120v6_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-modeset:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +1 other test dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/bat-adlp-7/igt@kms_flip@basic-flip-vs-modeset.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/bat-adlp-7/igt@kms_flip@basic-flip-vs-modeset.html

  
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543


Build changes
-------------

  * Linux: xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac -> xe-pw-149120v6

  IGT_8438: 8438
  xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac: 05fd9cf9ba87dcf4428adbca5237845f2c04d8ac
  xe-pw-149120v6: 149120v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/index.html

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✓ Xe.CI.Full: success for Crashlog Type1 Version2 support (rev6)

[Patchwork]

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== Series Details ==

Series: Crashlog Type1 Version2 support (rev6)
URL   : https://patchwork.freedesktop.org/series/149120/
State : success

== Summary ==

CI Bug Log - changes from xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac_FULL -> xe-pw-149120v6_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-149120v6_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
    - shard-adlp:         [PASS][1] -> [FAIL][2] ([Intel XE#827]) +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-8/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-4/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@x-tiled-addfb:
    - shard-dg2-set2:     [PASS][3] -> [SKIP][4] ([Intel XE#2351] / [Intel XE#4208])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_big_fb@x-tiled-addfb.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_big_fb@x-tiled-addfb.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         [PASS][5] -> [DMESG-FAIL][6] ([Intel XE#4543])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
    - shard-adlp:         NOTRUN -> [SKIP][7] ([Intel XE#2191])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
    - shard-bmg:          [PASS][8] -> [SKIP][9] ([Intel XE#2314] / [Intel XE#2894])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-1-displays-1920x1080p:
    - shard-adlp:         NOTRUN -> [SKIP][10] ([Intel XE#367])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][11] ([Intel XE#787]) +2 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][12] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#455] / [Intel XE#787]) +25 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-433/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][14] ([Intel XE#787]) +167 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-434/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][15] ([Intel XE#3442])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][16] -> [INCOMPLETE][17] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-1/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_cdclk@mode-transition@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][19] ([Intel XE#4417]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-433/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html

  * igt@kms_chamelium_edid@dp-mode-timings:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2252])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-8/igt@kms_chamelium_edid@dp-mode-timings.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
    - shard-adlp:         NOTRUN -> [SKIP][21] ([Intel XE#373]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_chamelium_hpd@dp-hpd-fast.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-adlp:         NOTRUN -> [SKIP][22] ([Intel XE#307])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@srm@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][23] ([Intel XE#1178]) +1 other test fail
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-433/igt@kms_content_protection@srm@pipe-a-dp-4.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][24] ([Intel XE#1188])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-1/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-onscreen-64x64:
    - shard-dg2-set2:     [PASS][25] -> [SKIP][26] ([Intel XE#4208] / [i915#2575]) +14 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_cursor_crc@cursor-onscreen-64x64.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_cursor_crc@cursor-onscreen-64x64.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][27] -> [SKIP][28] ([Intel XE#2291]) +4 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][29] -> [FAIL][30] ([Intel XE#1475])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          [PASS][31] -> [SKIP][32] ([Intel XE#4302])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-8/igt@kms_display_modes@extended-mode-basic.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][33] ([Intel XE#455]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][34] ([Intel XE#310]) +1 other test skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [PASS][35] -> [SKIP][36] ([Intel XE#2316]) +9 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a1:
    - shard-adlp:         [PASS][37] -> [DMESG-WARN][38] ([Intel XE#4543]) +3 other tests dmesg-warn
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-2/igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a1.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-9/igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a1.html

  * igt@kms_flip@dpms-vs-vblank-race-interruptible:
    - shard-adlp:         [PASS][39] -> [DMESG-WARN][40] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-6/igt@kms_flip@dpms-vs-vblank-race-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-2/igt@kms_flip@dpms-vs-vblank-race-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-bmg:          [PASS][41] -> [INCOMPLETE][42] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][43] ([Intel XE#651])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-shrfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][44] ([Intel XE#651]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][45] ([Intel XE#656]) +5 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2311])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][47] ([Intel XE#653])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [PASS][48] -> [SKIP][49] ([Intel XE#1503]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-8/igt@kms_hdr@static-toggle-suspend.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [PASS][50] -> [SKIP][51] ([Intel XE#3012])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-1/igt@kms_joiner@basic-force-big-joiner.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [PASS][52] -> [SKIP][53] ([Intel XE#4596])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-4.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-dg2-set2:     NOTRUN -> [SKIP][54] ([Intel XE#1489])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area:
    - shard-adlp:         NOTRUN -> [SKIP][55] ([Intel XE#1489]) +2 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr@fbc-psr2-cursor-blt:
    - shard-adlp:         NOTRUN -> [SKIP][56] ([Intel XE#2850] / [Intel XE#929]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@kms_psr@fbc-psr2-cursor-blt.html

  * igt@kms_psr@psr-primary-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][57] ([Intel XE#2850] / [Intel XE#929])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@kms_psr@psr-primary-render.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-adlp:         NOTRUN -> [SKIP][58] ([Intel XE#2939])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          [PASS][59] -> [SKIP][60] ([Intel XE#1435])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-1/igt@kms_setmode@clone-exclusive-crtc.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram:
    - shard-adlp:         NOTRUN -> [SKIP][61] ([Intel XE#455]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_compute_preempt@compute-preempt-many-all-ram.html

  * igt@xe_eudebug_online@debugger-reopen:
    - shard-adlp:         NOTRUN -> [SKIP][62] ([Intel XE#4837])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_eudebug_online@debugger-reopen.html

  * igt@xe_eudebug_online@preempt-breakpoint:
    - shard-dg2-set2:     NOTRUN -> [SKIP][63] ([Intel XE#4837]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@xe_eudebug_online@preempt-breakpoint.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
    - shard-dg2-set2:     [PASS][64] -> [SKIP][65] ([Intel XE#4208]) +42 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-dg2-set2:     [PASS][66] -> [SKIP][67] ([Intel XE#1392]) +4 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-464/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_fault_mode@once-bindexecqueue-rebind-imm:
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#288]) +4 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_exec_fault_mode@once-bindexecqueue-rebind-imm.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-rebind:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#288]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@xe_exec_fault_mode@twice-bindexecqueue-rebind.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
    - shard-adlp:         NOTRUN -> [SKIP][70] ([Intel XE#2360])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html

  * igt@xe_exec_system_allocator@many-large-mmap-shared-remap-eocheck:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#4915]) +39 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_exec_system_allocator@many-large-mmap-shared-remap-eocheck.html

  * igt@xe_exec_system_allocator@once-mmap-free-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#4943])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-8/igt@xe_exec_system_allocator@once-mmap-free-huge-nomemset.html

  * igt@xe_exec_system_allocator@process-many-free-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][73] ([Intel XE#4915]) +24 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@xe_exec_system_allocator@process-many-free-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset:
    - shard-lnl:          [PASS][74] -> [FAIL][75] ([Intel XE#5018])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html

  * igt@xe_oa@oa-exponents:
    - shard-adlp:         NOTRUN -> [SKIP][76] ([Intel XE#2541] / [Intel XE#3573]) +3 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@xe_oa@oa-exponents.html

  * igt@xe_oa@oa-exponents@ccs-0:
    - shard-lnl:          [PASS][77] -> [TIMEOUT][78] ([Intel XE#5339]) +1 other test timeout
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-lnl-3/igt@xe_oa@oa-exponents@ccs-0.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-lnl-6/igt@xe_oa@oa-exponents@ccs-0.html

  * igt@xe_oa@syncs-syncobj-wait-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][79] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@xe_oa@syncs-syncobj-wait-cfg.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-adlp:         NOTRUN -> [SKIP][80] ([Intel XE#2284] / [Intel XE#366])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_query@multigpu-query-hwconfig:
    - shard-dg2-set2:     NOTRUN -> [SKIP][81] ([Intel XE#944])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@xe_query@multigpu-query-hwconfig.html

  * igt@xe_query@multigpu-query-invalid-query:
    - shard-adlp:         NOTRUN -> [SKIP][82] ([Intel XE#944])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_query@multigpu-query-invalid-query.html

  * igt@xe_render_copy@render-stress-0-copies:
    - shard-dg2-set2:     NOTRUN -> [SKIP][83] ([Intel XE#4814])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-435/igt@xe_render_copy@render-stress-0-copies.html

  
#### Possible fixes ####

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [SKIP][84] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][85] +1 other test pass
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-bmg:          [FAIL][86] ([Intel XE#5376]) -> [PASS][87] +1 other test pass
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][88] ([Intel XE#2291]) -> [PASS][89] +8 other tests pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [SKIP][90] ([Intel XE#4294]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-8/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_feature_discovery@display-2x:
    - shard-bmg:          [SKIP][92] ([Intel XE#2373]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-6/igt@kms_feature_discovery@display-2x.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-8/igt@kms_feature_discovery@display-2x.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-hdmi-a6-dp4:
    - shard-dg2-set2:     [FAIL][94] ([Intel XE#301]) -> [PASS][95] +1 other test pass
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-463/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-hdmi-a6-dp4.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-hdmi-a6-dp4.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-bmg:          [SKIP][96] ([Intel XE#2316]) -> [PASS][97] +9 other tests pass
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_flip@2x-nonexisting-fb.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-3/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][98] ([Intel XE#4543]) -> [PASS][99] +13 other tests pass
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-3/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-2/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-rmfb-interruptible:
    - shard-adlp:         [DMESG-WARN][100] -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-6/igt@kms_flip@flip-vs-rmfb-interruptible.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@kms_flip@flip-vs-rmfb-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-adlp:         [FAIL][102] ([Intel XE#3098]) -> [PASS][103] +1 other test pass
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-1/igt@kms_flip@plain-flip-fb-recreate.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-bind:
    - shard-dg2-set2:     [SKIP][104] ([Intel XE#1392]) -> [PASS][105] +9 other tests pass
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html

  * igt@xe_module_load@reload-no-display:
    - shard-adlp:         [DMESG-WARN][106] ([Intel XE#4792]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-4/igt@xe_module_load@reload-no-display.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_module_load@reload-no-display.html

  * igt@xe_pm@s3-vm-bind-prefetch:
    - shard-adlp:         [ABORT][108] ([Intel XE#4847]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-4/igt@xe_pm@s3-vm-bind-prefetch.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@xe_pm@s3-vm-bind-prefetch.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-adlp:         [ABORT][110] -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-1/igt@xe_wedged@wedged-mode-toggle.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-6/igt@xe_wedged@wedged-mode-toggle.html

  
#### Warnings ####

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][112] ([Intel XE#316]) -> [SKIP][113] ([Intel XE#4208])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-dg2-set2:     [SKIP][114] ([Intel XE#1124]) -> [SKIP][115] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@linear-tiling-2-displays-2560x1440p:
    - shard-dg2-set2:     [SKIP][116] ([Intel XE#367]) -> [SKIP][117] ([Intel XE#4208] / [i915#2575])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html

  * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
    - shard-dg2-set2:     [SKIP][118] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][119] ([Intel XE#4208])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs:
    - shard-dg2-set2:     [SKIP][120] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][121] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][122] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [INCOMPLETE][123] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-dg2-set2:     [SKIP][124] ([Intel XE#306]) -> [SKIP][125] ([Intel XE#4208] / [i915#2575])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_chamelium_color@ctm-0-50.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-dg2-set2:     [SKIP][126] ([Intel XE#373]) -> [SKIP][127] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_content_protection@atomic:
    - shard-dg2-set2:     [FAIL][128] ([Intel XE#1178]) -> [SKIP][129] ([Intel XE#4208] / [i915#2575])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_content_protection@atomic.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][130] ([Intel XE#2341]) -> [FAIL][131] ([Intel XE#1188])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_content_protection@uevent.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-1/igt@kms_content_protection@uevent.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-adlp:         [DMESG-WARN][132] ([Intel XE#4543]) -> [DMESG-WARN][133] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) +1 other test dmesg-warn
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-dg2-set2:     [SKIP][134] ([Intel XE#455]) -> [SKIP][135] ([Intel XE#4208])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][136] ([Intel XE#2311]) -> [SKIP][137] ([Intel XE#2312]) +19 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     [SKIP][138] ([Intel XE#651]) -> [SKIP][139] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][140] ([Intel XE#4141]) -> [SKIP][141] ([Intel XE#2312]) +12 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][142] ([Intel XE#2312]) -> [SKIP][143] ([Intel XE#4141]) +8 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][144] ([Intel XE#2312]) -> [SKIP][145] ([Intel XE#2311]) +18 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary:
    - shard-dg2-set2:     [SKIP][146] ([Intel XE#651]) -> [SKIP][147] ([Intel XE#4208]) +4 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][148] ([Intel XE#2313]) -> [SKIP][149] ([Intel XE#2312]) +20 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-dg2-set2:     [SKIP][150] ([Intel XE#653]) -> [SKIP][151] ([Intel XE#2351] / [Intel XE#4208])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2-set2:     [SKIP][152] ([Intel XE#658]) -> [SKIP][153] ([Intel XE#2351] / [Intel XE#4208])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
    - shard-dg2-set2:     [SKIP][154] ([Intel XE#653]) -> [SKIP][155] ([Intel XE#4208]) +6 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][156] ([Intel XE#2312]) -> [SKIP][157] ([Intel XE#2313]) +15 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][158] ([Intel XE#5021]) -> [SKIP][159] ([Intel XE#4596])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-y.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-dg2-set2:     [SKIP][160] ([Intel XE#3309]) -> [SKIP][161] ([Intel XE#4208])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_pm_dc@dc5-retention-flops.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-adlp:         [SKIP][162] -> [SKIP][163] ([Intel XE#836])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-adlp-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-adlp-3/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-set2:     [SKIP][164] ([Intel XE#1489]) -> [SKIP][165] ([Intel XE#4208]) +1 other test skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-pr-dpms:
    - shard-dg2-set2:     [SKIP][166] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][167] ([Intel XE#4208]) +3 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_psr@fbc-pr-dpms.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_psr@fbc-pr-dpms.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-dg2-set2:     [SKIP][168] ([Intel XE#1127]) -> [SKIP][169] ([Intel XE#4208] / [i915#2575])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-dg2-set2:     [SKIP][170] ([Intel XE#455]) -> [SKIP][171] ([Intel XE#4208] / [i915#2575])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@kms_setmode@invalid-clone-exclusive-crtc.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][172] ([Intel XE#1729]) -> [SKIP][173] ([Intel XE#2426])
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][174] ([Intel XE#2509]) -> [SKIP][175] ([Intel XE#2426])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
    - shard-dg2-set2:     [SKIP][176] ([Intel XE#1500]) -> [SKIP][177] ([Intel XE#362])
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_eu_stall@invalid-gt-id:
    - shard-dg2-set2:     [SKIP][178] -> [SKIP][179] ([Intel XE#4208])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_eu_stall@invalid-gt-id.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_eu_stall@invalid-gt-id.html

  * igt@xe_eudebug@basic-vm-access-userptr-faultable:
    - shard-dg2-set2:     [SKIP][180] ([Intel XE#4837]) -> [SKIP][181] ([Intel XE#4208]) +1 other test skip
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_eudebug@basic-vm-access-userptr-faultable.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_eudebug@basic-vm-access-userptr-faultable.html

  * igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
    - shard-dg2-set2:     [SKIP][182] ([Intel XE#288]) -> [SKIP][183] ([Intel XE#4208]) +6 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap:
    - shard-dg2-set2:     [SKIP][184] ([Intel XE#4915]) -> [SKIP][185] ([Intel XE#4208]) +56 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-large-mmap.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_exec_system_allocator@threads-many-large-mmap.html

  * igt@xe_mmap@small-bar:
    - shard-dg2-set2:     [SKIP][186] ([Intel XE#512]) -> [SKIP][187] ([Intel XE#4208])
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_mmap@small-bar.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_mmap@small-bar.html

  * igt@xe_oa@invalid-oa-format-id:
    - shard-dg2-set2:     [SKIP][188] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][189] ([Intel XE#4208])
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_oa@invalid-oa-format-id.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_oa@invalid-oa-format-id.html

  * igt@xe_oa@syncs-ufence-wait:
    - shard-dg2-set2:     [SKIP][190] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][191] ([Intel XE#4208])
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_oa@syncs-ufence-wait.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_oa@syncs-ufence-wait.html

  * igt@xe_pmu@gt-frequency:
    - shard-dg2-set2:     [FAIL][192] ([Intel XE#5166]) -> [SKIP][193] ([Intel XE#4208])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_pmu@gt-frequency.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_pmu@gt-frequency.html

  * igt@xe_query@multigpu-query-oa-units:
    - shard-dg2-set2:     [SKIP][194] ([Intel XE#944]) -> [SKIP][195] ([Intel XE#4208])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_query@multigpu-query-oa-units.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_query@multigpu-query-oa-units.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-dg2-set2:     [SKIP][196] ([Intel XE#3342]) -> [SKIP][197] ([Intel XE#4208])
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac/shard-dg2-436/igt@xe_sriov_flr@flr-vf1-clear.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/shard-dg2-466/igt@xe_sriov_flr@flr-vf1-clear.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4792]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4792
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4847]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4847
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5166
  [Intel XE#5339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5339
  [Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#827]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/827
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575


Build changes
-------------

  * Linux: xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac -> xe-pw-149120v6

  IGT_8438: 8438
  xe-3344-05fd9cf9ba87dcf4428adbca5237845f2c04d8ac: 05fd9cf9ba87dcf4428adbca5237845f2c04d8ac
  xe-pw-149120v6: 149120v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v6/index.html

[-- Attachment #2: Type: text/html, Size: 65484 bytes --]

Re: [PATCH v6 04/12] platform/x86/intel/pmt: mutex clean up

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 1890 bytes --]

On Thu, 3 Jul 2025, Michael J. Ruhl wrote:

> The header file for mutex usage and mutex_destroy() cleanup code is
> absent from this module.

Hi Michael,

While not end of the world, it's generally better to spell out what 
module (/driver/etc.) you're talking about instead of using "this" even if 
the change will contain other references that will tell what the module is.

No need to send another version of this series just because of that unlees 
there are going to be other changes.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>


> Add the header file and mutex_destroy().
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index d40c8e212733..6e32fc1f8f1d 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -12,6 +12,7 @@
>  #include <linux/intel_vsec.h>
>  #include <linux/kernel.h>
>  #include <linux/module.h>
> +#include <linux/mutex.h>
>  #include <linux/pci.h>
>  #include <linux/slab.h>
>  #include <linux/uaccess.h>
> @@ -262,8 +263,12 @@ static void pmt_crashlog_remove(struct auxiliary_device *auxdev)
>  	struct pmt_crashlog_priv *priv = auxiliary_get_drvdata(auxdev);
>  	int i;
>  
> -	for (i = 0; i < priv->num_entries; i++)
> -		intel_pmt_dev_destroy(&priv->entry[i].entry, &pmt_crashlog_ns);
> +	for (i = 0; i < priv->num_entries; i++) {
> +		struct crashlog_entry *crashlog = &priv->entry[i];
> +
> +		intel_pmt_dev_destroy(&crashlog->entry, &pmt_crashlog_ns);
> +		mutex_destroy(&crashlog->control_mutex);
> +	}
>  }
>  
>  static int pmt_crashlog_probe(struct auxiliary_device *auxdev,
> 

-- 
 i.

Re: [PATCH v6 09/12] platform/x86/intel/pmt: add register access helpers

[Ilpo Järvinen]

On Thu, 3 Jul 2025, Michael J. Ruhl wrote:

> The control register is used in a read/modify/write pattern.
> The status register is used in a read/check bit pattern.
> 
> Add helpers to eliminate common code.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 60 ++++++++++++-----------
>  1 file changed, 31 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index 23b3971da40a..888946a8ba46 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -64,20 +64,42 @@ struct pmt_crashlog_priv {
>  /*
>   * I/O
>   */
> -static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
> +#define CRASHLOG_SET_BIT	true
> +#define CRASHLOG_CLEAR_BIT	false

These defines look overkill to me. IMO it is just as simple to use 
true/false directly when calling.

> +/* read/modify/write */

As is, this comment doesn't add value over the function name.

It would be more useful to explain this function sets or clears @bit based 
on @set.

-- 
 i.

> +static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
>  {
> -	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
> +	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
> +
> +	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> +
> +	if (set)
> +		reg |= bit;
> +	else
> +		reg &= ~bit;
> +
> +	writel(reg, entry->disc_table + CONTROL_OFFSET);
> +}
> +
> +/* read/check */
> +static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
> +{
> +	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
> +
> +	return !!(reg & bit);
> +}
>  
> +static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
> +{
>  	/* return current value of the crashlog complete flag */
> -	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
> +	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
>  }
>  
>  static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
>  {
> -	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
> -
>  	/* return current value of the crashlog disabled flag */
> -	return !!(control & CRASHLOG_FLAG_DISABLE);
> +	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
>  }
>  
>  static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
> @@ -98,37 +120,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>  static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
>  				     bool disable)
>  {
> -	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
> -
> -	/* clear trigger bits so we are only modifying disable flag */
> -	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> -
> -	if (disable)
> -		control |= CRASHLOG_FLAG_DISABLE;
> -	else
> -		control &= ~CRASHLOG_FLAG_DISABLE;
> -
> -	writel(control, entry->disc_table + CONTROL_OFFSET);
> +	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
>  }
>  
>  static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
>  {
> -	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
> -
> -	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> -	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
> -
> -	writel(control, entry->disc_table + CONTROL_OFFSET);
> +	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
>  }
>  
>  static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
>  {
> -	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
> -
> -	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> -	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
> -
> -	writel(control, entry->disc_table + CONTROL_OFFSET);
> +	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
>  }
>  
>  /*
> 

Re: [PATCH v6 10/12] platform/x86/intel/pmt: refactor base parameter

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 6797 bytes --]

On Thu, 3 Jul 2025, Michael J. Ruhl wrote:

> For the crashlog driver, struct crashlog_entry is the parent of
> struct intel_pmt_entry. To support multiple crashlog versions, most

To support an upcoming change ...

> accesses will be to the struct crashlog_entry.

I don't understand the meaning of the part after the comma as "most 
accesses" is extremely vague, could you please rephrase it.

Jumping directly to the itemized list at this point feels a bit clumsy as 
they don't really connect well.

> - Refactor to use struct crashlog_entry in place of
>   struct intel_pmt_entry
> - Rename some usages (auto-variables) from entry to crashlog
>
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 59 ++++++++++++-----------
>  1 file changed, 30 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index 888946a8ba46..8cca520c5a1c 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -68,8 +68,9 @@ struct pmt_crashlog_priv {
>  #define CRASHLOG_CLEAR_BIT	false
>  
>  /* read/modify/write */
> -static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
> +static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  {
> +	struct intel_pmt_entry *entry = &crashlog->entry;
>  	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
>  
>  	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> @@ -83,23 +84,24 @@ static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
>  }
>  
>  /* read/check */
> -static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
> +static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>  {
> +	struct intel_pmt_entry *entry = &crashlog->entry;
>  	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
>  
>  	return !!(reg & bit);
>  }
>  
> -static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
> +static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
>  {
>  	/* return current value of the crashlog complete flag */
> -	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
> +	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
>  }
>  
> -static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
> +static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
>  {
>  	/* return current value of the crashlog disabled flag */
> -	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
> +	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
>  }
>  
>  static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
> @@ -117,20 +119,19 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>  	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
>  }
>  
> -static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
> -				     bool disable)
> +static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
>  {
> -	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
> +	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
>  }
>  
> -static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
> +static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
>  {
> -	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
> +	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
>  }
>  
> -static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
> +static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
>  {
> -	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
> +	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
>  }
>  
>  /*
> @@ -139,8 +140,8 @@ static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
>  static ssize_t
>  enable_show(struct device *dev, struct device_attribute *attr, char *buf)
>  {
> -	struct intel_pmt_entry *entry = dev_get_drvdata(dev);
> -	bool enabled = !pmt_crashlog_disabled(entry);
> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
> +	bool enabled = !pmt_crashlog_disabled(crashlog);
>  
>  	return sprintf(buf, "%d\n", enabled);
>  }
> @@ -149,19 +150,19 @@ static ssize_t
>  enable_store(struct device *dev, struct device_attribute *attr,
>  	     const char *buf, size_t count)
>  {
> -	struct crashlog_entry *entry;
> +	struct crashlog_entry *crashlog;
>  	bool enabled;
>  	int result;
>  
> -	entry = dev_get_drvdata(dev);
> +	crashlog = dev_get_drvdata(dev);
>  
>  	result = kstrtobool(buf, &enabled);
>  	if (result)
>  		return result;
>  
> -	guard(mutex)(&entry->control_mutex);
> +	guard(mutex)(&crashlog->control_mutex);
>  
> -	pmt_crashlog_set_disable(&entry->entry, !enabled);
> +	pmt_crashlog_set_disable(crashlog, !enabled);
>  
>  	return count;
>  }
> @@ -170,11 +171,11 @@ static DEVICE_ATTR_RW(enable);
>  static ssize_t
>  trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
>  {
> -	struct intel_pmt_entry *entry;
> +	struct crashlog_entry *crashlog;
>  	bool trigger;
>  
> -	entry = dev_get_drvdata(dev);
> -	trigger = pmt_crashlog_complete(entry);
> +	crashlog = dev_get_drvdata(dev);
> +	trigger = pmt_crashlog_complete(crashlog);
>  
>  	return sprintf(buf, "%d\n", trigger);
>  }
> @@ -183,32 +184,32 @@ static ssize_t
>  trigger_store(struct device *dev, struct device_attribute *attr,
>  	      const char *buf, size_t count)
>  {
> -	struct crashlog_entry *entry;
> +	struct crashlog_entry *crashlog;
>  	bool trigger;
>  	int result;
>  
> -	entry = dev_get_drvdata(dev);
> +	crashlog = dev_get_drvdata(dev);
>  
>  	result = kstrtobool(buf, &trigger);
>  	if (result)
>  		return result;
>  
> -	guard(mutex)(&entry->control_mutex);
> +	guard(mutex)(&crashlog->control_mutex);
>  
>  	/* if device is currently disabled, return busy */
> -	if (pmt_crashlog_disabled(&entry->entry))
> +	if (pmt_crashlog_disabled(crashlog))
>  		return -EBUSY;
>  
>  	if (!trigger) {
> -		pmt_crashlog_set_clear(&entry->entry);
> +		pmt_crashlog_set_clear(crashlog);
>  		return count;
>  	}
>  
>  	/* we cannot trigger a new crash if one is still pending */
> -	if (pmt_crashlog_complete(&entry->entry))
> +	if (pmt_crashlog_complete(crashlog))
>  		return -EEXIST;
>  
> -	pmt_crashlog_set_execute(&entry->entry);
> +	pmt_crashlog_set_execute(crashlog);
>  
>  	return count;
>  }
> 

Once you've improved the changelog, feel free to add:

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

-- 
 i.

Re: [PATCH v6 11/12] platform/x86/intel/pmt: use a version struct

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 6607 bytes --]

On Thu, 3 Jul 2025, Michael J. Ruhl wrote:

> In preparation for supporting multiple crashlog versions, use a struct
> to keep bit offset info for the status and control bits.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 92 ++++++++++++++++-------
>  1 file changed, 66 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index 8cca520c5a1c..edc41144909c 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -24,21 +24,6 @@
>  /* Crashlog discovery header types */
>  #define CRASH_TYPE_OOBMSM	1
>  
> -/* Control Flags */
> -#define CRASHLOG_FLAG_DISABLE		BIT(28)
> -
> -/*
> - * Bits 29 and 30 control the state of bit 31.
> - *
> - * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
> - * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
> - * Bit 31 is the read-only status with a 1 indicating log is complete.
> - */
> -#define CRASHLOG_FLAG_TRIGGER_CLEAR	BIT(29)
> -#define CRASHLOG_FLAG_TRIGGER_EXECUTE	BIT(30)
> -#define CRASHLOG_FLAG_TRIGGER_COMPLETE	BIT(31)
> -#define CRASHLOG_FLAG_TRIGGER_MASK	GENMASK(31, 28)
> -
>  /* Crashlog Discovery Header */
>  #define CONTROL_OFFSET		0x0
>  #define GUID_OFFSET		0x4
> @@ -50,10 +35,63 @@
>  /* size is in bytes */
>  #define GET_SIZE(v)		((v) * sizeof(u32))
>  
> +/*
> + * Type 1 Version 0
> + * status and control registers are combined.
> + *
> + * Bits 29 and 30 control the state of bit 31.
> + * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
> + * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
> + * Bit 31 is the read-only status with a 1 indicating log is complete.
> + */
> +#define TYPE1_VER0_STATUS_OFFSET	0x00
> +#define TYPE1_VER0_CONTROL_OFFSET	0x00
> +
> +#define TYPE1_VER0_DISABLE		BIT(28)
> +#define TYPE1_VER0_CLEAR		BIT(29)
> +#define TYPE1_VER0_EXECUTE		BIT(30)
> +#define TYPE1_VER0_COMPLETE		BIT(31)
> +#define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
> +
> +/* After offset, order alphabetically, not bit ordered */
> +struct crashlog_status {
> +	u32 offset;
> +	u32 cleared;
> +	u32 complete;
> +	u32 disabled;
> +};
> +
> +struct crashlog_control {
> +	u32 offset;
> +	u32 trigger_mask;
> +	u32 clear;
> +	u32 disable;
> +	u32 manual;
> +};
> +
> +struct crashlog_info {
> +	struct crashlog_status status;
> +	struct crashlog_control control;
> +};
> +
> +static const struct crashlog_info crashlog_type1_ver0 = {
> +	.status.offset = TYPE1_VER0_STATUS_OFFSET,
> +	.status.cleared = TYPE1_VER0_CLEAR,
> +	.status.complete = TYPE1_VER0_COMPLETE,
> +	.status.disabled = TYPE1_VER0_DISABLE,
> +
> +	.control.offset = TYPE1_VER0_CONTROL_OFFSET,
> +	.control.trigger_mask = TYPE1_VER0_TRIGGER_MASK,
> +	.control.clear = TYPE1_VER0_CLEAR,
> +	.control.disable = TYPE1_VER0_DISABLE,
> +	.control.manual = TYPE1_VER0_EXECUTE,
> +};
> +
>  struct crashlog_entry {
>  	/* entry must be first member of struct */
>  	struct intel_pmt_entry		entry;
>  	struct mutex			control_mutex;
> +	const struct crashlog_info	*info;
>  };
>  
>  struct pmt_crashlog_priv {
> @@ -70,24 +108,25 @@ struct pmt_crashlog_priv {
>  /* read/modify/write */
>  static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  {
> +	const struct crashlog_control *control = &crashlog->info->control;
>  	struct intel_pmt_entry *entry = &crashlog->entry;
> -	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
> +	u32 reg = readl(entry->disc_table + control->offset);
>  
> -	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> +	reg &= ~control->trigger_mask;
>  
>  	if (set)
>  		reg |= bit;
>  	else
>  		reg &= ~bit;
>  
> -	writel(reg, entry->disc_table + CONTROL_OFFSET);
> +	writel(reg, entry->disc_table + control->offset);
>  }
>  
>  /* read/check */
>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>  {
> -	struct intel_pmt_entry *entry = &crashlog->entry;
> -	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
> +	const struct crashlog_status *status = &crashlog->info->status;
> +	u32 reg = readl(crashlog->entry.disc_table + status->offset);
>  
>  	return !!(reg & bit);
>  }
> @@ -95,13 +134,13 @@ static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>  static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
>  {
>  	/* return current value of the crashlog complete flag */
> -	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.complete);
>  }
>  
>  static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
>  {
>  	/* return current value of the crashlog disabled flag */
> -	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
>  }
>  
>  static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
> @@ -121,17 +160,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>  
>  static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
>  {
> -	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.disable, disable);
>  }
>  
>  static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
>  {
> -	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.clear, CRASHLOG_SET_BIT);
>  }
>  
>  static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
>  {
> -	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
>  }
>  
>  /*
> @@ -235,9 +274,10 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
>  	if (!pmt_crashlog_supported(entry))
>  		return 1;
>  
> -	/* initialize control mutex */
> +	/* initialize the crashlog struct */
>  	crashlog = container_of(entry, struct crashlog_entry, entry);
>  	mutex_init(&crashlog->control_mutex);
> +	crashlog->info = &crashlog_type1_ver0;
>  
>  	header->access_type = GET_ACCESS(readl(disc_table));
>  	header->guid = readl(disc_table + GUID_OFFSET);
> 

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

-- 
 i.

Re: [PATCH v6 12/12] platform/x86/intel/pmt: support BMG crashlog

[Ilpo Järvinen]

On Thu, 3 Jul 2025, Michael J. Ruhl wrote:

> The Battlemage GPU has the type 1 version 2 crashlog feature.
> 
> Update the crashlog driver to support this crashlog version.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 268 ++++++++++++++++++++--
>  1 file changed, 255 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index edc41144909c..35c19e9a2bb6 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -53,20 +53,52 @@
>  #define TYPE1_VER0_COMPLETE		BIT(31)
>  #define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
>  
> +/*
> + * Type 1 Version 2
> + * status and control are two different registers
> + */
> +#define TYPE1_VER2_STATUS_OFFSET	0x00
> +#define TYPE1_VER2_CONTROL_OFFSET	0x14
> +
> +/* status register */
> +#define TYPE1_VER2_CLEAR_SUPPORT	BIT(20)
> +#define TYPE1_VER2_REARMED		BIT(25)
> +#define TYPE1_VER2_ERROR		BIT(26)
> +#define TYPE1_VER2_CONSUMED		BIT(27)
> +#define TYPE1_VER2_DISABLED		BIT(28)
> +#define TYPE1_VER2_CLEARED		BIT(29)
> +#define TYPE1_VER2_IN_PROGRESS		BIT(30)
> +#define TYPE1_VER2_COMPLETE		BIT(31)
> +
> +/* control register */
> +#define TYPE1_VER2_CONSUME		BIT(25)
> +#define TYPE1_VER2_REARM		BIT(28)
> +#define TYPE1_VER2_EXECUTE		BIT(29)
> +#define TYPE1_VER2_CLEAR		BIT(30)
> +#define TYPE1_VER2_DISABLE		BIT(31)
> +#define TYPE1_VER2_TRIGGER_MASK		(TYPE1_VER2_EXECUTE | TYPE1_VER2_CLEAR | TYPE1_VER2_DISABLE)

Please use \ to split this on multiple lines.

>  /* After offset, order alphabetically, not bit ordered */
>  struct crashlog_status {
>  	u32 offset;
> +	u32 clear_supported;
>  	u32 cleared;
>  	u32 complete;
> +	u32 consumed;
>  	u32 disabled;
> +	u32 error;
> +	u32 in_progress;
> +	u32 rearmed;
>  };
>  
>  struct crashlog_control {
>  	u32 offset;
>  	u32 trigger_mask;
>  	u32 clear;
> +	u32 consume;
>  	u32 disable;
>  	u32 manual;
> +	u32 rearm;
>  };
>  
>  struct crashlog_info {
> @@ -87,6 +119,26 @@ static const struct crashlog_info crashlog_type1_ver0 = {
>  	.control.manual = TYPE1_VER0_EXECUTE,
>  };
>  
> +const struct crashlog_info crashlog_type1_ver2 = {
> +	.status.offset = TYPE1_VER2_STATUS_OFFSET,
> +	.status.clear_supported = TYPE1_VER2_CLEAR_SUPPORT,
> +	.status.cleared = TYPE1_VER2_CLEARED,
> +	.status.complete = TYPE1_VER2_COMPLETE,
> +	.status.consumed = TYPE1_VER2_CONSUMED,
> +	.status.disabled = TYPE1_VER2_DISABLED,
> +	.status.error = TYPE1_VER2_ERROR,
> +	.status.in_progress = TYPE1_VER2_IN_PROGRESS,
> +	.status.rearmed = TYPE1_VER2_REARMED,
> +
> +	.control.offset = TYPE1_VER2_CONTROL_OFFSET,
> +	.control.trigger_mask = TYPE1_VER2_TRIGGER_MASK,
> +	.control.clear = TYPE1_VER2_CLEAR,
> +	.control.consume = TYPE1_VER2_CONSUME,
> +	.control.disable = TYPE1_VER2_DISABLE,
> +	.control.manual = TYPE1_VER2_EXECUTE,
> +	.control.rearm = TYPE1_VER2_REARM,
> +};
> +
>  struct crashlog_entry {
>  	/* entry must be first member of struct */
>  	struct intel_pmt_entry		entry;
> @@ -143,19 +195,23 @@ static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
>  	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
>  }
>  
> -static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
> +static bool pmt_crashlog_supported(struct intel_pmt_entry *entry, u32 *crash_type, u32 *version)
>  {
>  	u32 discovery_header = readl(entry->disc_table + CONTROL_OFFSET);
> -	u32 crash_type, version;
>  
> -	crash_type = GET_TYPE(discovery_header);
> -	version = GET_VERSION(discovery_header);
> +	*crash_type = GET_TYPE(discovery_header);
> +	*version = GET_VERSION(discovery_header);
>  
>  	/*
> -	 * Currently we only recognize OOBMSM version 0 devices.
> -	 * We can ignore all other crashlog devices in the system.
> +	 * Currently we only recognize OOBMSM (type 1) and version 0 or 2
> +	 * devices.
> +	 *
> +	 * Ignore all other crashlog devices in the system.
>  	 */
> -	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
> +	if (*crash_type == CRASH_TYPE_OOBMSM && (*version == 0 || *version == 2))
> +		return true;
> +
> +	return false;
>  }
>  
>  static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
> @@ -173,9 +229,118 @@ static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
>  	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
>  }
>  
> +static bool pmt_crashlog_cleared(struct crashlog_entry *crashlog)
> +{
> +	/* return current value of the crashlog cleared flag */
> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.cleared);
> +}
> +
> +static bool pmt_crashlog_consumed(struct crashlog_entry *crashlog)
> +{
> +	/* return current value of the crashlog consumedflag */

Missing space.

But I'm not convived thes comments really help that much. ...If you still 
want to keep them, make these two comments, at minimum, function comments 
instead.

Ah, there are a few more below, the same applies to them.

> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.consumed);
> +}
> +
> +static void pmt_crashlog_set_consumed(struct crashlog_entry *crashlog)
> +{
> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.consume, CRASHLOG_SET_BIT);
> +}
> +
> +static bool pmt_crashlog_error(struct crashlog_entry *crashlog)
> +{
> +	/* return current value of the crashlog error flag */
> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.error);
> +}
> +
> +static bool pmt_crashlog_rearm(struct crashlog_entry *crashlog)
> +{
> +	/* return current value of the crashlog reamed flag */

rearmed

> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.rearmed);
> +}
> +
> +static void pmt_crashlog_set_rearm(struct crashlog_entry *crashlog)
> +{
> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.rearm, CRASHLOG_SET_BIT);
> +}
> +
>  /*
>   * sysfs
>   */
> +static ssize_t
> +clear_show(struct device *dev, struct device_attribute *attr, char *buf)
> +{
> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
> +	bool cleared = pmt_crashlog_cleared(crashlog);
> +
> +	return sysfs_emit(buf, "%d\n", cleared);
> +}
> +
> +static ssize_t
> +clear_store(struct device *dev, struct device_attribute *attr,
> +	    const char *buf, size_t count)
> +{
> +	struct crashlog_entry *crashlog;
> +	bool clear;
> +	int result;
> +
> +	crashlog = dev_get_drvdata(dev);
> +
> +	result = kstrtobool(buf, &clear);
> +	if (result)
> +		return result;
> +
> +	/* set bit only */
> +	if (!clear)
> +		return -EINVAL;
> +
> +	guard(mutex)(&crashlog->control_mutex);
> +
> +	pmt_crashlog_set_clear(crashlog);
> +
> +	return count;
> +}
> +static DEVICE_ATTR_RW(clear);
> +
> +static ssize_t
> +consumed_show(struct device *dev, struct device_attribute *attr, char *buf)
> +{
> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
> +	bool consumed = pmt_crashlog_consumed(crashlog);
> +
> +	return sysfs_emit(buf, "%d\n", consumed);
> +}
> +
> +static ssize_t consumed_store(struct device *dev, struct device_attribute *attr,
> +			      const char *buf, size_t count)
> +{
> +	struct crashlog_entry *crashlog;
> +	bool consumed;
> +	int result;
> +
> +	crashlog = dev_get_drvdata(dev);
> +
> +	result = kstrtobool(buf, &consumed);
> +	if (result)
> +		return result;
> +
> +	/* set bit only */
> +	if (!consumed)
> +		return -EINVAL;
> +
> +	guard(mutex)(&crashlog->control_mutex);
> +
> +	if (pmt_crashlog_disabled(crashlog))
> +		return -EBUSY;
> +
> +	if (!pmt_crashlog_complete(crashlog))
> +		return -EEXIST;
> +
> +	pmt_crashlog_set_consumed(crashlog);
> +
> +	return count;
> +}
> +static DEVICE_ATTR_RW(consumed);
> +
>  static ssize_t
>  enable_show(struct device *dev, struct device_attribute *attr, char *buf)
>  {
> @@ -207,6 +372,50 @@ enable_store(struct device *dev, struct device_attribute *attr,
>  }
>  static DEVICE_ATTR_RW(enable);
>  
> +static ssize_t
> +error_show(struct device *dev, struct device_attribute *attr, char *buf)
> +{
> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
> +	bool error = pmt_crashlog_error(crashlog);
> +
> +	return sysfs_emit(buf, "%d\n", error);
> +}
> +static DEVICE_ATTR_RO(error);
> +
> +static ssize_t
> +rearm_show(struct device *dev, struct device_attribute *attr, char *buf)
> +{
> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
> +	int rearmed = pmt_crashlog_rearm(crashlog);
> +
> +	return sysfs_emit(buf, "%d\n", rearmed);
> +}
> +
> +static ssize_t rearm_store(struct device *dev, struct device_attribute *attr,
> +			   const char *buf, size_t count)
> +{
> +	struct crashlog_entry *crashlog;
> +	bool rearm;
> +	int result;
> +
> +	crashlog = dev_get_drvdata(dev);
> +
> +	result = kstrtobool(buf, &rearm);
> +	if (result)
> +		return result;
> +
> +	/* set only */
> +	if (!rearm)
> +		return -EINVAL;
> +
> +	guard(mutex)(&crashlog->control_mutex);
> +
> +	pmt_crashlog_set_rearm(crashlog);
> +
> +	return count;
> +}
> +static DEVICE_ATTR_RW(rearm);
> +
>  static ssize_t
>  trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
>  {
> @@ -254,30 +463,63 @@ trigger_store(struct device *dev, struct device_attribute *attr,
>  }
>  static DEVICE_ATTR_RW(trigger);
>  
> -static struct attribute *pmt_crashlog_attrs[] = {
> +static struct attribute *pmt_crashlog_type1_ver0_attrs[] = {
>  	&dev_attr_enable.attr,
>  	&dev_attr_trigger.attr,
>  	NULL
>  };
>  
> -static const struct attribute_group pmt_crashlog_group = {
> -	.attrs	= pmt_crashlog_attrs,
> +static struct attribute *pmt_crashlog_type1_ver2_attrs[] = {
> +	&dev_attr_clear.attr,
> +	&dev_attr_consumed.attr,
> +	&dev_attr_enable.attr,
> +	&dev_attr_error.attr,
> +	&dev_attr_rearm.attr,
> +	&dev_attr_trigger.attr,
> +	NULL
> +};
> +
> +static const struct attribute_group pmt_crashlog_type1_ver0_group = {
> +	.attrs	= pmt_crashlog_type1_ver0_attrs,
>  };
>  
> +static const struct attribute_group pmt_crashlog_type1_ver2_group = {
> +	.attrs = pmt_crashlog_type1_ver2_attrs,
> +};
> +
> +static const struct crashlog_info *select_crashlog_info(u32 type, u32 version)
> +{
> +	if (version == 0)
> +		return &crashlog_type1_ver0;
> +
> +	return &crashlog_type1_ver2;
> +}
> +
> +static const struct attribute_group *select_sysfs_grp(u32 type, u32 version)
> +{
> +	if (version == 0)
> +		return &pmt_crashlog_type1_ver2_group;
> +
> +	return &pmt_crashlog_type1_ver2_group;
> +}
> +
>  static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
>  				      struct device *dev)
>  {
>  	void __iomem *disc_table = entry->disc_table;
>  	struct intel_pmt_header *header = &entry->header;
>  	struct crashlog_entry *crashlog;
> +	u32 version;
> +	u32 type;
>  
> -	if (!pmt_crashlog_supported(entry))
> +	if (!pmt_crashlog_supported(entry, &type, &version))
>  		return 1;
>  
>  	/* initialize the crashlog struct */
>  	crashlog = container_of(entry, struct crashlog_entry, entry);
>  	mutex_init(&crashlog->control_mutex);
> -	crashlog->info = &crashlog_type1_ver0;
> +
> +	crashlog->info = select_crashlog_info(type, version);
>  
>  	header->access_type = GET_ACCESS(readl(disc_table));
>  	header->guid = readl(disc_table + GUID_OFFSET);
> @@ -286,7 +528,7 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
>  	/* Size is measured in DWORDS, but accessor returns bytes */
>  	header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
>  
> -	entry->attr_grp = &pmt_crashlog_group;
> +	entry->attr_grp = select_sysfs_grp(type, version);

Can't you have this as crashlog->info->attr_grp so you don't need a 
function for selecting it?

>  
>  	return 0;
>  }
> 

-- 
 i.

RE: [PATCH v6 12/12] platform/x86/intel/pmt: support BMG crashlog

[Ruhl, Michael J]

>-----Original Message-----
>From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>Sent: Monday, July 7, 2025 9:46 AM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
>de Goede <hdegoede@redhat.com>; De Marchi, Lucas
><lucas.demarchi@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
>thomas.hellstrom@linux.intel.com; airlied@gmail.com; simona@ffwll.ch;
>david.e.box@linux.intel.com
>Subject: Re: [PATCH v6 12/12] platform/x86/intel/pmt: support BMG crashlog
>
>On Thu, 3 Jul 2025, Michael J. Ruhl wrote:
>
>> The Battlemage GPU has the type 1 version 2 crashlog feature.
>>
>> Update the crashlog driver to support this crashlog version.
>>
>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/platform/x86/intel/pmt/crashlog.c | 268 ++++++++++++++++++++-
>-
>>  1 file changed, 255 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
>b/drivers/platform/x86/intel/pmt/crashlog.c
>> index edc41144909c..35c19e9a2bb6 100644
>> --- a/drivers/platform/x86/intel/pmt/crashlog.c
>> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
>> @@ -53,20 +53,52 @@
>>  #define TYPE1_VER0_COMPLETE		BIT(31)
>>  #define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
>>
>> +/*
>> + * Type 1 Version 2
>> + * status and control are two different registers
>> + */
>> +#define TYPE1_VER2_STATUS_OFFSET	0x00
>> +#define TYPE1_VER2_CONTROL_OFFSET	0x14
>> +
>> +/* status register */
>> +#define TYPE1_VER2_CLEAR_SUPPORT	BIT(20)
>> +#define TYPE1_VER2_REARMED		BIT(25)
>> +#define TYPE1_VER2_ERROR		BIT(26)
>> +#define TYPE1_VER2_CONSUMED		BIT(27)
>> +#define TYPE1_VER2_DISABLED		BIT(28)
>> +#define TYPE1_VER2_CLEARED		BIT(29)
>> +#define TYPE1_VER2_IN_PROGRESS		BIT(30)
>> +#define TYPE1_VER2_COMPLETE		BIT(31)
>> +
>> +/* control register */
>> +#define TYPE1_VER2_CONSUME		BIT(25)
>> +#define TYPE1_VER2_REARM		BIT(28)
>> +#define TYPE1_VER2_EXECUTE		BIT(29)
>> +#define TYPE1_VER2_CLEAR		BIT(30)
>> +#define TYPE1_VER2_DISABLE		BIT(31)
>> +#define TYPE1_VER2_TRIGGER_MASK
>	(TYPE1_VER2_EXECUTE | TYPE1_VER2_CLEAR | TYPE1_VER2_DISABLE)
>
>Please use \ to split this on multiple lines.

Will do.

>>  /* After offset, order alphabetically, not bit ordered */
>>  struct crashlog_status {
>>  	u32 offset;
>> +	u32 clear_supported;
>>  	u32 cleared;
>>  	u32 complete;
>> +	u32 consumed;
>>  	u32 disabled;
>> +	u32 error;
>> +	u32 in_progress;
>> +	u32 rearmed;
>>  };
>>
>>  struct crashlog_control {
>>  	u32 offset;
>>  	u32 trigger_mask;
>>  	u32 clear;
>> +	u32 consume;
>>  	u32 disable;
>>  	u32 manual;
>> +	u32 rearm;
>>  };
>>
>>  struct crashlog_info {
>> @@ -87,6 +119,26 @@ static const struct crashlog_info crashlog_type1_ver0
>= {
>>  	.control.manual = TYPE1_VER0_EXECUTE,
>>  };
>>
>> +const struct crashlog_info crashlog_type1_ver2 = {
>> +	.status.offset = TYPE1_VER2_STATUS_OFFSET,
>> +	.status.clear_supported = TYPE1_VER2_CLEAR_SUPPORT,
>> +	.status.cleared = TYPE1_VER2_CLEARED,
>> +	.status.complete = TYPE1_VER2_COMPLETE,
>> +	.status.consumed = TYPE1_VER2_CONSUMED,
>> +	.status.disabled = TYPE1_VER2_DISABLED,
>> +	.status.error = TYPE1_VER2_ERROR,
>> +	.status.in_progress = TYPE1_VER2_IN_PROGRESS,
>> +	.status.rearmed = TYPE1_VER2_REARMED,
>> +
>> +	.control.offset = TYPE1_VER2_CONTROL_OFFSET,
>> +	.control.trigger_mask = TYPE1_VER2_TRIGGER_MASK,
>> +	.control.clear = TYPE1_VER2_CLEAR,
>> +	.control.consume = TYPE1_VER2_CONSUME,
>> +	.control.disable = TYPE1_VER2_DISABLE,
>> +	.control.manual = TYPE1_VER2_EXECUTE,
>> +	.control.rearm = TYPE1_VER2_REARM,
>> +};
>> +
>>  struct crashlog_entry {
>>  	/* entry must be first member of struct */
>>  	struct intel_pmt_entry		entry;
>> @@ -143,19 +195,23 @@ static bool pmt_crashlog_disabled(struct
>crashlog_entry *crashlog)
>>  	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
>>  }
>>
>> -static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>> +static bool pmt_crashlog_supported(struct intel_pmt_entry *entry, u32
>*crash_type, u32 *version)
>>  {
>>  	u32 discovery_header = readl(entry->disc_table + CONTROL_OFFSET);
>> -	u32 crash_type, version;
>>
>> -	crash_type = GET_TYPE(discovery_header);
>> -	version = GET_VERSION(discovery_header);
>> +	*crash_type = GET_TYPE(discovery_header);
>> +	*version = GET_VERSION(discovery_header);
>>
>>  	/*
>> -	 * Currently we only recognize OOBMSM version 0 devices.
>> -	 * We can ignore all other crashlog devices in the system.
>> +	 * Currently we only recognize OOBMSM (type 1) and version 0 or 2
>> +	 * devices.
>> +	 *
>> +	 * Ignore all other crashlog devices in the system.
>>  	 */
>> -	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
>> +	if (*crash_type == CRASH_TYPE_OOBMSM && (*version == 0 ||
>*version == 2))
>> +		return true;
>> +
>> +	return false;
>>  }
>>
>>  static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool
>disable)
>> @@ -173,9 +229,118 @@ static void pmt_crashlog_set_execute(struct
>crashlog_entry *crashlog)
>>  	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual,
>CRASHLOG_SET_BIT);
>>  }
>>
>> +static bool pmt_crashlog_cleared(struct crashlog_entry *crashlog)
>> +{
>> +	/* return current value of the crashlog cleared flag */
>> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.cleared);
>> +}
>> +
>> +static bool pmt_crashlog_consumed(struct crashlog_entry *crashlog)
>> +{
>> +	/* return current value of the crashlog consumedflag */
>
>Missing space.
>
>But I'm not convived thes comments really help that much. ...If you still
>want to keep them, make these two comments, at minimum, function
>comments
>instead.

I will remove them.

>
>Ah, there are a few more below, the same applies to them.
>
>> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.consumed);
>> +}
>> +
>> +static void pmt_crashlog_set_consumed(struct crashlog_entry *crashlog)
>> +{
>> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.consume,
>CRASHLOG_SET_BIT);
>> +}
>> +
>> +static bool pmt_crashlog_error(struct crashlog_entry *crashlog)
>> +{
>> +	/* return current value of the crashlog error flag */
>> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.error);
>> +}
>> +
>> +static bool pmt_crashlog_rearm(struct crashlog_entry *crashlog)
>> +{
>> +	/* return current value of the crashlog reamed flag */
>
>rearmed
>
>> +	return pmt_crashlog_rc(crashlog, crashlog->info->status.rearmed);
>> +}
>> +
>> +static void pmt_crashlog_set_rearm(struct crashlog_entry *crashlog)
>> +{
>> +	pmt_crashlog_rmw(crashlog, crashlog->info->control.rearm,
>CRASHLOG_SET_BIT);
>> +}
>> +
>>  /*
>>   * sysfs
>>   */
>> +static ssize_t
>> +clear_show(struct device *dev, struct device_attribute *attr, char *buf)
>> +{
>> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
>> +	bool cleared = pmt_crashlog_cleared(crashlog);
>> +
>> +	return sysfs_emit(buf, "%d\n", cleared);
>> +}
>> +
>> +static ssize_t
>> +clear_store(struct device *dev, struct device_attribute *attr,
>> +	    const char *buf, size_t count)
>> +{
>> +	struct crashlog_entry *crashlog;
>> +	bool clear;
>> +	int result;
>> +
>> +	crashlog = dev_get_drvdata(dev);
>> +
>> +	result = kstrtobool(buf, &clear);
>> +	if (result)
>> +		return result;
>> +
>> +	/* set bit only */
>> +	if (!clear)
>> +		return -EINVAL;
>> +
>> +	guard(mutex)(&crashlog->control_mutex);
>> +
>> +	pmt_crashlog_set_clear(crashlog);
>> +
>> +	return count;
>> +}
>> +static DEVICE_ATTR_RW(clear);
>> +
>> +static ssize_t
>> +consumed_show(struct device *dev, struct device_attribute *attr, char *buf)
>> +{
>> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
>> +	bool consumed = pmt_crashlog_consumed(crashlog);
>> +
>> +	return sysfs_emit(buf, "%d\n", consumed);
>> +}
>> +
>> +static ssize_t consumed_store(struct device *dev, struct device_attribute
>*attr,
>> +			      const char *buf, size_t count)
>> +{
>> +	struct crashlog_entry *crashlog;
>> +	bool consumed;
>> +	int result;
>> +
>> +	crashlog = dev_get_drvdata(dev);
>> +
>> +	result = kstrtobool(buf, &consumed);
>> +	if (result)
>> +		return result;
>> +
>> +	/* set bit only */
>> +	if (!consumed)
>> +		return -EINVAL;
>> +
>> +	guard(mutex)(&crashlog->control_mutex);
>> +
>> +	if (pmt_crashlog_disabled(crashlog))
>> +		return -EBUSY;
>> +
>> +	if (!pmt_crashlog_complete(crashlog))
>> +		return -EEXIST;
>> +
>> +	pmt_crashlog_set_consumed(crashlog);
>> +
>> +	return count;
>> +}
>> +static DEVICE_ATTR_RW(consumed);
>> +
>>  static ssize_t
>>  enable_show(struct device *dev, struct device_attribute *attr, char *buf)
>>  {
>> @@ -207,6 +372,50 @@ enable_store(struct device *dev, struct
>device_attribute *attr,
>>  }
>>  static DEVICE_ATTR_RW(enable);
>>
>> +static ssize_t
>> +error_show(struct device *dev, struct device_attribute *attr, char *buf)
>> +{
>> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
>> +	bool error = pmt_crashlog_error(crashlog);
>> +
>> +	return sysfs_emit(buf, "%d\n", error);
>> +}
>> +static DEVICE_ATTR_RO(error);
>> +
>> +static ssize_t
>> +rearm_show(struct device *dev, struct device_attribute *attr, char *buf)
>> +{
>> +	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
>> +	int rearmed = pmt_crashlog_rearm(crashlog);
>> +
>> +	return sysfs_emit(buf, "%d\n", rearmed);
>> +}
>> +
>> +static ssize_t rearm_store(struct device *dev, struct device_attribute *attr,
>> +			   const char *buf, size_t count)
>> +{
>> +	struct crashlog_entry *crashlog;
>> +	bool rearm;
>> +	int result;
>> +
>> +	crashlog = dev_get_drvdata(dev);
>> +
>> +	result = kstrtobool(buf, &rearm);
>> +	if (result)
>> +		return result;
>> +
>> +	/* set only */
>> +	if (!rearm)
>> +		return -EINVAL;
>> +
>> +	guard(mutex)(&crashlog->control_mutex);
>> +
>> +	pmt_crashlog_set_rearm(crashlog);
>> +
>> +	return count;
>> +}
>> +static DEVICE_ATTR_RW(rearm);
>> +
>>  static ssize_t
>>  trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
>>  {
>> @@ -254,30 +463,63 @@ trigger_store(struct device *dev, struct
>device_attribute *attr,
>>  }
>>  static DEVICE_ATTR_RW(trigger);
>>
>> -static struct attribute *pmt_crashlog_attrs[] = {
>> +static struct attribute *pmt_crashlog_type1_ver0_attrs[] = {
>>  	&dev_attr_enable.attr,
>>  	&dev_attr_trigger.attr,
>>  	NULL
>>  };
>>
>> -static const struct attribute_group pmt_crashlog_group = {
>> -	.attrs	= pmt_crashlog_attrs,
>> +static struct attribute *pmt_crashlog_type1_ver2_attrs[] = {
>> +	&dev_attr_clear.attr,
>> +	&dev_attr_consumed.attr,
>> +	&dev_attr_enable.attr,
>> +	&dev_attr_error.attr,
>> +	&dev_attr_rearm.attr,
>> +	&dev_attr_trigger.attr,
>> +	NULL
>> +};
>> +
>> +static const struct attribute_group pmt_crashlog_type1_ver0_group = {
>> +	.attrs	= pmt_crashlog_type1_ver0_attrs,
>>  };
>>
>> +static const struct attribute_group pmt_crashlog_type1_ver2_group = {
>> +	.attrs = pmt_crashlog_type1_ver2_attrs,
>> +};
>> +
>> +static const struct crashlog_info *select_crashlog_info(u32 type, u32
>version)
>> +{
>> +	if (version == 0)
>> +		return &crashlog_type1_ver0;
>> +
>> +	return &crashlog_type1_ver2;
>> +}
>> +
>> +static const struct attribute_group *select_sysfs_grp(u32 type, u32 version)
>> +{
>> +	if (version == 0)
>> +		return &pmt_crashlog_type1_ver2_group;
>> +
>> +	return &pmt_crashlog_type1_ver2_group;
>> +}
>> +
>>  static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
>>  				      struct device *dev)
>>  {
>>  	void __iomem *disc_table = entry->disc_table;
>>  	struct intel_pmt_header *header = &entry->header;
>>  	struct crashlog_entry *crashlog;
>> +	u32 version;
>> +	u32 type;
>>
>> -	if (!pmt_crashlog_supported(entry))
>> +	if (!pmt_crashlog_supported(entry, &type, &version))
>>  		return 1;
>>
>>  	/* initialize the crashlog struct */
>>  	crashlog = container_of(entry, struct crashlog_entry, entry);
>>  	mutex_init(&crashlog->control_mutex);
>> -	crashlog->info = &crashlog_type1_ver0;
>> +
>> +	crashlog->info = select_crashlog_info(type, version);
>>
>>  	header->access_type = GET_ACCESS(readl(disc_table));
>>  	header->guid = readl(disc_table + GUID_OFFSET);
>> @@ -286,7 +528,7 @@ static int pmt_crashlog_header_decode(struct
>intel_pmt_entry *entry,
>>  	/* Size is measured in DWORDS, but accessor returns bytes */
>>  	header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
>>
>> -	entry->attr_grp = &pmt_crashlog_group;
>> +	entry->attr_grp = select_sysfs_grp(type, version);
>
>Can't you have this as crashlog->info->attr_grp so you don't need a
>function for selecting it?

Yes, that makes a lot of sense.  Updated.

Thank you for the comments!

M

>>
>>  	return 0;
>>  }
>>
>
>--
> i.