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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Michał Grzelak" <michal.grzelak@intel.com>,
	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Michał Grzelak" <michal.grzelak@intel.com>
Subject: Re: [RFC v1 05/11] drm/i915/buf_trans: add intel_dp_above_hbr1() helper
Date: Wed, 11 Mar 2026 11:17:18 +0200	[thread overview]
Message-ID: <5f7ce468042741bcbc323d1918a6ed6d202a7fa0@intel.com> (raw)
In-Reply-To: <20260308132446.3320848-6-michal.grzelak@intel.com>

On Sun, 08 Mar 2026, Michał Grzelak <michal.grzelak@intel.com> wrote:
> Check if port_clock is above HBR1 inside separate function.

I've got a mixture of reactions to this.

- For better or for worse, I think most people want to have these checks
  inline instead of hidden in a function.

- This whole "above hbr1" is also oddly specific. If we wanted to
  abstract this somehow, it should be generic. We have
  intel_dp_is_uhbr() because it changes everything about the link. None
  of the other rates are that special.

- If we wanted to hide the magic numbers, we'd need to define some RBR,
  HBR, etc. macros for the link rates... but then the problem is you'd
  have to remember what they mean. The numbers are easy.

- Realizing this kind of change is contentious, and unrelated to the
  feature at hand, you're probably better off dropping it (or suggesting
  it in another thread, another time) and focusing on the feature.

BR,
Jani.


>
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
>  .../drm/i915/display/intel_ddi_buf_trans.c    | 27 ++++++++++++-------
>  1 file changed, 17 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index 395dba8c9e4d..ee6a78a20dac 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1184,6 +1184,13 @@ bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table)
>  	return table == &tgl_combo_phy_trans_edp_hbr2_hobl;
>  }
>  
> +static bool intel_dp_above_hbr1(const struct intel_crtc_state *crtc_state)
> +{
> +	if (crtc_state->port_clock > 270000)
> +		return true;
> +	return false;
> +}
> +
>  static bool use_edp_hobl(struct intel_encoder *encoder)
>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> @@ -1396,7 +1403,7 @@ icl_get_mg_buf_trans_dp(struct intel_encoder *encoder,
>  			const struct intel_crtc_state *crtc_state,
>  			int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000) {
> +	if (intel_dp_above_hbr1(crtc_state)) {
>  		return intel_get_buf_trans(&icl_mg_phy_trans_hbr2_hbr3,
>  					   n_entries);
>  	} else {
> @@ -1421,7 +1428,7 @@ ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
>  			    const struct intel_crtc_state *crtc_state,
>  			    int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000)
> +	if (intel_dp_above_hbr1(crtc_state))
>  		return intel_get_buf_trans(&ehl_combo_phy_trans_edp_hbr2, n_entries);
>  	else
>  		return intel_get_buf_trans(&icl_combo_phy_trans_edp_hbr2, n_entries);
> @@ -1446,7 +1453,7 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
>  			    const struct intel_crtc_state *crtc_state,
>  			    int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000)
> +	if (intel_dp_above_hbr1(crtc_state))
>  		return intel_get_buf_trans(&jsl_combo_phy_trans_edp_hbr2, n_entries);
>  	else
>  		return intel_get_buf_trans(&jsl_combo_phy_trans_edp_hbr, n_entries);
> @@ -1473,7 +1480,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  
> -	if (crtc_state->port_clock > 270000) {
> +	if (intel_dp_above_hbr1(crtc_state)) {
>  		if (display->platform.tigerlake_uy) {
>  			return intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2,
>  						   n_entries);
> @@ -1524,7 +1531,7 @@ dg1_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  			   const struct intel_crtc_state *crtc_state,
>  			   int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000)
> +	if (intel_dp_above_hbr1(crtc_state))
>  		return intel_get_buf_trans(&dg1_combo_phy_trans_dp_hbr2_hbr3,
>  					   n_entries);
>  	else
> @@ -1568,7 +1575,7 @@ rkl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  			   const struct intel_crtc_state *crtc_state,
>  			   int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000)
> +	if (intel_dp_above_hbr1(crtc_state))
>  		return intel_get_buf_trans(&rkl_combo_phy_trans_dp_hbr2_hbr3, n_entries);
>  	else
>  		return intel_get_buf_trans(&rkl_combo_phy_trans_dp_hbr, n_entries);
> @@ -1611,7 +1618,7 @@ adls_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  			    const struct intel_crtc_state *crtc_state,
>  			    int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000)
> +	if (intel_dp_above_hbr1(crtc_state))
>  		return intel_get_buf_trans(&adls_combo_phy_trans_dp_hbr2_hbr3, n_entries);
>  	else
>  		return intel_get_buf_trans(&tgl_combo_phy_trans_dp_hbr, n_entries);
> @@ -1650,7 +1657,7 @@ adlp_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  			    const struct intel_crtc_state *crtc_state,
>  			    int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000)
> +	if (intel_dp_above_hbr1(crtc_state))
>  		return intel_get_buf_trans(&adlp_combo_phy_trans_dp_hbr2_hbr3, n_entries);
>  	else
>  		return intel_get_buf_trans(&adlp_combo_phy_trans_dp_hbr, n_entries);
> @@ -1693,7 +1700,7 @@ tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
>  			 const struct intel_crtc_state *crtc_state,
>  			 int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000) {
> +	if (intel_dp_above_hbr1(crtc_state)) {
>  		return intel_get_buf_trans(&tgl_dkl_phy_trans_dp_hbr2,
>  					   n_entries);
>  	} else {
> @@ -1718,7 +1725,7 @@ adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
>  			  const struct intel_crtc_state *crtc_state,
>  			  int *n_entries)
>  {
> -	if (crtc_state->port_clock > 270000) {
> +	if (intel_dp_above_hbr1(crtc_state)) {
>  		return intel_get_buf_trans(&adlp_dkl_phy_trans_dp_hbr2_hbr3,
>  					   n_entries);
>  	} else {

-- 
Jani Nikula, Intel

  reply	other threads:[~2026-03-11  9:17 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-08 13:24 [RFC v1 00/11] support for vswing/preemphasis override Michał Grzelak
2026-03-08 13:24 ` [RFC v1 01/11] drm/i915/bios: search for Block 57 by default Michał Grzelak
2026-03-08 13:24 ` [RFC v1 02/11] drm/i915/bios: cache V/P Override block Michał Grzelak
2026-03-08 13:24 ` [RFC v1 03/11] drm/i915/bios: remove V/P Override warning Michał Grzelak
2026-03-08 13:24 ` [RFC v1 04/11] drm/i915/bios: print V/P Override port info Michał Grzelak
2026-03-08 13:24 ` [RFC v1 05/11] drm/i915/buf_trans: add intel_dp_above_hbr1() helper Michał Grzelak
2026-03-11  9:17   ` Jani Nikula [this message]
2026-03-08 13:24 ` [RFC v1 06/11] drm/i915/buf_trans: add intel_edp_above_hbr2() helper Michał Grzelak
2026-03-11  9:19   ` Jani Nikula
2026-03-08 13:24 ` [RFC v1 07/11] drm/i915/lt: align xe3plpd with V/P Override layout Michał Grzelak
2026-03-08 13:24 ` [RFC v1 08/11] drm/i915/buf_trans: switch from u8 to u32 Michał Grzelak
2026-03-08 13:24 ` [RFC v1 09/11] drm/i915/xe3p: add V/P Override support for xe3p Michał Grzelak
2026-03-08 13:24 ` [RFC v1 10/11] drm/i915/dg2: warn on V/P Override request on dg2 Michał Grzelak
2026-03-08 13:24 ` [RFC v1 11/11] drm/i915/mtl: add V/P Override support for mtl+ Michał Grzelak
2026-03-11  9:51   ` Jani Nikula
2026-03-08 13:31 ` ✗ CI.checkpatch: warning for support for vswing/preemphasis override Patchwork
2026-03-08 13:33 ` ✓ CI.KUnit: success " Patchwork
2026-03-08 14:08 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-08 15:06 ` ✓ Xe.CI.FULL: " Patchwork

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