Re: [PATCH] drm/xe/xe3lpg: Add Wa_16024792527

["Pottumuttu, Sai Teja" <sai.teja.pottumuttu@intel.com>]

On 29-10-2024 20:07, apoorva.singh@intel.com wrote:
> From: Apoorva Singh <apoorva.singh@intel.com>
>
> Force Sampler Tile64 Overfetch via MMIO
>
> Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
> ---
>   drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 ++
>   drivers/gpu/drm/xe/xe_wa.c           | 5 +++++
>   2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 42dc55cb23f4..7ed6addd795a 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -445,6 +445,8 @@
>   
>   #define SAMPLER_MODE				XE_REG_MCR(0xe18c, XE_REG_OPTION_MASKED)
>   #define   ENABLE_SMALLPL			REG_BIT(15)
> +#define   SMP_WAIT_FETCH_MERGING_COUNTER	REG_GENMASK(11, 10)

Lets add _MASK suffix here for uniformity.

> +#define   SMP_FORCE_128B_OVERFETCH		REG_FIELD_PREP(SMP_WAIT_FETCH_MERGING_COUNTER, 1)
>   #define   SC_DISABLE_POWER_OPTIMIZATION_EBB	REG_BIT(9)
>   #define   SAMPLER_ENABLE_HEADLESS_MSG		REG_BIT(5)
>   #define   INDIRECT_STATE_BASE_ADDR_OVERRIDE	REG_BIT(0)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 02cf647f86d8..18dc5cdf7c43 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -607,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>   		       FUNC(xe_rtp_match_first_render_or_compute)),
>   	  XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))
>   	},
> +	{ XE_RTP_NAME("16024792527"),
> +	  XE_RTP_RULES(GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0),
> +		       FUNC(xe_rtp_match_first_render_or_compute)),
> +	  XE_RTP_ACTIONS(SET(SAMPLER_MODE, SMP_FORCE_128B_OVERFETCH))

We should be using FIELD_SET instead of SET here I believe.

Thank You
Sai Teja

> +	},
>   
>   	{}
>   };