From: Simon Richter <Simon.Richter@hogyros.de>
To: zhangzhijie <zhangzhijie@bosc.ac.cn>,
wangran@bosc.ac.cn, zhangjian@bosc.ac.cn,
intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v1] Support Intel Xe GPU dirver Porting on RISC-V Architecture
Date: Wed, 16 Jul 2025 13:19:25 +0900 [thread overview]
Message-ID: <60c7bebe-8bfa-4f33-ad9a-a4b366b46157@hogyros.de> (raw)
In-Reply-To: <20250715061837.2144388-1-zhangzhijie@bosc.ac.cn>
Hi,
On 7/15/25 15:18, zhangzhijie wrote:
> inb/outb speccial wire not support on other ARCH.
> Should detect whether arch platform support or not.
Are you sure these aren't memory mapped?
E.g. POWER defines a global variable with the base of the PCI mapped
area, uses that in the inb/outb macros to generate loads/stores, and
configures the root complex to forward accesses to the first 256 bytes
as I/O TLPs.
Bridges have special handling for VGA addresses, so they can be
forwarded even if no I/O ranges exist.
Also, this code is probably not used in the Xe driver -- the only VGA
accesses performed here are a palette read and subsequent write of the
same value, which is needed for some reason after turning off a voltage
regulator[1]. If the legacy ports in your system are mapped properly,
then you might not even run into that problem.
Simon
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1824
next prev parent reply other threads:[~2025-07-16 4:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-15 6:18 [PATCH v1] Support Intel Xe GPU dirver Porting on RISC-V Architecture zhangzhijie
2025-07-15 20:42 ` ✗ LGCI.VerificationFailed: failure for " Patchwork
2025-07-16 4:19 ` Simon Richter [this message]
2025-07-16 7:00 ` [PATCH v1] " zhangzhijie
2025-07-17 5:14 ` Simon Richter
2025-10-30 1:50 ` Jeff Geerling
2025-10-30 1:51 ` Jeff Geerling
2025-10-30 1:55 ` Jeff Geerling
2025-10-30 3:28 ` ZhangZhiJie
2025-10-30 13:34 ` Jani Nikula
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