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Drop the now-unused cmrr_enable > argument to intel_vrr_tg_enable(). > > No functional change intended for non-CMRR configurations. > > --v2: > - Commit message changes. > - Added Simplified enable/disable sequence. (Chaitanya) > > --v3: > - Guard CMRR enable condition (Chaitanya) > - Comment changes updated (Chaitanya) > - Squash register write commits together and > avoid double writing issue. (Chaitanya) > > --v4: > - Guard CMRR enable/disable with platform check > > Signed-off-by: Mitul Golani > Assisted-by: Claude:claude-opus-4-8 > --- > drivers/gpu/drm/i915/display/intel_vrr.c | 66 +++++++++++++++++------- > 1 file changed, 47 insertions(+), 19 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c > index e8c6516fd36a..6bc3ccd62513 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -195,6 +195,40 @@ static bool intel_vrr_cmrr_possible(const struct intel_crtc_state *crtc_state) > return (HAS_CMRR(display) && intel_vrr_always_use_vrr_tg(display)); > } > > +static void > +intel_vrr_enable_cmrr(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + This will result in CMTG instances of the registers remain unwritten. Transcoder should be passed as an argument, similar to intel_vrr_set_fixed_rr_timings() > + if (!intel_vrr_cmrr_possible(crtc_state)) > + return; > + > + intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), > + upper_32_bits(crtc_state->vrr.cmrr.cmrr_m)); > + intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), > + lower_32_bits(crtc_state->vrr.cmrr.cmrr_m)); > + intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), > + lower_32_bits(crtc_state->vrr.cmrr.cmrr_n)); > + intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), > + upper_32_bits(crtc_state->vrr.cmrr.cmrr_n)); > +} > + > +static void > +intel_vrr_disable_cmrr(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + > + if (!intel_vrr_cmrr_possible(crtc_state)) > + return; > + > + intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), 0); > + intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), 0); > + intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), 0); > + intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), 0); > +} > + > static void > intel_vrr_cmrr_compute_config(struct intel_crtc_state *crtc_state) > { > @@ -351,6 +385,11 @@ void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state, > if (!intel_vrr_possible(crtc_state)) > return; > > + if (crtc_state->vrr.cmrr.enable) > + intel_vrr_enable_cmrr(crtc_state); > + else > + intel_vrr_disable_cmrr(crtc_state); > + Is there a specific reason for having the enable/disable mechanics? Can't we just make it part of a function similar to intel_vrr_set_fixed_rr_timings() and let it program the registers with whatever value the compute config comes up with? some relevant values for enable and 0 for disable. > intel_de_write(display, TRANS_VRR_VMIN(display, transcoder), > intel_vrr_fixed_rr_hw_vmin(crtc_state) - 1); > intel_de_write(display, TRANS_VRR_VMAX(display, transcoder), > @@ -662,17 +701,6 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) > return; > } > > - if (crtc_state->vrr.cmrr.enable) { > - intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), > - upper_32_bits(crtc_state->vrr.cmrr.cmrr_m)); > - intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), > - lower_32_bits(crtc_state->vrr.cmrr.cmrr_m)); > - intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), > - upper_32_bits(crtc_state->vrr.cmrr.cmrr_n)); > - intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), > - lower_32_bits(crtc_state->vrr.cmrr.cmrr_n)); > - } > - > intel_vrr_set_fixed_rr_timings(crtc_state, cpu_transcoder); > intel_cmtg_set_vrr_timings(crtc_state); > > @@ -938,8 +966,7 @@ intel_vrr_disable_dc_balancing(const struct intel_crtc_state *old_crtc_state) > intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl); > } > > -static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state, > - bool cmrr_enable) > +static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state) > { > struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > @@ -951,11 +978,12 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state, > vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state); > > /* > - * FIXME this might be broken as bspec seems to imply that > - * even VRR_CTL_CMRR_ENABLE is armed by TRANS_CMRR_N_HI > - * when enabling CMRR (but not when disabling CMRR?). > + * This full TRANS_VRR_CTL write is the authoritative one, so it must > + * carry VRR_CTL_CMRR_ENABLE when CMRR is in use. Writing TRANS_CMRR_N_HI > + * arms the bit in hardware, but this later write would otherwise clear > + * it again. > */ > - if (cmrr_enable) > + if (crtc_state->vrr.cmrr.enable) > vrr_ctl |= VRR_CTL_CMRR_ENABLE; > Will this path ever reach through a fastset? Another thing related to the modeset/fastset semantics. In cmmr_compute config we might end up with votal different from the mode line. If we need something similar to LRR where vtotal change can be achieved through a fastset is worth checking. > intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl); > @@ -991,7 +1019,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) > intel_vrr_enable_dc_balancing(crtc_state); > > if (!intel_vrr_always_use_vrr_tg(display)) > - intel_vrr_tg_enable(crtc_state, crtc_state->vrr.cmrr.enable); > + intel_vrr_tg_enable(crtc_state); > } > > void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) > @@ -1018,7 +1046,7 @@ void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state) > return; > > if (intel_vrr_always_use_vrr_tg(display)) > - intel_vrr_tg_enable(crtc_state, false); > + intel_vrr_tg_enable(crtc_state); > } > > void intel_vrr_transcoder_disable(const struct intel_crtc_state *old_crtc_state)