* [PATCH v9 0/3] Panel Replay BW optimization
@ 2026-03-25 11:41 Animesh Manna
2026-03-25 11:41 ` [PATCH v9 1/3] drm/i915/display: Add drm helper to check pr optimization support Animesh Manna
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Animesh Manna @ 2026-03-25 11:41 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: jouni.hogander, imre.deak, jani.nikula, arun.r.murthy,
Animesh Manna
Unused bandwidth can be used by external display agents for Panel Replay
enabled DP panel during idleness with link on. This patch series
enabling the same.
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Animesh Manna (3):
drm/i915/display: Add drm helper to check pr optimization support
drm/i915/display: Add hook to check optimization support for Intel
platforms
drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
drivers/gpu/drm/display/drm_dp_tunnel.c | 17 +++++++++++++
.../gpu/drm/i915/display/intel_display_regs.h | 1 +
.../gpu/drm/i915/display/intel_dp_tunnel.c | 18 +++++++++++++
.../gpu/drm/i915/display/intel_dp_tunnel.h | 6 +++++
drivers/gpu/drm/i915/display/intel_psr.c | 25 +++++++++++++++++--
include/drm/display/drm_dp_tunnel.h | 6 +++++
6 files changed, 71 insertions(+), 2 deletions(-)
--
2.29.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v9 1/3] drm/i915/display: Add drm helper to check pr optimization support
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
@ 2026-03-25 11:41 ` Animesh Manna
2026-03-25 11:41 ` [PATCH v9 2/3] drm/i915/display: Add hook to check optimization support for Intel platforms Animesh Manna
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Animesh Manna @ 2026-03-25 11:41 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: jouni.hogander, imre.deak, jani.nikula, arun.r.murthy,
Animesh Manna
Add api to check panel replay optimization supported or not to
drm-core DP tunneling framework which can be used by other driver
as well.
v2: Split generic drm changes from Intel specific changes. [Jouni]
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Suggested-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/display/drm_dp_tunnel.c | 17 +++++++++++++++++
include/drm/display/drm_dp_tunnel.h | 6 ++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c b/drivers/gpu/drm/display/drm_dp_tunnel.c
index f442430d8de7..39c07cb4123b 100644
--- a/drivers/gpu/drm/display/drm_dp_tunnel.c
+++ b/drivers/gpu/drm/display/drm_dp_tunnel.c
@@ -149,6 +149,7 @@ struct drm_dp_tunnel {
bool bw_alloc_enabled:1;
bool has_io_error:1;
bool destroyed:1;
+ bool pr_optimization_support:1;
};
struct drm_dp_tunnel_group_state;
@@ -508,6 +509,8 @@ create_tunnel(struct drm_dp_tunnel_mgr *mgr,
tunnel->bw_alloc_supported = tunnel_reg_bw_alloc_supported(regs);
tunnel->bw_alloc_enabled = tunnel_reg_bw_alloc_enabled(regs);
+ tunnel->pr_optimization_support = tunnel_reg(regs, DP_TUNNELING_CAPABILITIES) &
+ DP_PANEL_REPLAY_OPTIMIZATION_SUPPORT;
if (!add_tunnel_to_group(mgr, drv_group_id, tunnel)) {
kfree(tunnel);
@@ -1036,6 +1039,20 @@ bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel *tunnel)
}
EXPORT_SYMBOL(drm_dp_tunnel_bw_alloc_is_enabled);
+/**
+ * drm_dp_tunnel_pr_optimization_supported - Query the PR BW optimization support
+ * @tunnel: Tunnel object
+ *
+ * Query if the PR BW optimization is supported for @tunnel.
+ *
+ * Returns %true if the PR BW optimiation is supported for @tunnel.
+ */
+bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel)
+{
+ return tunnel && tunnel->pr_optimization_support;
+}
+EXPORT_SYMBOL(drm_dp_tunnel_pr_optimization_supported);
+
static int clear_bw_req_state(struct drm_dp_aux *aux)
{
u8 bw_req_mask = DP_BW_REQUEST_SUCCEEDED | DP_BW_REQUEST_FAILED;
diff --git a/include/drm/display/drm_dp_tunnel.h b/include/drm/display/drm_dp_tunnel.h
index 87212c847915..4aa3ce9fd829 100644
--- a/include/drm/display/drm_dp_tunnel.h
+++ b/include/drm/display/drm_dp_tunnel.h
@@ -53,6 +53,7 @@ int drm_dp_tunnel_destroy(struct drm_dp_tunnel *tunnel);
int drm_dp_tunnel_enable_bw_alloc(struct drm_dp_tunnel *tunnel);
int drm_dp_tunnel_disable_bw_alloc(struct drm_dp_tunnel *tunnel);
bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel *tunnel);
+bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel);
int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw);
int drm_dp_tunnel_get_allocated_bw(struct drm_dp_tunnel *tunnel);
int drm_dp_tunnel_update_state(struct drm_dp_tunnel *tunnel);
@@ -140,6 +141,11 @@ static inline bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
return false;
}
+static inline bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel)
+{
+ return false;
+}
+
static inline int
drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw)
{
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v9 2/3] drm/i915/display: Add hook to check optimization support for Intel platforms
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
2026-03-25 11:41 ` [PATCH v9 1/3] drm/i915/display: Add drm helper to check pr optimization support Animesh Manna
@ 2026-03-25 11:41 ` Animesh Manna
2026-03-25 11:41 ` [PATCH v9 3/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling Animesh Manna
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Animesh Manna @ 2026-03-25 11:41 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: jouni.hogander, imre.deak, jani.nikula, arun.r.murthy,
Animesh Manna
Add a hook that uses the drm core tunneling function to check
whether panel replay bandwidth optimization support is present.
v2: Move DISPLAY_VER() check to
intel_dp_tunnel_pr_optimization_supported(). [Jouni]
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_tunnel.c | 18 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dp_tunnel.h | 6 ++++++
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
index 1fd1ac8d556d..b81ac9a2d727 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
@@ -296,6 +296,24 @@ bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp)
return drm_dp_tunnel_bw_alloc_is_enabled(intel_dp->tunnel);
}
+/**
+ * intel_dp_tunnel_pr_optimization_supported - Query the PR BW optimization support
+ * @intel_dp: DP port object
+ *
+ * Query whether a DP tunnel supports the PR BW optimization.
+ *
+ * Returns %true if the BW allocation mode is supported on @intel_dp.
+ */
+bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp *intel_dp)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+
+ if (DISPLAY_VER(display) < 35)
+ return false;
+
+ return drm_dp_tunnel_pr_optimization_supported(intel_dp->tunnel);
+}
+
/**
* intel_dp_tunnel_suspend - Suspend a DP tunnel connected on a port
* @intel_dp: DP port object
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
index 7f0f720e8dca..03e147736b65 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
@@ -32,6 +32,7 @@ void intel_dp_tunnel_resume(struct intel_dp *intel_dp,
void intel_dp_tunnel_suspend(struct intel_dp *intel_dp);
bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp);
+bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp *intel_dp);
void
intel_dp_tunnel_atomic_cleanup_inherited_state(struct intel_atomic_state *state);
@@ -76,6 +77,11 @@ static inline bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp
return false;
}
+static inline bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp *intel_dp)
+{
+ return false;
+}
+
static inline void
intel_dp_tunnel_atomic_cleanup_inherited_state(struct intel_atomic_state *state) {}
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v9 3/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
2026-03-25 11:41 ` [PATCH v9 1/3] drm/i915/display: Add drm helper to check pr optimization support Animesh Manna
2026-03-25 11:41 ` [PATCH v9 2/3] drm/i915/display: Add hook to check optimization support for Intel platforms Animesh Manna
@ 2026-03-25 11:41 ` Animesh Manna
2026-03-27 9:29 ` Hogander, Jouni
2026-03-25 12:57 ` ✓ CI.KUnit: success for Panel Replay BW optimization (rev3) Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 8+ messages in thread
From: Animesh Manna @ 2026-03-25 11:41 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: jouni.hogander, imre.deak, jani.nikula, arun.r.murthy,
Animesh Manna
Unused bandwidth can be used by external display agents for Panel Replay
enabled DP panel during idleness with link on. Enable source to replace
dummy data from the display with data from another agent by programming
TRANS_DP2_CTL [Panel Replay Tunneling Enable].
v2:
- Enable pr bw optimization along with panel replay enable. [Jani]
v3:
- Write TRANS_DP2_CTL once for both bw optimization and panel replay
enable. [Jani]
v4:
- Read DPCD once in init() and store in panel_replay_caps. [Jouni]
v5:
- Avoid reading DPCD for edp. [Jouni]
- Use drm_dp_dpcd_read_byte() and some cosmetic changes. [Jani]
v6:
- Extend the corresponding interface defined in drm_dp_tunnel.c
to query the Panel Replay optimization capability. [Imre]
v7:
- Clear TRANS_DP2_PR_TUNNELING_ENABLE if pr bw optimization
is not allowed. [Jouni]
- Move intel_dp_is_edp() check. [Jouni]
Bspec: 68920
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
.../gpu/drm/i915/display/intel_display_regs.h | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 25 +++++++++++++++++--
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 4746e9ebd920..dada8dc27ea4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -2263,6 +2263,7 @@
#define TRANS_DP2_CTL(trans) _MMIO_TRANS(trans, _TRANS_DP2_CTL_A, _TRANS_DP2_CTL_B)
#define TRANS_DP2_128B132B_CHANNEL_CODING REG_BIT(31)
#define TRANS_DP2_PANEL_REPLAY_ENABLE REG_BIT(30)
+#define TRANS_DP2_PR_TUNNELING_ENABLE REG_BIT(26)
#define TRANS_DP2_DEBUG_ENABLE REG_BIT(23)
#define _TRANS_DP2_VFREQHIGH_A 0x600a4
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index c13116e6f17f..992bd9ffac70 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -44,6 +44,7 @@
#include "intel_dmc.h"
#include "intel_dp.h"
#include "intel_dp_aux.h"
+#include "intel_dp_tunnel.h"
#include "intel_dsb.h"
#include "intel_frontbuffer.h"
#include "intel_hdmi.h"
@@ -1023,11 +1024,27 @@ static u8 frames_before_su_entry(struct intel_dp *intel_dp)
return frames_before_su_entry;
}
+static bool intel_psr_allow_pr_bw_optimization(struct intel_dp *intel_dp)
+{
+ if (intel_dp_is_edp(intel_dp))
+ return false;
+
+ if (!intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
+ return false;
+
+ if (!intel_dp_tunnel_pr_optimization_supported(intel_dp))
+ return false;
+
+ return true;
+}
+
static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
struct intel_psr *psr = &intel_dp->psr;
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+ u32 dp2_ctl_set = TRANS_DP2_PANEL_REPLAY_ENABLE;
+ u32 dp2_ctl_clear = 0;
if (intel_dp_is_edp(intel_dp) && psr->sel_update_enabled) {
u32 val = psr->su_region_et_enabled ?
@@ -1040,12 +1057,16 @@ static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
val);
}
+ if (intel_psr_allow_pr_bw_optimization(intel_dp))
+ dp2_ctl_set |= TRANS_DP2_PR_TUNNELING_ENABLE;
+ else
+ dp2_ctl_clear = TRANS_DP2_PR_TUNNELING_ENABLE;
+
intel_de_rmw(display,
PSR2_MAN_TRK_CTL(display, intel_dp->psr.transcoder),
0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
- intel_de_rmw(display, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
- TRANS_DP2_PANEL_REPLAY_ENABLE);
+ intel_de_rmw(display, TRANS_DP2_CTL(intel_dp->psr.transcoder), dp2_ctl_clear, dp2_ctl_set);
}
static void hsw_activate_psr2(struct intel_dp *intel_dp)
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for Panel Replay BW optimization (rev3)
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
` (2 preceding siblings ...)
2026-03-25 11:41 ` [PATCH v9 3/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling Animesh Manna
@ 2026-03-25 12:57 ` Patchwork
2026-03-25 13:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-25 20:20 ` ✓ Xe.CI.FULL: " Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-03-25 12:57 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-xe
== Series Details ==
Series: Panel Replay BW optimization (rev3)
URL : https://patchwork.freedesktop.org/series/163080/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:55:50] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:55:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:56:25] Starting KUnit Kernel (1/1)...
[12:56:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:56:25] ================== guc_buf (11 subtests) ===================
[12:56:25] [PASSED] test_smallest
[12:56:25] [PASSED] test_largest
[12:56:25] [PASSED] test_granular
[12:56:25] [PASSED] test_unique
[12:56:25] [PASSED] test_overlap
[12:56:25] [PASSED] test_reusable
[12:56:25] [PASSED] test_too_big
[12:56:25] [PASSED] test_flush
[12:56:25] [PASSED] test_lookup
[12:56:25] [PASSED] test_data
[12:56:25] [PASSED] test_class
[12:56:25] ===================== [PASSED] guc_buf =====================
[12:56:25] =================== guc_dbm (7 subtests) ===================
[12:56:25] [PASSED] test_empty
[12:56:25] [PASSED] test_default
[12:56:25] ======================== test_size ========================
[12:56:25] [PASSED] 4
[12:56:25] [PASSED] 8
[12:56:25] [PASSED] 32
[12:56:25] [PASSED] 256
[12:56:25] ==================== [PASSED] test_size ====================
[12:56:25] ======================= test_reuse ========================
[12:56:25] [PASSED] 4
[12:56:25] [PASSED] 8
[12:56:25] [PASSED] 32
[12:56:25] [PASSED] 256
[12:56:25] =================== [PASSED] test_reuse ====================
[12:56:25] =================== test_range_overlap ====================
[12:56:25] [PASSED] 4
[12:56:25] [PASSED] 8
[12:56:25] [PASSED] 32
[12:56:25] [PASSED] 256
[12:56:25] =============== [PASSED] test_range_overlap ================
[12:56:25] =================== test_range_compact ====================
[12:56:25] [PASSED] 4
[12:56:25] [PASSED] 8
[12:56:25] [PASSED] 32
[12:56:25] [PASSED] 256
[12:56:25] =============== [PASSED] test_range_compact ================
[12:56:25] ==================== test_range_spare =====================
[12:56:25] [PASSED] 4
[12:56:25] [PASSED] 8
[12:56:25] [PASSED] 32
[12:56:25] [PASSED] 256
[12:56:25] ================ [PASSED] test_range_spare =================
[12:56:25] ===================== [PASSED] guc_dbm =====================
[12:56:25] =================== guc_idm (6 subtests) ===================
[12:56:25] [PASSED] bad_init
[12:56:25] [PASSED] no_init
[12:56:25] [PASSED] init_fini
[12:56:25] [PASSED] check_used
[12:56:25] [PASSED] check_quota
[12:56:25] [PASSED] check_all
[12:56:25] ===================== [PASSED] guc_idm =====================
[12:56:25] ================== no_relay (3 subtests) ===================
[12:56:25] [PASSED] xe_drops_guc2pf_if_not_ready
[12:56:25] [PASSED] xe_drops_guc2vf_if_not_ready
[12:56:25] [PASSED] xe_rejects_send_if_not_ready
[12:56:25] ==================== [PASSED] no_relay =====================
[12:56:25] ================== pf_relay (14 subtests) ==================
[12:56:25] [PASSED] pf_rejects_guc2pf_too_short
[12:56:25] [PASSED] pf_rejects_guc2pf_too_long
[12:56:25] [PASSED] pf_rejects_guc2pf_no_payload
[12:56:25] [PASSED] pf_fails_no_payload
[12:56:25] [PASSED] pf_fails_bad_origin
[12:56:25] [PASSED] pf_fails_bad_type
[12:56:25] [PASSED] pf_txn_reports_error
[12:56:25] [PASSED] pf_txn_sends_pf2guc
[12:56:25] [PASSED] pf_sends_pf2guc
[12:56:25] [SKIPPED] pf_loopback_nop
[12:56:25] [SKIPPED] pf_loopback_echo
[12:56:25] [SKIPPED] pf_loopback_fail
[12:56:25] [SKIPPED] pf_loopback_busy
[12:56:25] [SKIPPED] pf_loopback_retry
[12:56:25] ==================== [PASSED] pf_relay =====================
[12:56:25] ================== vf_relay (3 subtests) ===================
[12:56:25] [PASSED] vf_rejects_guc2vf_too_short
[12:56:25] [PASSED] vf_rejects_guc2vf_too_long
[12:56:25] [PASSED] vf_rejects_guc2vf_no_payload
[12:56:25] ==================== [PASSED] vf_relay =====================
[12:56:25] ================ pf_gt_config (9 subtests) =================
[12:56:25] [PASSED] fair_contexts_1vf
[12:56:25] [PASSED] fair_doorbells_1vf
[12:56:25] [PASSED] fair_ggtt_1vf
[12:56:25] ====================== fair_vram_1vf ======================
[12:56:25] [PASSED] 3.50 GiB
[12:56:25] [PASSED] 11.5 GiB
[12:56:25] [PASSED] 15.5 GiB
[12:56:25] [PASSED] 31.5 GiB
[12:56:25] [PASSED] 63.5 GiB
[12:56:25] [PASSED] 1.91 GiB
[12:56:25] ================== [PASSED] fair_vram_1vf ==================
[12:56:25] ================ fair_vram_1vf_admin_only =================
[12:56:25] [PASSED] 3.50 GiB
[12:56:25] [PASSED] 11.5 GiB
[12:56:25] [PASSED] 15.5 GiB
[12:56:25] [PASSED] 31.5 GiB
[12:56:25] [PASSED] 63.5 GiB
[12:56:25] [PASSED] 1.91 GiB
[12:56:25] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:56:25] ====================== fair_contexts ======================
[12:56:25] [PASSED] 1 VF
[12:56:25] [PASSED] 2 VFs
[12:56:25] [PASSED] 3 VFs
[12:56:25] [PASSED] 4 VFs
[12:56:25] [PASSED] 5 VFs
[12:56:25] [PASSED] 6 VFs
[12:56:25] [PASSED] 7 VFs
[12:56:25] [PASSED] 8 VFs
[12:56:25] [PASSED] 9 VFs
[12:56:25] [PASSED] 10 VFs
[12:56:25] [PASSED] 11 VFs
[12:56:25] [PASSED] 12 VFs
[12:56:25] [PASSED] 13 VFs
[12:56:25] [PASSED] 14 VFs
[12:56:25] [PASSED] 15 VFs
[12:56:25] [PASSED] 16 VFs
[12:56:25] [PASSED] 17 VFs
[12:56:25] [PASSED] 18 VFs
[12:56:25] [PASSED] 19 VFs
[12:56:25] [PASSED] 20 VFs
[12:56:25] [PASSED] 21 VFs
[12:56:25] [PASSED] 22 VFs
[12:56:25] [PASSED] 23 VFs
[12:56:25] [PASSED] 24 VFs
[12:56:25] [PASSED] 25 VFs
[12:56:25] [PASSED] 26 VFs
[12:56:25] [PASSED] 27 VFs
[12:56:25] [PASSED] 28 VFs
[12:56:25] [PASSED] 29 VFs
[12:56:25] [PASSED] 30 VFs
[12:56:25] [PASSED] 31 VFs
[12:56:25] [PASSED] 32 VFs
[12:56:25] [PASSED] 33 VFs
[12:56:25] [PASSED] 34 VFs
[12:56:25] [PASSED] 35 VFs
[12:56:25] [PASSED] 36 VFs
[12:56:25] [PASSED] 37 VFs
[12:56:25] [PASSED] 38 VFs
[12:56:25] [PASSED] 39 VFs
[12:56:25] [PASSED] 40 VFs
[12:56:25] [PASSED] 41 VFs
[12:56:25] [PASSED] 42 VFs
[12:56:25] [PASSED] 43 VFs
[12:56:25] [PASSED] 44 VFs
[12:56:25] [PASSED] 45 VFs
[12:56:25] [PASSED] 46 VFs
[12:56:25] [PASSED] 47 VFs
[12:56:25] [PASSED] 48 VFs
[12:56:25] [PASSED] 49 VFs
[12:56:25] [PASSED] 50 VFs
[12:56:25] [PASSED] 51 VFs
[12:56:25] [PASSED] 52 VFs
[12:56:25] [PASSED] 53 VFs
[12:56:25] [PASSED] 54 VFs
[12:56:25] [PASSED] 55 VFs
[12:56:25] [PASSED] 56 VFs
[12:56:25] [PASSED] 57 VFs
[12:56:25] [PASSED] 58 VFs
[12:56:25] [PASSED] 59 VFs
[12:56:25] [PASSED] 60 VFs
[12:56:25] [PASSED] 61 VFs
[12:56:25] [PASSED] 62 VFs
[12:56:25] [PASSED] 63 VFs
[12:56:25] ================== [PASSED] fair_contexts ==================
[12:56:25] ===================== fair_doorbells ======================
[12:56:25] [PASSED] 1 VF
[12:56:25] [PASSED] 2 VFs
[12:56:25] [PASSED] 3 VFs
[12:56:25] [PASSED] 4 VFs
[12:56:25] [PASSED] 5 VFs
[12:56:25] [PASSED] 6 VFs
[12:56:25] [PASSED] 7 VFs
[12:56:25] [PASSED] 8 VFs
[12:56:25] [PASSED] 9 VFs
[12:56:25] [PASSED] 10 VFs
[12:56:25] [PASSED] 11 VFs
[12:56:25] [PASSED] 12 VFs
[12:56:25] [PASSED] 13 VFs
[12:56:25] [PASSED] 14 VFs
[12:56:25] [PASSED] 15 VFs
[12:56:25] [PASSED] 16 VFs
[12:56:25] [PASSED] 17 VFs
[12:56:25] [PASSED] 18 VFs
[12:56:25] [PASSED] 19 VFs
[12:56:25] [PASSED] 20 VFs
[12:56:25] [PASSED] 21 VFs
[12:56:25] [PASSED] 22 VFs
[12:56:25] [PASSED] 23 VFs
[12:56:25] [PASSED] 24 VFs
[12:56:25] [PASSED] 25 VFs
[12:56:25] [PASSED] 26 VFs
[12:56:25] [PASSED] 27 VFs
[12:56:25] [PASSED] 28 VFs
[12:56:25] [PASSED] 29 VFs
[12:56:25] [PASSED] 30 VFs
[12:56:25] [PASSED] 31 VFs
[12:56:25] [PASSED] 32 VFs
[12:56:25] [PASSED] 33 VFs
[12:56:25] [PASSED] 34 VFs
[12:56:25] [PASSED] 35 VFs
[12:56:25] [PASSED] 36 VFs
[12:56:25] [PASSED] 37 VFs
[12:56:25] [PASSED] 38 VFs
[12:56:25] [PASSED] 39 VFs
[12:56:25] [PASSED] 40 VFs
[12:56:25] [PASSED] 41 VFs
[12:56:25] [PASSED] 42 VFs
[12:56:25] [PASSED] 43 VFs
[12:56:25] [PASSED] 44 VFs
[12:56:25] [PASSED] 45 VFs
[12:56:25] [PASSED] 46 VFs
[12:56:25] [PASSED] 47 VFs
[12:56:25] [PASSED] 48 VFs
[12:56:25] [PASSED] 49 VFs
[12:56:25] [PASSED] 50 VFs
[12:56:25] [PASSED] 51 VFs
[12:56:25] [PASSED] 52 VFs
[12:56:25] [PASSED] 53 VFs
[12:56:25] [PASSED] 54 VFs
[12:56:25] [PASSED] 55 VFs
[12:56:25] [PASSED] 56 VFs
[12:56:25] [PASSED] 57 VFs
[12:56:25] [PASSED] 58 VFs
[12:56:25] [PASSED] 59 VFs
[12:56:25] [PASSED] 60 VFs
[12:56:25] [PASSED] 61 VFs
[12:56:25] [PASSED] 62 VFs
[12:56:25] [PASSED] 63 VFs
[12:56:25] ================= [PASSED] fair_doorbells ==================
[12:56:25] ======================== fair_ggtt ========================
[12:56:25] [PASSED] 1 VF
[12:56:25] [PASSED] 2 VFs
[12:56:25] [PASSED] 3 VFs
[12:56:25] [PASSED] 4 VFs
[12:56:25] [PASSED] 5 VFs
[12:56:25] [PASSED] 6 VFs
[12:56:25] [PASSED] 7 VFs
[12:56:25] [PASSED] 8 VFs
[12:56:25] [PASSED] 9 VFs
[12:56:25] [PASSED] 10 VFs
[12:56:25] [PASSED] 11 VFs
[12:56:25] [PASSED] 12 VFs
[12:56:25] [PASSED] 13 VFs
[12:56:25] [PASSED] 14 VFs
[12:56:25] [PASSED] 15 VFs
[12:56:25] [PASSED] 16 VFs
[12:56:25] [PASSED] 17 VFs
[12:56:25] [PASSED] 18 VFs
[12:56:25] [PASSED] 19 VFs
[12:56:25] [PASSED] 20 VFs
[12:56:25] [PASSED] 21 VFs
[12:56:25] [PASSED] 22 VFs
[12:56:25] [PASSED] 23 VFs
[12:56:25] [PASSED] 24 VFs
[12:56:25] [PASSED] 25 VFs
[12:56:25] [PASSED] 26 VFs
[12:56:25] [PASSED] 27 VFs
[12:56:25] [PASSED] 28 VFs
[12:56:25] [PASSED] 29 VFs
[12:56:25] [PASSED] 30 VFs
[12:56:25] [PASSED] 31 VFs
[12:56:25] [PASSED] 32 VFs
[12:56:25] [PASSED] 33 VFs
[12:56:25] [PASSED] 34 VFs
[12:56:25] [PASSED] 35 VFs
[12:56:25] [PASSED] 36 VFs
[12:56:25] [PASSED] 37 VFs
[12:56:25] [PASSED] 38 VFs
[12:56:25] [PASSED] 39 VFs
[12:56:25] [PASSED] 40 VFs
[12:56:25] [PASSED] 41 VFs
[12:56:25] [PASSED] 42 VFs
[12:56:25] [PASSED] 43 VFs
[12:56:25] [PASSED] 44 VFs
[12:56:25] [PASSED] 45 VFs
[12:56:25] [PASSED] 46 VFs
[12:56:25] [PASSED] 47 VFs
[12:56:25] [PASSED] 48 VFs
[12:56:25] [PASSED] 49 VFs
[12:56:25] [PASSED] 50 VFs
[12:56:25] [PASSED] 51 VFs
[12:56:25] [PASSED] 52 VFs
[12:56:25] [PASSED] 53 VFs
[12:56:25] [PASSED] 54 VFs
[12:56:25] [PASSED] 55 VFs
[12:56:25] [PASSED] 56 VFs
[12:56:25] [PASSED] 57 VFs
[12:56:25] [PASSED] 58 VFs
[12:56:25] [PASSED] 59 VFs
[12:56:25] [PASSED] 60 VFs
[12:56:25] [PASSED] 61 VFs
[12:56:25] [PASSED] 62 VFs
[12:56:25] [PASSED] 63 VFs
[12:56:25] ==================== [PASSED] fair_ggtt ====================
[12:56:25] ======================== fair_vram ========================
[12:56:25] [PASSED] 1 VF
[12:56:25] [PASSED] 2 VFs
[12:56:25] [PASSED] 3 VFs
[12:56:25] [PASSED] 4 VFs
[12:56:25] [PASSED] 5 VFs
[12:56:25] [PASSED] 6 VFs
[12:56:25] [PASSED] 7 VFs
[12:56:25] [PASSED] 8 VFs
[12:56:25] [PASSED] 9 VFs
[12:56:25] [PASSED] 10 VFs
[12:56:25] [PASSED] 11 VFs
[12:56:25] [PASSED] 12 VFs
[12:56:25] [PASSED] 13 VFs
[12:56:25] [PASSED] 14 VFs
[12:56:25] [PASSED] 15 VFs
[12:56:25] [PASSED] 16 VFs
[12:56:25] [PASSED] 17 VFs
[12:56:25] [PASSED] 18 VFs
[12:56:25] [PASSED] 19 VFs
[12:56:25] [PASSED] 20 VFs
[12:56:25] [PASSED] 21 VFs
[12:56:25] [PASSED] 22 VFs
[12:56:25] [PASSED] 23 VFs
[12:56:25] [PASSED] 24 VFs
[12:56:25] [PASSED] 25 VFs
[12:56:25] [PASSED] 26 VFs
[12:56:25] [PASSED] 27 VFs
[12:56:25] [PASSED] 28 VFs
[12:56:25] [PASSED] 29 VFs
[12:56:25] [PASSED] 30 VFs
[12:56:25] [PASSED] 31 VFs
[12:56:25] [PASSED] 32 VFs
[12:56:25] [PASSED] 33 VFs
[12:56:25] [PASSED] 34 VFs
[12:56:25] [PASSED] 35 VFs
[12:56:25] [PASSED] 36 VFs
[12:56:25] [PASSED] 37 VFs
[12:56:25] [PASSED] 38 VFs
[12:56:25] [PASSED] 39 VFs
[12:56:25] [PASSED] 40 VFs
[12:56:25] [PASSED] 41 VFs
[12:56:25] [PASSED] 42 VFs
[12:56:25] [PASSED] 43 VFs
[12:56:25] [PASSED] 44 VFs
[12:56:25] [PASSED] 45 VFs
[12:56:25] [PASSED] 46 VFs
[12:56:25] [PASSED] 47 VFs
[12:56:25] [PASSED] 48 VFs
[12:56:25] [PASSED] 49 VFs
[12:56:25] [PASSED] 50 VFs
[12:56:25] [PASSED] 51 VFs
[12:56:25] [PASSED] 52 VFs
[12:56:25] [PASSED] 53 VFs
[12:56:25] [PASSED] 54 VFs
[12:56:25] [PASSED] 55 VFs
[12:56:25] [PASSED] 56 VFs
[12:56:25] [PASSED] 57 VFs
[12:56:25] [PASSED] 58 VFs
[12:56:25] [PASSED] 59 VFs
[12:56:25] [PASSED] 60 VFs
[12:56:25] [PASSED] 61 VFs
[12:56:25] [PASSED] 62 VFs
[12:56:25] [PASSED] 63 VFs
[12:56:25] ==================== [PASSED] fair_vram ====================
[12:56:25] ================== [PASSED] pf_gt_config ===================
[12:56:25] ===================== lmtt (1 subtest) =====================
[12:56:25] ======================== test_ops =========================
[12:56:25] [PASSED] 2-level
[12:56:25] [PASSED] multi-level
[12:56:25] ==================== [PASSED] test_ops =====================
[12:56:25] ====================== [PASSED] lmtt =======================
[12:56:25] ================= pf_service (11 subtests) =================
[12:56:25] [PASSED] pf_negotiate_any
[12:56:25] [PASSED] pf_negotiate_base_match
[12:56:25] [PASSED] pf_negotiate_base_newer
[12:56:25] [PASSED] pf_negotiate_base_next
[12:56:25] [SKIPPED] pf_negotiate_base_older
[12:56:25] [PASSED] pf_negotiate_base_prev
[12:56:25] [PASSED] pf_negotiate_latest_match
[12:56:25] [PASSED] pf_negotiate_latest_newer
[12:56:25] [PASSED] pf_negotiate_latest_next
[12:56:25] [SKIPPED] pf_negotiate_latest_older
[12:56:25] [SKIPPED] pf_negotiate_latest_prev
[12:56:25] =================== [PASSED] pf_service ====================
[12:56:25] ================= xe_guc_g2g (2 subtests) ==================
[12:56:25] ============== xe_live_guc_g2g_kunit_default ==============
[12:56:25] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:56:25] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:56:25] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:56:25] =================== [SKIPPED] xe_guc_g2g ===================
[12:56:25] =================== xe_mocs (2 subtests) ===================
[12:56:25] ================ xe_live_mocs_kernel_kunit ================
[12:56:25] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:56:25] ================ xe_live_mocs_reset_kunit =================
[12:56:25] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:56:25] ==================== [SKIPPED] xe_mocs =====================
[12:56:25] ================= xe_migrate (2 subtests) ==================
[12:56:25] ================= xe_migrate_sanity_kunit =================
[12:56:25] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:56:25] ================== xe_validate_ccs_kunit ==================
[12:56:25] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:56:25] =================== [SKIPPED] xe_migrate ===================
[12:56:25] ================== xe_dma_buf (1 subtest) ==================
[12:56:25] ==================== xe_dma_buf_kunit =====================
[12:56:25] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:56:25] =================== [SKIPPED] xe_dma_buf ===================
[12:56:25] ================= xe_bo_shrink (1 subtest) =================
[12:56:25] =================== xe_bo_shrink_kunit ====================
[12:56:25] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:56:25] ================== [SKIPPED] xe_bo_shrink ==================
[12:56:25] ==================== xe_bo (2 subtests) ====================
[12:56:25] ================== xe_ccs_migrate_kunit ===================
[12:56:25] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:56:25] ==================== xe_bo_evict_kunit ====================
[12:56:25] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:56:25] ===================== [SKIPPED] xe_bo ======================
[12:56:25] ==================== args (13 subtests) ====================
[12:56:25] [PASSED] count_args_test
[12:56:25] [PASSED] call_args_example
[12:56:25] [PASSED] call_args_test
[12:56:25] [PASSED] drop_first_arg_example
[12:56:25] [PASSED] drop_first_arg_test
[12:56:25] [PASSED] first_arg_example
[12:56:25] [PASSED] first_arg_test
[12:56:25] [PASSED] last_arg_example
[12:56:25] [PASSED] last_arg_test
[12:56:25] [PASSED] pick_arg_example
[12:56:25] [PASSED] if_args_example
[12:56:25] [PASSED] if_args_test
[12:56:25] [PASSED] sep_comma_example
[12:56:25] ====================== [PASSED] args =======================
[12:56:25] =================== xe_pci (3 subtests) ====================
[12:56:25] ==================== check_graphics_ip ====================
[12:56:25] [PASSED] 12.00 Xe_LP
[12:56:25] [PASSED] 12.10 Xe_LP+
[12:56:25] [PASSED] 12.55 Xe_HPG
[12:56:25] [PASSED] 12.60 Xe_HPC
[12:56:25] [PASSED] 12.70 Xe_LPG
[12:56:25] [PASSED] 12.71 Xe_LPG
[12:56:25] [PASSED] 12.74 Xe_LPG+
[12:56:25] [PASSED] 20.01 Xe2_HPG
[12:56:25] [PASSED] 20.02 Xe2_HPG
[12:56:25] [PASSED] 20.04 Xe2_LPG
[12:56:25] [PASSED] 30.00 Xe3_LPG
[12:56:25] [PASSED] 30.01 Xe3_LPG
[12:56:25] [PASSED] 30.03 Xe3_LPG
[12:56:25] [PASSED] 30.04 Xe3_LPG
[12:56:25] [PASSED] 30.05 Xe3_LPG
[12:56:25] [PASSED] 35.10 Xe3p_LPG
[12:56:25] [PASSED] 35.11 Xe3p_XPC
[12:56:25] ================ [PASSED] check_graphics_ip ================
[12:56:25] ===================== check_media_ip ======================
[12:56:25] [PASSED] 12.00 Xe_M
[12:56:25] [PASSED] 12.55 Xe_HPM
[12:56:25] [PASSED] 13.00 Xe_LPM+
[12:56:25] [PASSED] 13.01 Xe2_HPM
[12:56:25] [PASSED] 20.00 Xe2_LPM
[12:56:25] [PASSED] 30.00 Xe3_LPM
[12:56:25] [PASSED] 30.02 Xe3_LPM
[12:56:25] [PASSED] 35.00 Xe3p_LPM
[12:56:25] [PASSED] 35.03 Xe3p_HPM
[12:56:25] ================= [PASSED] check_media_ip ==================
[12:56:25] =================== check_platform_desc ===================
[12:56:25] [PASSED] 0x9A60 (TIGERLAKE)
[12:56:25] [PASSED] 0x9A68 (TIGERLAKE)
[12:56:25] [PASSED] 0x9A70 (TIGERLAKE)
[12:56:25] [PASSED] 0x9A40 (TIGERLAKE)
[12:56:25] [PASSED] 0x9A49 (TIGERLAKE)
[12:56:25] [PASSED] 0x9A59 (TIGERLAKE)
[12:56:25] [PASSED] 0x9A78 (TIGERLAKE)
[12:56:25] [PASSED] 0x9AC0 (TIGERLAKE)
[12:56:25] [PASSED] 0x9AC9 (TIGERLAKE)
[12:56:25] [PASSED] 0x9AD9 (TIGERLAKE)
[12:56:25] [PASSED] 0x9AF8 (TIGERLAKE)
[12:56:25] [PASSED] 0x4C80 (ROCKETLAKE)
[12:56:25] [PASSED] 0x4C8A (ROCKETLAKE)
[12:56:25] [PASSED] 0x4C8B (ROCKETLAKE)
[12:56:25] [PASSED] 0x4C8C (ROCKETLAKE)
[12:56:25] [PASSED] 0x4C90 (ROCKETLAKE)
[12:56:25] [PASSED] 0x4C9A (ROCKETLAKE)
[12:56:25] [PASSED] 0x4680 (ALDERLAKE_S)
[12:56:25] [PASSED] 0x4682 (ALDERLAKE_S)
[12:56:25] [PASSED] 0x4688 (ALDERLAKE_S)
[12:56:25] [PASSED] 0x468A (ALDERLAKE_S)
[12:56:25] [PASSED] 0x468B (ALDERLAKE_S)
[12:56:25] [PASSED] 0x4690 (ALDERLAKE_S)
[12:56:25] [PASSED] 0x4692 (ALDERLAKE_S)
[12:56:25] [PASSED] 0x4693 (ALDERLAKE_S)
[12:56:25] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46AA (ALDERLAKE_P)
[12:56:25] [PASSED] 0x462A (ALDERLAKE_P)
[12:56:25] [PASSED] 0x4626 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x4628 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:56:25] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:56:25] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:56:25] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:56:25] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:56:25] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:56:25] [PASSED] 0xA721 (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA720 (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:56:25] [PASSED] 0xA780 (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA781 (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA782 (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA783 (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA788 (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA789 (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA78A (ALDERLAKE_S)
[12:56:25] [PASSED] 0xA78B (ALDERLAKE_S)
[12:56:25] [PASSED] 0x4905 (DG1)
[12:56:25] [PASSED] 0x4906 (DG1)
[12:56:25] [PASSED] 0x4907 (DG1)
[12:56:25] [PASSED] 0x4908 (DG1)
[12:56:25] [PASSED] 0x4909 (DG1)
[12:56:25] [PASSED] 0x56C0 (DG2)
[12:56:25] [PASSED] 0x56C2 (DG2)
[12:56:25] [PASSED] 0x56C1 (DG2)
[12:56:25] [PASSED] 0x7D51 (METEORLAKE)
[12:56:25] [PASSED] 0x7DD1 (METEORLAKE)
[12:56:25] [PASSED] 0x7D41 (METEORLAKE)
[12:56:25] [PASSED] 0x7D67 (METEORLAKE)
[12:56:25] [PASSED] 0xB640 (METEORLAKE)
[12:56:25] [PASSED] 0x56A0 (DG2)
[12:56:25] [PASSED] 0x56A1 (DG2)
[12:56:25] [PASSED] 0x56A2 (DG2)
[12:56:25] [PASSED] 0x56BE (DG2)
[12:56:25] [PASSED] 0x56BF (DG2)
[12:56:25] [PASSED] 0x5690 (DG2)
[12:56:25] [PASSED] 0x5691 (DG2)
[12:56:25] [PASSED] 0x5692 (DG2)
[12:56:25] [PASSED] 0x56A5 (DG2)
[12:56:25] [PASSED] 0x56A6 (DG2)
[12:56:25] [PASSED] 0x56B0 (DG2)
[12:56:25] [PASSED] 0x56B1 (DG2)
[12:56:25] [PASSED] 0x56BA (DG2)
[12:56:25] [PASSED] 0x56BB (DG2)
[12:56:25] [PASSED] 0x56BC (DG2)
[12:56:25] [PASSED] 0x56BD (DG2)
[12:56:25] [PASSED] 0x5693 (DG2)
[12:56:25] [PASSED] 0x5694 (DG2)
[12:56:25] [PASSED] 0x5695 (DG2)
[12:56:25] [PASSED] 0x56A3 (DG2)
[12:56:25] [PASSED] 0x56A4 (DG2)
[12:56:25] [PASSED] 0x56B2 (DG2)
[12:56:25] [PASSED] 0x56B3 (DG2)
[12:56:25] [PASSED] 0x5696 (DG2)
[12:56:25] [PASSED] 0x5697 (DG2)
[12:56:25] [PASSED] 0xB69 (PVC)
[12:56:25] [PASSED] 0xB6E (PVC)
[12:56:25] [PASSED] 0xBD4 (PVC)
[12:56:25] [PASSED] 0xBD5 (PVC)
[12:56:25] [PASSED] 0xBD6 (PVC)
[12:56:25] [PASSED] 0xBD7 (PVC)
[12:56:25] [PASSED] 0xBD8 (PVC)
[12:56:25] [PASSED] 0xBD9 (PVC)
[12:56:25] [PASSED] 0xBDA (PVC)
[12:56:25] [PASSED] 0xBDB (PVC)
[12:56:25] [PASSED] 0xBE0 (PVC)
[12:56:25] [PASSED] 0xBE1 (PVC)
[12:56:25] [PASSED] 0xBE5 (PVC)
[12:56:25] [PASSED] 0x7D40 (METEORLAKE)
[12:56:25] [PASSED] 0x7D45 (METEORLAKE)
[12:56:25] [PASSED] 0x7D55 (METEORLAKE)
[12:56:25] [PASSED] 0x7D60 (METEORLAKE)
[12:56:25] [PASSED] 0x7DD5 (METEORLAKE)
[12:56:25] [PASSED] 0x6420 (LUNARLAKE)
[12:56:25] [PASSED] 0x64A0 (LUNARLAKE)
[12:56:25] [PASSED] 0x64B0 (LUNARLAKE)
[12:56:25] [PASSED] 0xE202 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE209 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE20B (BATTLEMAGE)
[12:56:25] [PASSED] 0xE20C (BATTLEMAGE)
[12:56:25] [PASSED] 0xE20D (BATTLEMAGE)
[12:56:25] [PASSED] 0xE210 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE211 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE212 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE216 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE220 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE221 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE222 (BATTLEMAGE)
[12:56:25] [PASSED] 0xE223 (BATTLEMAGE)
[12:56:25] [PASSED] 0xB080 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB081 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB082 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB083 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB084 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB085 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB086 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB087 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB08F (PANTHERLAKE)
[12:56:25] [PASSED] 0xB090 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:56:25] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:56:25] [PASSED] 0xFD80 (PANTHERLAKE)
[12:56:25] [PASSED] 0xFD81 (PANTHERLAKE)
[12:56:25] [PASSED] 0xD740 (NOVALAKE_S)
[12:56:25] [PASSED] 0xD741 (NOVALAKE_S)
[12:56:25] [PASSED] 0xD742 (NOVALAKE_S)
[12:56:25] [PASSED] 0xD743 (NOVALAKE_S)
[12:56:25] [PASSED] 0xD744 (NOVALAKE_S)
[12:56:25] [PASSED] 0xD745 (NOVALAKE_S)
[12:56:25] [PASSED] 0x674C (CRESCENTISLAND)
[12:56:25] [PASSED] 0xD750 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD751 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD752 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD753 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD754 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD755 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD756 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD757 (NOVALAKE_P)
[12:56:25] [PASSED] 0xD75F (NOVALAKE_P)
[12:56:25] =============== [PASSED] check_platform_desc ===============
[12:56:25] ===================== [PASSED] xe_pci ======================
[12:56:25] =================== xe_rtp (2 subtests) ====================
[12:56:25] =============== xe_rtp_process_to_sr_tests ================
[12:56:25] [PASSED] coalesce-same-reg
[12:56:25] [PASSED] no-match-no-add
[12:56:25] [PASSED] match-or
[12:56:25] [PASSED] match-or-xfail
[12:56:25] [PASSED] no-match-no-add-multiple-rules
[12:56:25] [PASSED] two-regs-two-entries
[12:56:25] [PASSED] clr-one-set-other
[12:56:25] [PASSED] set-field
[12:56:25] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[12:56:25] [PASSED] conflict-not-disjoint
[12:56:25] [PASSED] conflict-reg-type
[12:56:25] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:56:25] ================== xe_rtp_process_tests ===================
[12:56:25] [PASSED] active1
[12:56:25] [PASSED] active2
[12:56:25] [PASSED] active-inactive
[12:56:25] [PASSED] inactive-active
[12:56:25] [PASSED] inactive-1st_or_active-inactive
[12:56:25] [PASSED] inactive-2nd_or_active-inactive
[12:56:25] [PASSED] inactive-last_or_active-inactive
[12:56:25] [PASSED] inactive-no_or_active-inactive
[12:56:25] ============== [PASSED] xe_rtp_process_tests ===============
[12:56:25] ===================== [PASSED] xe_rtp ======================
[12:56:25] ==================== xe_wa (1 subtest) =====================
[12:56:25] ======================== xe_wa_gt =========================
[12:56:25] [PASSED] TIGERLAKE B0
[12:56:25] [PASSED] DG1 A0
[12:56:25] [PASSED] DG1 B0
[12:56:25] [PASSED] ALDERLAKE_S A0
[12:56:25] [PASSED] ALDERLAKE_S B0
[12:56:25] [PASSED] ALDERLAKE_S C0
[12:56:25] [PASSED] ALDERLAKE_S D0
[12:56:25] [PASSED] ALDERLAKE_P A0
[12:56:25] [PASSED] ALDERLAKE_P B0
[12:56:25] [PASSED] ALDERLAKE_P C0
[12:56:25] [PASSED] ALDERLAKE_S RPLS D0
[12:56:25] [PASSED] ALDERLAKE_P RPLU E0
[12:56:25] [PASSED] DG2 G10 C0
[12:56:25] [PASSED] DG2 G11 B1
[12:56:25] [PASSED] DG2 G12 A1
[12:56:25] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:56:25] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:56:25] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:56:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:56:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:56:25] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:56:25] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:56:25] ==================== [PASSED] xe_wa_gt =====================
[12:56:25] ====================== [PASSED] xe_wa ======================
[12:56:25] ============================================================
[12:56:25] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[12:56:25] Elapsed time: 35.366s total, 4.233s configuring, 30.515s building, 0.602s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:56:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:56:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:56:51] Starting KUnit Kernel (1/1)...
[12:56:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:56:51] ============ drm_test_pick_cmdline (2 subtests) ============
[12:56:51] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:56:51] =============== drm_test_pick_cmdline_named ===============
[12:56:51] [PASSED] NTSC
[12:56:51] [PASSED] NTSC-J
[12:56:51] [PASSED] PAL
[12:56:51] [PASSED] PAL-M
[12:56:51] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:56:51] ============== [PASSED] drm_test_pick_cmdline ==============
[12:56:51] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:56:51] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:56:51] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:56:51] =========== drm_validate_clone_mode (2 subtests) ===========
[12:56:51] ============== drm_test_check_in_clone_mode ===============
[12:56:51] [PASSED] in_clone_mode
[12:56:51] [PASSED] not_in_clone_mode
[12:56:51] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:56:51] =============== drm_test_check_valid_clones ===============
[12:56:51] [PASSED] not_in_clone_mode
[12:56:51] [PASSED] valid_clone
[12:56:51] [PASSED] invalid_clone
[12:56:51] =========== [PASSED] drm_test_check_valid_clones ===========
[12:56:51] ============= [PASSED] drm_validate_clone_mode =============
[12:56:51] ============= drm_validate_modeset (1 subtest) =============
[12:56:51] [PASSED] drm_test_check_connector_changed_modeset
[12:56:51] ============== [PASSED] drm_validate_modeset ===============
[12:56:51] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:56:51] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:56:51] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:56:51] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:56:51] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:56:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:56:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:56:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:56:51] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:56:51] ============== drm_bridge_alloc (2 subtests) ===============
[12:56:51] [PASSED] drm_test_drm_bridge_alloc_basic
[12:56:51] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:56:51] ================ [PASSED] drm_bridge_alloc =================
[12:56:51] ============= drm_cmdline_parser (40 subtests) =============
[12:56:51] [PASSED] drm_test_cmdline_force_d_only
[12:56:51] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:56:51] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:56:51] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:56:51] [PASSED] drm_test_cmdline_force_e_only
[12:56:51] [PASSED] drm_test_cmdline_res
[12:56:51] [PASSED] drm_test_cmdline_res_vesa
[12:56:51] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:56:51] [PASSED] drm_test_cmdline_res_rblank
[12:56:51] [PASSED] drm_test_cmdline_res_bpp
[12:56:51] [PASSED] drm_test_cmdline_res_refresh
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:56:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:56:51] [PASSED] drm_test_cmdline_res_margins_force_on
[12:56:51] [PASSED] drm_test_cmdline_res_vesa_margins
[12:56:51] [PASSED] drm_test_cmdline_name
[12:56:51] [PASSED] drm_test_cmdline_name_bpp
[12:56:51] [PASSED] drm_test_cmdline_name_option
[12:56:51] [PASSED] drm_test_cmdline_name_bpp_option
[12:56:51] [PASSED] drm_test_cmdline_rotate_0
[12:56:51] [PASSED] drm_test_cmdline_rotate_90
[12:56:51] [PASSED] drm_test_cmdline_rotate_180
[12:56:51] [PASSED] drm_test_cmdline_rotate_270
[12:56:51] [PASSED] drm_test_cmdline_hmirror
[12:56:51] [PASSED] drm_test_cmdline_vmirror
[12:56:51] [PASSED] drm_test_cmdline_margin_options
[12:56:51] [PASSED] drm_test_cmdline_multiple_options
[12:56:51] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:56:51] [PASSED] drm_test_cmdline_extra_and_option
[12:56:51] [PASSED] drm_test_cmdline_freestanding_options
[12:56:51] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:56:51] [PASSED] drm_test_cmdline_panel_orientation
[12:56:51] ================ drm_test_cmdline_invalid =================
[12:56:51] [PASSED] margin_only
[12:56:51] [PASSED] interlace_only
[12:56:51] [PASSED] res_missing_x
[12:56:51] [PASSED] res_missing_y
[12:56:51] [PASSED] res_bad_y
[12:56:51] [PASSED] res_missing_y_bpp
[12:56:51] [PASSED] res_bad_bpp
[12:56:51] [PASSED] res_bad_refresh
[12:56:51] [PASSED] res_bpp_refresh_force_on_off
[12:56:51] [PASSED] res_invalid_mode
[12:56:51] [PASSED] res_bpp_wrong_place_mode
[12:56:51] [PASSED] name_bpp_refresh
[12:56:51] [PASSED] name_refresh
[12:56:51] [PASSED] name_refresh_wrong_mode
[12:56:51] [PASSED] name_refresh_invalid_mode
[12:56:51] [PASSED] rotate_multiple
[12:56:51] [PASSED] rotate_invalid_val
[12:56:51] [PASSED] rotate_truncated
[12:56:51] [PASSED] invalid_option
[12:56:51] [PASSED] invalid_tv_option
[12:56:51] [PASSED] truncated_tv_option
[12:56:51] ============ [PASSED] drm_test_cmdline_invalid =============
[12:56:51] =============== drm_test_cmdline_tv_options ===============
[12:56:51] [PASSED] NTSC
[12:56:51] [PASSED] NTSC_443
[12:56:51] [PASSED] NTSC_J
[12:56:51] [PASSED] PAL
[12:56:51] [PASSED] PAL_M
[12:56:51] [PASSED] PAL_N
[12:56:51] [PASSED] SECAM
[12:56:51] [PASSED] MONO_525
[12:56:51] [PASSED] MONO_625
[12:56:51] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:56:51] =============== [PASSED] drm_cmdline_parser ================
[12:56:51] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:56:51] [PASSED] drm_test_connector_hdmi_init_valid
[12:56:51] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:56:51] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:56:51] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:56:51] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:56:51] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:56:51] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:56:51] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:56:51] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:56:51] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:56:51] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:56:51] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:56:51] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:56:51] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:56:51] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:56:51] [PASSED] drm_test_connector_hdmi_init_null_product
[12:56:51] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:56:51] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:56:51] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:56:51] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:56:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:56:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:56:51] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:56:51] ========= drm_test_connector_hdmi_init_type_valid =========
[12:56:51] [PASSED] HDMI-A
[12:56:51] [PASSED] HDMI-B
[12:56:51] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:56:51] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:56:51] [PASSED] Unknown
[12:56:51] [PASSED] VGA
[12:56:51] [PASSED] DVI-I
[12:56:51] [PASSED] DVI-D
[12:56:51] [PASSED] DVI-A
[12:56:51] [PASSED] Composite
[12:56:51] [PASSED] SVIDEO
[12:56:51] [PASSED] LVDS
[12:56:51] [PASSED] Component
[12:56:51] [PASSED] DIN
[12:56:51] [PASSED] DP
[12:56:51] [PASSED] TV
[12:56:51] [PASSED] eDP
[12:56:51] [PASSED] Virtual
[12:56:51] [PASSED] DSI
[12:56:51] [PASSED] DPI
[12:56:51] [PASSED] Writeback
[12:56:51] [PASSED] SPI
[12:56:51] [PASSED] USB
[12:56:51] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:56:51] ============ [PASSED] drmm_connector_hdmi_init =============
[12:56:51] ============= drmm_connector_init (3 subtests) =============
[12:56:51] [PASSED] drm_test_drmm_connector_init
[12:56:51] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:56:51] ========= drm_test_drmm_connector_init_type_valid =========
[12:56:51] [PASSED] Unknown
[12:56:51] [PASSED] VGA
[12:56:51] [PASSED] DVI-I
[12:56:51] [PASSED] DVI-D
[12:56:51] [PASSED] DVI-A
[12:56:51] [PASSED] Composite
[12:56:51] [PASSED] SVIDEO
[12:56:51] [PASSED] LVDS
[12:56:51] [PASSED] Component
[12:56:51] [PASSED] DIN
[12:56:51] [PASSED] DP
[12:56:51] [PASSED] HDMI-A
[12:56:51] [PASSED] HDMI-B
[12:56:51] [PASSED] TV
[12:56:51] [PASSED] eDP
[12:56:51] [PASSED] Virtual
[12:56:51] [PASSED] DSI
[12:56:51] [PASSED] DPI
[12:56:51] [PASSED] Writeback
[12:56:51] [PASSED] SPI
[12:56:51] [PASSED] USB
[12:56:51] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:56:51] =============== [PASSED] drmm_connector_init ===============
[12:56:51] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_init
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:56:51] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:56:51] [PASSED] Unknown
[12:56:51] [PASSED] VGA
[12:56:51] [PASSED] DVI-I
[12:56:51] [PASSED] DVI-D
[12:56:51] [PASSED] DVI-A
[12:56:51] [PASSED] Composite
[12:56:51] [PASSED] SVIDEO
[12:56:51] [PASSED] LVDS
[12:56:51] [PASSED] Component
[12:56:51] [PASSED] DIN
[12:56:51] [PASSED] DP
[12:56:51] [PASSED] HDMI-A
[12:56:51] [PASSED] HDMI-B
[12:56:51] [PASSED] TV
[12:56:51] [PASSED] eDP
[12:56:51] [PASSED] Virtual
[12:56:51] [PASSED] DSI
[12:56:51] [PASSED] DPI
[12:56:51] [PASSED] Writeback
[12:56:51] [PASSED] SPI
[12:56:51] [PASSED] USB
[12:56:51] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:56:51] ======== drm_test_drm_connector_dynamic_init_name =========
[12:56:51] [PASSED] Unknown
[12:56:51] [PASSED] VGA
[12:56:51] [PASSED] DVI-I
[12:56:51] [PASSED] DVI-D
[12:56:51] [PASSED] DVI-A
[12:56:51] [PASSED] Composite
[12:56:51] [PASSED] SVIDEO
[12:56:51] [PASSED] LVDS
[12:56:51] [PASSED] Component
[12:56:51] [PASSED] DIN
[12:56:51] [PASSED] DP
[12:56:51] [PASSED] HDMI-A
[12:56:51] [PASSED] HDMI-B
[12:56:51] [PASSED] TV
[12:56:51] [PASSED] eDP
[12:56:51] [PASSED] Virtual
[12:56:51] [PASSED] DSI
[12:56:51] [PASSED] DPI
[12:56:51] [PASSED] Writeback
[12:56:51] [PASSED] SPI
[12:56:51] [PASSED] USB
[12:56:51] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:56:51] =========== [PASSED] drm_connector_dynamic_init ============
[12:56:51] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:56:51] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:56:51] ======= drm_connector_dynamic_register (7 subtests) ========
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:56:51] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:56:51] ========= [PASSED] drm_connector_dynamic_register ==========
[12:56:51] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:56:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:56:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:56:51] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:56:51] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:56:51] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:56:51] [PASSED] NTSC
[12:56:51] [PASSED] NTSC-443
[12:56:51] [PASSED] NTSC-J
[12:56:51] [PASSED] PAL
[12:56:51] [PASSED] PAL-M
[12:56:51] [PASSED] PAL-N
[12:56:51] [PASSED] SECAM
[12:56:51] [PASSED] Mono
[12:56:51] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:56:51] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:56:51] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:56:51] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:56:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:56:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:56:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:56:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:56:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:56:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:56:51] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:56:51] [PASSED] VIC 96
[12:56:51] [PASSED] VIC 97
[12:56:51] [PASSED] VIC 101
[12:56:51] [PASSED] VIC 102
[12:56:51] [PASSED] VIC 106
[12:56:51] [PASSED] VIC 107
[12:56:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:56:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:56:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:56:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:56:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:56:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:56:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:56:51] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:56:51] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:56:51] [PASSED] Automatic
[12:56:51] [PASSED] Full
[12:56:51] [PASSED] Limited 16:235
[12:56:51] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:56:51] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:56:51] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:56:51] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:56:51] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:56:51] [PASSED] RGB
[12:56:51] [PASSED] YUV 4:2:0
[12:56:51] [PASSED] YUV 4:2:2
[12:56:51] [PASSED] YUV 4:4:4
[12:56:51] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:56:51] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:56:51] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:56:51] ============= drm_damage_helper (21 subtests) ==============
[12:56:51] [PASSED] drm_test_damage_iter_no_damage
[12:56:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:56:51] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:56:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:56:51] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:56:51] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:56:51] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:56:51] [PASSED] drm_test_damage_iter_simple_damage
[12:56:51] [PASSED] drm_test_damage_iter_single_damage
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:56:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:56:51] [PASSED] drm_test_damage_iter_damage
[12:56:51] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:56:51] [PASSED] drm_test_damage_iter_damage_one_outside
[12:56:51] [PASSED] drm_test_damage_iter_damage_src_moved
[12:56:51] [PASSED] drm_test_damage_iter_damage_not_visible
[12:56:51] ================ [PASSED] drm_damage_helper ================
[12:56:51] ============== drm_dp_mst_helper (3 subtests) ==============
[12:56:51] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:56:51] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:56:51] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:56:51] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:56:51] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:56:51] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:56:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:56:51] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:56:51] [PASSED] Link rate 2000000 lane count 4
[12:56:51] [PASSED] Link rate 2000000 lane count 2
[12:56:51] [PASSED] Link rate 2000000 lane count 1
[12:56:51] [PASSED] Link rate 1350000 lane count 4
[12:56:51] [PASSED] Link rate 1350000 lane count 2
[12:56:51] [PASSED] Link rate 1350000 lane count 1
[12:56:51] [PASSED] Link rate 1000000 lane count 4
[12:56:51] [PASSED] Link rate 1000000 lane count 2
[12:56:51] [PASSED] Link rate 1000000 lane count 1
[12:56:51] [PASSED] Link rate 810000 lane count 4
[12:56:51] [PASSED] Link rate 810000 lane count 2
[12:56:51] [PASSED] Link rate 810000 lane count 1
[12:56:51] [PASSED] Link rate 540000 lane count 4
[12:56:51] [PASSED] Link rate 540000 lane count 2
[12:56:51] [PASSED] Link rate 540000 lane count 1
[12:56:51] [PASSED] Link rate 270000 lane count 4
[12:56:51] [PASSED] Link rate 270000 lane count 2
[12:56:51] [PASSED] Link rate 270000 lane count 1
[12:56:51] [PASSED] Link rate 162000 lane count 4
[12:56:51] [PASSED] Link rate 162000 lane count 2
[12:56:51] [PASSED] Link rate 162000 lane count 1
[12:56:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:56:51] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:56:51] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:56:51] [PASSED] DP_POWER_UP_PHY with port number
[12:56:51] [PASSED] DP_POWER_DOWN_PHY with port number
[12:56:51] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:56:51] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:56:51] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:56:51] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:56:51] [PASSED] DP_QUERY_PAYLOAD with port number
[12:56:51] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:56:51] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:56:51] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:56:51] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:56:51] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:56:51] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:56:51] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:56:51] [PASSED] DP_REMOTE_I2C_READ with port number
[12:56:51] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:56:51] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:56:51] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:56:51] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:56:51] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:56:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:56:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:56:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:56:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:56:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:56:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:56:51] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:56:51] ================ [PASSED] drm_dp_mst_helper ================
[12:56:51] ================== drm_exec (7 subtests) ===================
[12:56:51] [PASSED] sanitycheck
[12:56:51] [PASSED] test_lock
[12:56:51] [PASSED] test_lock_unlock
[12:56:51] [PASSED] test_duplicates
[12:56:51] [PASSED] test_prepare
[12:56:51] [PASSED] test_prepare_array
[12:56:51] [PASSED] test_multiple_loops
[12:56:51] ==================== [PASSED] drm_exec =====================
[12:56:51] =========== drm_format_helper_test (17 subtests) ===========
[12:56:51] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:56:51] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:56:51] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:56:51] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:56:51] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:56:51] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:56:51] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:56:51] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:56:51] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:56:51] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:56:51] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:56:51] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:56:51] ==================== drm_test_fb_swab =====================
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ================ [PASSED] drm_test_fb_swab =================
[12:56:51] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:56:51] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:56:51] [PASSED] single_pixel_source_buffer
[12:56:51] [PASSED] single_pixel_clip_rectangle
[12:56:51] [PASSED] well_known_colors
[12:56:51] [PASSED] destination_pitch
[12:56:51] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:56:51] ================= drm_test_fb_clip_offset =================
[12:56:51] [PASSED] pass through
[12:56:51] [PASSED] horizontal offset
[12:56:51] [PASSED] vertical offset
[12:56:51] [PASSED] horizontal and vertical offset
[12:56:51] [PASSED] horizontal offset (custom pitch)
[12:56:51] [PASSED] vertical offset (custom pitch)
[12:56:51] [PASSED] horizontal and vertical offset (custom pitch)
[12:56:51] ============= [PASSED] drm_test_fb_clip_offset =============
[12:56:51] =================== drm_test_fb_memcpy ====================
[12:56:51] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:56:51] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:56:51] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:56:51] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:56:51] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:56:51] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:56:51] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:56:51] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:56:51] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:56:51] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:56:51] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:56:51] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:56:51] =============== [PASSED] drm_test_fb_memcpy ================
[12:56:51] ============= [PASSED] drm_format_helper_test ==============
[12:56:51] ================= drm_format (18 subtests) =================
[12:56:51] [PASSED] drm_test_format_block_width_invalid
[12:56:51] [PASSED] drm_test_format_block_width_one_plane
[12:56:51] [PASSED] drm_test_format_block_width_two_plane
[12:56:51] [PASSED] drm_test_format_block_width_three_plane
[12:56:51] [PASSED] drm_test_format_block_width_tiled
[12:56:51] [PASSED] drm_test_format_block_height_invalid
[12:56:51] [PASSED] drm_test_format_block_height_one_plane
[12:56:51] [PASSED] drm_test_format_block_height_two_plane
[12:56:51] [PASSED] drm_test_format_block_height_three_plane
[12:56:51] [PASSED] drm_test_format_block_height_tiled
[12:56:51] [PASSED] drm_test_format_min_pitch_invalid
[12:56:51] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:56:51] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:56:51] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:56:51] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:56:51] [PASSED] drm_test_format_min_pitch_two_plane
[12:56:51] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:56:51] [PASSED] drm_test_format_min_pitch_tiled
[12:56:51] =================== [PASSED] drm_format ====================
[12:56:51] ============== drm_framebuffer (10 subtests) ===============
[12:56:51] ========== drm_test_framebuffer_check_src_coords ==========
[12:56:51] [PASSED] Success: source fits into fb
[12:56:51] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:56:51] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:56:51] [PASSED] Fail: overflowing fb with source width
[12:56:51] [PASSED] Fail: overflowing fb with source height
[12:56:51] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:56:51] [PASSED] drm_test_framebuffer_cleanup
[12:56:51] =============== drm_test_framebuffer_create ===============
[12:56:51] [PASSED] ABGR8888 normal sizes
[12:56:51] [PASSED] ABGR8888 max sizes
[12:56:51] [PASSED] ABGR8888 pitch greater than min required
[12:56:51] [PASSED] ABGR8888 pitch less than min required
[12:56:51] [PASSED] ABGR8888 Invalid width
[12:56:51] [PASSED] ABGR8888 Invalid buffer handle
[12:56:51] [PASSED] No pixel format
[12:56:51] [PASSED] ABGR8888 Width 0
[12:56:51] [PASSED] ABGR8888 Height 0
[12:56:51] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:56:51] [PASSED] ABGR8888 Large buffer offset
[12:56:51] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:56:51] [PASSED] ABGR8888 Invalid flag
[12:56:51] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:56:51] [PASSED] ABGR8888 Valid buffer modifier
[12:56:51] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:56:51] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] NV12 Normal sizes
[12:56:51] [PASSED] NV12 Max sizes
[12:56:51] [PASSED] NV12 Invalid pitch
[12:56:51] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:56:51] [PASSED] NV12 different modifier per-plane
[12:56:51] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:56:51] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] NV12 Modifier for inexistent plane
[12:56:51] [PASSED] NV12 Handle for inexistent plane
[12:56:51] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:56:51] [PASSED] YVU420 Normal sizes
[12:56:51] [PASSED] YVU420 Max sizes
[12:56:51] [PASSED] YVU420 Invalid pitch
[12:56:51] [PASSED] YVU420 Different pitches
[12:56:51] [PASSED] YVU420 Different buffer offsets/pitches
[12:56:51] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:56:51] [PASSED] YVU420 Valid modifier
[12:56:51] [PASSED] YVU420 Different modifiers per plane
[12:56:51] [PASSED] YVU420 Modifier for inexistent plane
[12:56:51] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:56:51] [PASSED] X0L2 Normal sizes
[12:56:51] [PASSED] X0L2 Max sizes
[12:56:51] [PASSED] X0L2 Invalid pitch
[12:56:51] [PASSED] X0L2 Pitch greater than minimum required
[12:56:51] [PASSED] X0L2 Handle for inexistent plane
[12:56:51] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:56:51] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:56:51] [PASSED] X0L2 Valid modifier
[12:56:51] [PASSED] X0L2 Modifier for inexistent plane
[12:56:51] =========== [PASSED] drm_test_framebuffer_create ===========
[12:56:51] [PASSED] drm_test_framebuffer_free
[12:56:51] [PASSED] drm_test_framebuffer_init
[12:56:51] [PASSED] drm_test_framebuffer_init_bad_format
[12:56:51] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:56:51] [PASSED] drm_test_framebuffer_lookup
[12:56:51] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:56:51] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:56:51] ================= [PASSED] drm_framebuffer =================
[12:56:51] ================ drm_gem_shmem (8 subtests) ================
[12:56:51] [PASSED] drm_gem_shmem_test_obj_create
[12:56:51] [PASSED] drm_gem_shmem_test_obj_create_private
[12:56:51] [PASSED] drm_gem_shmem_test_pin_pages
[12:56:51] [PASSED] drm_gem_shmem_test_vmap
[12:56:51] [PASSED] drm_gem_shmem_test_get_sg_table
[12:56:51] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:56:51] [PASSED] drm_gem_shmem_test_madvise
[12:56:51] [PASSED] drm_gem_shmem_test_purge
[12:56:51] ================== [PASSED] drm_gem_shmem ==================
[12:56:51] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:56:51] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:56:51] [PASSED] Automatic
[12:56:51] [PASSED] Full
[12:56:51] [PASSED] Limited 16:235
[12:56:51] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:56:51] [PASSED] drm_test_check_disable_connector
[12:56:51] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:56:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:56:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:56:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:56:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:56:51] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:56:51] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:56:51] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:56:51] [PASSED] drm_test_check_output_bpc_dvi
[12:56:51] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:56:51] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:56:51] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:56:51] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:56:51] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:56:51] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:56:51] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:56:51] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:56:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:56:51] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:56:51] [PASSED] drm_test_check_broadcast_rgb_value
[12:56:51] [PASSED] drm_test_check_bpc_8_value
[12:56:51] [PASSED] drm_test_check_bpc_10_value
[12:56:51] [PASSED] drm_test_check_bpc_12_value
[12:56:51] [PASSED] drm_test_check_format_value
[12:56:51] [PASSED] drm_test_check_tmds_char_value
[12:56:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:56:51] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:56:51] [PASSED] drm_test_check_mode_valid
[12:56:51] [PASSED] drm_test_check_mode_valid_reject
[12:56:51] [PASSED] drm_test_check_mode_valid_reject_rate
[12:56:51] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:56:51] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:56:51] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:56:51] [PASSED] drm_test_check_infoframes
[12:56:51] [PASSED] drm_test_check_reject_avi_infoframe
[12:56:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:56:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:56:51] [PASSED] drm_test_check_reject_audio_infoframe
[12:56:51] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:56:51] ================= drm_managed (2 subtests) =================
[12:56:51] [PASSED] drm_test_managed_release_action
[12:56:51] [PASSED] drm_test_managed_run_action
[12:56:51] =================== [PASSED] drm_managed ===================
[12:56:51] =================== drm_mm (6 subtests) ====================
[12:56:51] [PASSED] drm_test_mm_init
[12:56:51] [PASSED] drm_test_mm_debug
[12:56:51] [PASSED] drm_test_mm_align32
[12:56:51] [PASSED] drm_test_mm_align64
[12:56:51] [PASSED] drm_test_mm_lowest
[12:56:51] [PASSED] drm_test_mm_highest
[12:56:51] ===================== [PASSED] drm_mm ======================
[12:56:51] ============= drm_modes_analog_tv (5 subtests) =============
[12:56:51] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:56:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:56:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:56:51] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:56:51] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:56:51] =============== [PASSED] drm_modes_analog_tv ===============
[12:56:51] ============== drm_plane_helper (2 subtests) ===============
[12:56:51] =============== drm_test_check_plane_state ================
[12:56:51] [PASSED] clipping_simple
[12:56:51] [PASSED] clipping_rotate_reflect
[12:56:51] [PASSED] positioning_simple
[12:56:51] [PASSED] upscaling
[12:56:51] [PASSED] downscaling
[12:56:51] [PASSED] rounding1
[12:56:51] [PASSED] rounding2
[12:56:51] [PASSED] rounding3
[12:56:51] [PASSED] rounding4
[12:56:51] =========== [PASSED] drm_test_check_plane_state ============
[12:56:51] =========== drm_test_check_invalid_plane_state ============
[12:56:51] [PASSED] positioning_invalid
[12:56:51] [PASSED] upscaling_invalid
[12:56:51] [PASSED] downscaling_invalid
[12:56:51] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:56:51] ================ [PASSED] drm_plane_helper =================
[12:56:51] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:56:51] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:56:51] [PASSED] None
[12:56:51] [PASSED] PAL
[12:56:51] [PASSED] NTSC
[12:56:51] [PASSED] Both, NTSC Default
[12:56:51] [PASSED] Both, PAL Default
[12:56:51] [PASSED] Both, NTSC Default, with PAL on command-line
[12:56:51] [PASSED] Both, PAL Default, with NTSC on command-line
[12:56:51] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:56:51] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:56:51] ================== drm_rect (9 subtests) ===================
[12:56:51] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:56:51] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:56:51] [PASSED] drm_test_rect_clip_scaled_clipped
[12:56:51] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:56:51] ================= drm_test_rect_intersect =================
[12:56:51] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:56:51] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:56:51] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:56:51] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:56:51] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:56:51] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:56:51] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:56:51] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:56:51] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:56:51] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:56:51] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:56:51] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:56:51] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:56:51] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:56:51] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:56:51] ============= [PASSED] drm_test_rect_intersect =============
[12:56:51] ================ drm_test_rect_calc_hscale ================
[12:56:51] [PASSED] normal use
[12:56:51] [PASSED] out of max range
[12:56:51] [PASSED] out of min range
[12:56:51] [PASSED] zero dst
[12:56:51] [PASSED] negative src
[12:56:51] [PASSED] negative dst
[12:56:51] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:56:51] ================ drm_test_rect_calc_vscale ================
[12:56:51] [PASSED] normal use
[12:56:51] [PASSED] out of max range
[12:56:51] [PASSED] out of min range
[12:56:51] [PASSED] zero dst
[12:56:51] [PASSED] negative src
[12:56:51] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[12:56:51] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:56:51] ================== drm_test_rect_rotate ===================
[12:56:51] [PASSED] reflect-x
[12:56:51] [PASSED] reflect-y
[12:56:51] [PASSED] rotate-0
[12:56:51] [PASSED] rotate-90
[12:56:51] [PASSED] rotate-180
[12:56:51] [PASSED] rotate-270
[12:56:51] ============== [PASSED] drm_test_rect_rotate ===============
[12:56:51] ================ drm_test_rect_rotate_inv =================
[12:56:51] [PASSED] reflect-x
[12:56:51] [PASSED] reflect-y
[12:56:51] [PASSED] rotate-0
[12:56:51] [PASSED] rotate-90
[12:56:51] [PASSED] rotate-180
[12:56:51] [PASSED] rotate-270
[12:56:51] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:56:51] ==================== [PASSED] drm_rect =====================
[12:56:51] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:56:51] ============ drm_test_sysfb_build_fourcc_list =============
[12:56:51] [PASSED] no native formats
[12:56:51] [PASSED] XRGB8888 as native format
[12:56:51] [PASSED] remove duplicates
[12:56:51] [PASSED] convert alpha formats
[12:56:51] [PASSED] random formats
[12:56:51] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:56:51] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:56:51] ================== drm_fixp (2 subtests) ===================
[12:56:51] [PASSED] drm_test_int2fixp
[12:56:51] [PASSED] drm_test_sm2fixp
[12:56:51] ==================== [PASSED] drm_fixp =====================
[12:56:51] ============================================================
[12:56:51] Testing complete. Ran 621 tests: passed: 621
[12:56:51] Elapsed time: 25.833s total, 1.725s configuring, 23.940s building, 0.136s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:56:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:56:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:57:04] Starting KUnit Kernel (1/1)...
[12:57:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:57:04] ================= ttm_device (5 subtests) ==================
[12:57:04] [PASSED] ttm_device_init_basic
[12:57:04] [PASSED] ttm_device_init_multiple
[12:57:04] [PASSED] ttm_device_fini_basic
[12:57:04] [PASSED] ttm_device_init_no_vma_man
[12:57:04] ================== ttm_device_init_pools ==================
[12:57:04] [PASSED] No DMA allocations, no DMA32 required
[12:57:04] [PASSED] DMA allocations, DMA32 required
[12:57:04] [PASSED] No DMA allocations, DMA32 required
[12:57:04] [PASSED] DMA allocations, no DMA32 required
[12:57:04] ============== [PASSED] ttm_device_init_pools ==============
[12:57:04] =================== [PASSED] ttm_device ====================
[12:57:04] ================== ttm_pool (8 subtests) ===================
[12:57:04] ================== ttm_pool_alloc_basic ===================
[12:57:04] [PASSED] One page
[12:57:04] [PASSED] More than one page
[12:57:04] [PASSED] Above the allocation limit
[12:57:04] [PASSED] One page, with coherent DMA mappings enabled
[12:57:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:57:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:57:04] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:57:04] [PASSED] One page
[12:57:04] [PASSED] More than one page
[12:57:04] [PASSED] Above the allocation limit
[12:57:04] [PASSED] One page, with coherent DMA mappings enabled
[12:57:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:57:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:57:04] [PASSED] ttm_pool_alloc_order_caching_match
[12:57:04] [PASSED] ttm_pool_alloc_caching_mismatch
[12:57:04] [PASSED] ttm_pool_alloc_order_mismatch
[12:57:04] [PASSED] ttm_pool_free_dma_alloc
[12:57:04] [PASSED] ttm_pool_free_no_dma_alloc
[12:57:04] [PASSED] ttm_pool_fini_basic
[12:57:04] ==================== [PASSED] ttm_pool =====================
[12:57:04] ================ ttm_resource (8 subtests) =================
[12:57:04] ================= ttm_resource_init_basic =================
[12:57:04] [PASSED] Init resource in TTM_PL_SYSTEM
[12:57:04] [PASSED] Init resource in TTM_PL_VRAM
[12:57:04] [PASSED] Init resource in a private placement
[12:57:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:57:04] ============= [PASSED] ttm_resource_init_basic =============
[12:57:04] [PASSED] ttm_resource_init_pinned
[12:57:04] [PASSED] ttm_resource_fini_basic
[12:57:04] [PASSED] ttm_resource_manager_init_basic
[12:57:04] [PASSED] ttm_resource_manager_usage_basic
[12:57:04] [PASSED] ttm_resource_manager_set_used_basic
[12:57:04] [PASSED] ttm_sys_man_alloc_basic
[12:57:04] [PASSED] ttm_sys_man_free_basic
[12:57:04] ================== [PASSED] ttm_resource ===================
[12:57:04] =================== ttm_tt (15 subtests) ===================
[12:57:04] ==================== ttm_tt_init_basic ====================
[12:57:04] [PASSED] Page-aligned size
[12:57:04] [PASSED] Extra pages requested
[12:57:04] ================ [PASSED] ttm_tt_init_basic ================
[12:57:04] [PASSED] ttm_tt_init_misaligned
[12:57:04] [PASSED] ttm_tt_fini_basic
[12:57:04] [PASSED] ttm_tt_fini_sg
[12:57:04] [PASSED] ttm_tt_fini_shmem
[12:57:04] [PASSED] ttm_tt_create_basic
[12:57:04] [PASSED] ttm_tt_create_invalid_bo_type
[12:57:04] [PASSED] ttm_tt_create_ttm_exists
[12:57:04] [PASSED] ttm_tt_create_failed
[12:57:04] [PASSED] ttm_tt_destroy_basic
[12:57:04] [PASSED] ttm_tt_populate_null_ttm
[12:57:04] [PASSED] ttm_tt_populate_populated_ttm
[12:57:04] [PASSED] ttm_tt_unpopulate_basic
[12:57:04] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:57:04] [PASSED] ttm_tt_swapin_basic
[12:57:04] ===================== [PASSED] ttm_tt ======================
[12:57:04] =================== ttm_bo (14 subtests) ===================
[12:57:04] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:57:04] [PASSED] Cannot be interrupted and sleeps
[12:57:04] [PASSED] Cannot be interrupted, locks straight away
[12:57:04] [PASSED] Can be interrupted, sleeps
[12:57:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:57:04] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:57:04] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:57:04] [PASSED] ttm_bo_reserve_double_resv
[12:57:04] [PASSED] ttm_bo_reserve_interrupted
[12:57:04] [PASSED] ttm_bo_reserve_deadlock
[12:57:04] [PASSED] ttm_bo_unreserve_basic
[12:57:04] [PASSED] ttm_bo_unreserve_pinned
[12:57:04] [PASSED] ttm_bo_unreserve_bulk
[12:57:04] [PASSED] ttm_bo_fini_basic
[12:57:04] [PASSED] ttm_bo_fini_shared_resv
[12:57:04] [PASSED] ttm_bo_pin_basic
[12:57:04] [PASSED] ttm_bo_pin_unpin_resource
[12:57:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:57:04] ===================== [PASSED] ttm_bo ======================
[12:57:04] ============== ttm_bo_validate (22 subtests) ===============
[12:57:04] ============== ttm_bo_init_reserved_sys_man ===============
[12:57:04] [PASSED] Buffer object for userspace
[12:57:04] [PASSED] Kernel buffer object
[12:57:04] [PASSED] Shared buffer object
[12:57:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:57:04] ============== ttm_bo_init_reserved_mock_man ==============
[12:57:04] [PASSED] Buffer object for userspace
[12:57:04] [PASSED] Kernel buffer object
[12:57:04] [PASSED] Shared buffer object
[12:57:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:57:04] [PASSED] ttm_bo_init_reserved_resv
[12:57:04] ================== ttm_bo_validate_basic ==================
[12:57:04] [PASSED] Buffer object for userspace
[12:57:04] [PASSED] Kernel buffer object
[12:57:04] [PASSED] Shared buffer object
[12:57:04] ============== [PASSED] ttm_bo_validate_basic ==============
[12:57:04] [PASSED] ttm_bo_validate_invalid_placement
[12:57:04] ============= ttm_bo_validate_same_placement ==============
[12:57:04] [PASSED] System manager
[12:57:04] [PASSED] VRAM manager
[12:57:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:57:04] [PASSED] ttm_bo_validate_failed_alloc
[12:57:04] [PASSED] ttm_bo_validate_pinned
[12:57:04] [PASSED] ttm_bo_validate_busy_placement
[12:57:04] ================ ttm_bo_validate_multihop =================
[12:57:04] [PASSED] Buffer object for userspace
[12:57:04] [PASSED] Kernel buffer object
[12:57:04] [PASSED] Shared buffer object
[12:57:04] ============ [PASSED] ttm_bo_validate_multihop =============
[12:57:04] ========== ttm_bo_validate_no_placement_signaled ==========
[12:57:04] [PASSED] Buffer object in system domain, no page vector
[12:57:04] [PASSED] Buffer object in system domain with an existing page vector
[12:57:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:57:04] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:57:04] [PASSED] Buffer object for userspace
[12:57:04] [PASSED] Kernel buffer object
[12:57:04] [PASSED] Shared buffer object
[12:57:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:57:04] [PASSED] ttm_bo_validate_move_fence_signaled
[12:57:04] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:57:04] [PASSED] Waits for GPU
[12:57:04] [PASSED] Tries to lock straight away
[12:57:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:57:04] [PASSED] ttm_bo_validate_swapout
[12:57:04] [PASSED] ttm_bo_validate_happy_evict
[12:57:04] [PASSED] ttm_bo_validate_all_pinned_evict
[12:57:04] [PASSED] ttm_bo_validate_allowed_only_evict
[12:57:04] [PASSED] ttm_bo_validate_deleted_evict
[12:57:04] [PASSED] ttm_bo_validate_busy_domain_evict
[12:57:04] [PASSED] ttm_bo_validate_evict_gutting
[12:57:04] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[12:57:04] ================= [PASSED] ttm_bo_validate =================
[12:57:04] ============================================================
[12:57:04] Testing complete. Ran 102 tests: passed: 102
[12:57:04] Elapsed time: 12.696s total, 1.712s configuring, 10.768s building, 0.187s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for Panel Replay BW optimization (rev3)
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
` (3 preceding siblings ...)
2026-03-25 12:57 ` ✓ CI.KUnit: success for Panel Replay BW optimization (rev3) Patchwork
@ 2026-03-25 13:50 ` Patchwork
2026-03-25 20:20 ` ✓ Xe.CI.FULL: " Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-03-25 13:50 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3125 bytes --]
== Series Details ==
Series: Panel Replay BW optimization (rev3)
URL : https://patchwork.freedesktop.org/series/163080/
State : success
== Summary ==
CI Bug Log - changes from xe-4779-1fda996928180768f2704b8f8c816f10da433131_BAT -> xe-pw-163080v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 14)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-163080v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4779-1fda996928180768f2704b8f8c816f10da433131/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [PASS][3] -> [FAIL][4] ([Intel XE#6520])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4779-1fda996928180768f2704b8f8c816f10da433131/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/bat-dg2-oem2/igt@xe_waitfence@reltime.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- bat-adlp-7: [DMESG-WARN][5] ([Intel XE#7483]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4779-1fda996928180768f2704b8f8c816f10da433131/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
* igt@xe_waitfence@engine:
- bat-atsm-2: [FAIL][7] -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4779-1fda996928180768f2704b8f8c816f10da433131/bat-atsm-2/igt@xe_waitfence@engine.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/bat-atsm-2/igt@xe_waitfence@engine.html
- bat-dg2-oem2: [FAIL][9] ([Intel XE#6519]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4779-1fda996928180768f2704b8f8c816f10da433131/bat-dg2-oem2/igt@xe_waitfence@engine.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
[Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483
Build changes
-------------
* Linux: xe-4779-1fda996928180768f2704b8f8c816f10da433131 -> xe-pw-163080v3
IGT_8825: 531ebe0606453021b88f794aad255d9e1a234d3d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4779-1fda996928180768f2704b8f8c816f10da433131: 1fda996928180768f2704b8f8c816f10da433131
xe-pw-163080v3: 163080v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/index.html
[-- Attachment #2: Type: text/html, Size: 3862 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.FULL: success for Panel Replay BW optimization (rev3)
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
` (4 preceding siblings ...)
2026-03-25 13:50 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-25 20:20 ` Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-03-25 20:20 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1520 bytes --]
== Series Details ==
Series: Panel Replay BW optimization (rev3)
URL : https://patchwork.freedesktop.org/series/163080/
State : success
== Summary ==
CI Bug Log - changes from xe-4779-1fda996928180768f2704b8f8c816f10da433131_FULL -> xe-pw-163080v3_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-163080v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_psr@psr2-suspend:
- shard-lnl: [PASS][1] -> [INCOMPLETE][2] ([Intel XE#2625]) +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4779-1fda996928180768f2704b8f8c816f10da433131/shard-lnl-8/igt@kms_psr@psr2-suspend.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/shard-lnl-6/igt@kms_psr@psr2-suspend.html
[Intel XE#2625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2625
Build changes
-------------
* Linux: xe-4779-1fda996928180768f2704b8f8c816f10da433131 -> xe-pw-163080v3
IGT_8825: 531ebe0606453021b88f794aad255d9e1a234d3d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4779-1fda996928180768f2704b8f8c816f10da433131: 1fda996928180768f2704b8f8c816f10da433131
xe-pw-163080v3: 163080v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163080v3/index.html
[-- Attachment #2: Type: text/html, Size: 2085 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v9 3/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
2026-03-25 11:41 ` [PATCH v9 3/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling Animesh Manna
@ 2026-03-27 9:29 ` Hogander, Jouni
0 siblings, 0 replies; 8+ messages in thread
From: Hogander, Jouni @ 2026-03-27 9:29 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
Manna, Animesh, intel-gfx@lists.freedesktop.org
Cc: Murthy, Arun R, Nikula, Jani, Deak, Imre
On Wed, 2026-03-25 at 17:11 +0530, Animesh Manna wrote:
> Unused bandwidth can be used by external display agents for Panel
> Replay
> enabled DP panel during idleness with link on. Enable source to
> replace
> dummy data from the display with data from another agent by
> programming
> TRANS_DP2_CTL [Panel Replay Tunneling Enable].
>
> v2:
> - Enable pr bw optimization along with panel replay enable. [Jani]
>
> v3:
> - Write TRANS_DP2_CTL once for both bw optimization and panel replay
> enable. [Jani]
>
> v4:
> - Read DPCD once in init() and store in panel_replay_caps. [Jouni]
>
> v5:
> - Avoid reading DPCD for edp. [Jouni]
> - Use drm_dp_dpcd_read_byte() and some cosmetic changes. [Jani]
>
> v6:
> - Extend the corresponding interface defined in drm_dp_tunnel.c
> to query the Panel Replay optimization capability. [Imre]
>
> v7:
> - Clear TRANS_DP2_PR_TUNNELING_ENABLE if pr bw optimization
> is not allowed. [Jouni]
> - Move intel_dp_is_edp() check. [Jouni]
>
> Bspec: 68920
> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_regs.h | 1 +
> drivers/gpu/drm/i915/display/intel_psr.c | 25
> +++++++++++++++++--
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h
> b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 4746e9ebd920..dada8dc27ea4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -2263,6 +2263,7 @@
> #define TRANS_DP2_CTL(trans) _MMIO_TRANS(trans,
> _TRANS_DP2_CTL_A, _TRANS_DP2_CTL_B)
> #define TRANS_DP2_128B132B_CHANNEL_CODING REG_BIT(31)
> #define TRANS_DP2_PANEL_REPLAY_ENABLE REG_BIT(30)
> +#define TRANS_DP2_PR_TUNNELING_ENABLE REG_BIT(26)
> #define TRANS_DP2_DEBUG_ENABLE REG_BIT(23)
>
> #define _TRANS_DP2_VFREQHIGH_A 0x600a4
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index c13116e6f17f..992bd9ffac70 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -44,6 +44,7 @@
> #include "intel_dmc.h"
> #include "intel_dp.h"
> #include "intel_dp_aux.h"
> +#include "intel_dp_tunnel.h"
> #include "intel_dsb.h"
> #include "intel_frontbuffer.h"
> #include "intel_hdmi.h"
> @@ -1023,11 +1024,27 @@ static u8 frames_before_su_entry(struct
> intel_dp *intel_dp)
> return frames_before_su_entry;
> }
>
> +static bool intel_psr_allow_pr_bw_optimization(struct intel_dp
> *intel_dp)
> +{
> + if (intel_dp_is_edp(intel_dp))
> + return false;
> +
> + if (!intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> + return false;
> +
> + if (!intel_dp_tunnel_pr_optimization_supported(intel_dp))
> + return false;
> +
> + return true;
> +}
> +
> static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> struct intel_psr *psr = &intel_dp->psr;
> enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> + u32 dp2_ctl_set = TRANS_DP2_PANEL_REPLAY_ENABLE;
> + u32 dp2_ctl_clear = 0;
>
> if (intel_dp_is_edp(intel_dp) && psr->sel_update_enabled) {
> u32 val = psr->su_region_et_enabled ?
> @@ -1040,12 +1057,16 @@ static void dg2_activate_panel_replay(struct
> intel_dp *intel_dp)
> val);
> }
>
> + if (intel_psr_allow_pr_bw_optimization(intel_dp))
> + dp2_ctl_set |= TRANS_DP2_PR_TUNNELING_ENABLE;
> + else
> + dp2_ctl_clear = TRANS_DP2_PR_TUNNELING_ENABLE;
> +
> intel_de_rmw(display,
> PSR2_MAN_TRK_CTL(display, intel_dp-
> >psr.transcoder),
> 0,
> ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
>
> - intel_de_rmw(display, TRANS_DP2_CTL(intel_dp-
> >psr.transcoder), 0,
> - TRANS_DP2_PANEL_REPLAY_ENABLE);
> + intel_de_rmw(display, TRANS_DP2_CTL(intel_dp-
> >psr.transcoder), dp2_ctl_clear, dp2_ctl_set);
> }
>
> static void hsw_activate_psr2(struct intel_dp *intel_dp)
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-03-27 9:29 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-25 11:41 [PATCH v9 0/3] Panel Replay BW optimization Animesh Manna
2026-03-25 11:41 ` [PATCH v9 1/3] drm/i915/display: Add drm helper to check pr optimization support Animesh Manna
2026-03-25 11:41 ` [PATCH v9 2/3] drm/i915/display: Add hook to check optimization support for Intel platforms Animesh Manna
2026-03-25 11:41 ` [PATCH v9 3/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling Animesh Manna
2026-03-27 9:29 ` Hogander, Jouni
2026-03-25 12:57 ` ✓ CI.KUnit: success for Panel Replay BW optimization (rev3) Patchwork
2026-03-25 13:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-25 20:20 ` ✓ Xe.CI.FULL: " Patchwork
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