Re: [PATCH 06/19] drm/i915/display: Fix HAS_DC3CO() and add DC3CO trigger enum

[Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>]

On 14-04-2026 02:46, Shankar, Uma wrote:
>
>> -----Original Message-----
>> From: Dibin Moolakadan Subrahmanian
>> <dibin.moolakadan.subrahmanian@intel.com>
>> Sent: Thursday, March 26, 2026 10:46 PM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Manna, Animesh <animesh.manna@intel.com>; Shankar, Uma
>> <uma.shankar@intel.com>; Kurmi, Suresh Kumar
>> <suresh.kumar.kurmi@intel.com>
>> Subject: [PATCH 06/19] drm/i915/display: Fix HAS_DC3CO() and add DC3CO
>> trigger enum
> HAS_DC3CO has not been introduced as part of this series so no fix as such.
> Sync with CMTG series to finalize a common macro.
>> Fix HAS_DC3CO() based on display version and introduce an enum to track
>> DC3CO enabling triggers.
>>
>> BSpec: 75253
>> Signed-off-by: Dibin Moolakadan Subrahmanian
>> <dibin.moolakadan.subrahmanian@intel.com>
>> ---
>>   .../gpu/drm/i915/display/intel_display_device.h   |  2 +-
>>   .../gpu/drm/i915/display/intel_display_power.h    | 15 +++++++++++++++
>>   2 files changed, 16 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
>> b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 35e06fcf794d..002fe0ce951a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -189,7 +189,7 @@ struct intel_display_platforms {
>>   #define HAS_LRR(__display)		(DISPLAY_VER(__display) >= 12)
>>   #define HAS_LSPCON(__display)		(IS_DISPLAY_VER(__display, 9,
>> 10))
>>   #define HAS_LT_PHY(__display)		((__display)->platform.novalake)
>> -#define HAS_DC3CO(__display)		((__display)->platform.novalake)
>> +#define HAS_DC3CO(__display)		(DISPLAY_VER(__display) >= 35)
> This is the trigger for CI build failure. Fix it.

I will add it as new macro so build will pass and align with CMTG
once CMTG changes are finalized.

>
>>   #define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p
>> || DISPLAY_VER(__display) >= 14)
>>   #define HAS_MSO(__display)		(DISPLAY_VER(__display) >= 12)
>>   #define HAS_OVERLAY(__display)		(DISPLAY_INFO(__display)-
>>> has_overlay)
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
>> b/drivers/gpu/drm/i915/display/intel_display_power.h
>> index d616d5d09cbe..3fb45154864e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
>> @@ -131,6 +131,21 @@ struct intel_power_domain_mask {
>>   	DECLARE_BITMAP(bits, POWER_DOMAIN_NUM);  };
>>
>> +/*
>> + * DC3CO enabling triggers (bitmask).
>> + * DC3CO may be enabled when at least one of these triggers is active.
>> + * Additional constraints may still apply.
>> + */
>> +enum intel_dc3co_trigger {
>> +	DC3CO_TRIGGER_NONE	     = 0,
>> +	DC3CO_TRIGGER_PSR2	     = BIT(0),
>> +	DC3CO_TRIGGER_LOBF	     = BIT(1),
>> +	DC3CO_TRIGGER_PANEL_REPLAY   = BIT(2),
>> +	DC3CO_TRIGGER_ALL  = DC3CO_TRIGGER_PSR2 |
>> +			     DC3CO_TRIGGER_LOBF |
>> +			     DC3CO_TRIGGER_PANEL_REPLAY,
>> +};
>> +
>>   struct i915_power_domains {
>>   	/*
>>   	 * Power wells needed for initialization at driver init and suspend
>> --
>> 2.43.0