From: Matthew Auld <matthew.auld@intel.com>
To: Alan Previn <alan.previn.teres.alexis@intel.com>,
intel-xe@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Subject: Re: [PATCH v1 1/1] drm/xe/bo: Fix fixed placement ggtt pinning code
Date: Fri, 21 Jun 2024 10:24:36 +0100 [thread overview]
Message-ID: <6e23bf3b-4c7c-411a-a0fa-02af98c8c4e5@intel.com> (raw)
In-Reply-To: <20240621071506.912055-1-alan.previn.teres.alexis@intel.com>
On 21/06/2024 08:15, Alan Previn wrote:
> When calling xe_bo_create_pin_map_at, use the correct
> starting offset provided by caller at xe_ggtt_insert_bo_at.
>
> Fixes: 44e694958b95 ("drm/xe/display: Implement display support")
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 74294f1b05bc..cc6101b49c08 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1436,7 +1436,7 @@ __xe_bo_create_locked(struct xe_device *xe,
>
> if (flags & XE_BO_FLAG_FIXED_PLACEMENT) {
> err = xe_ggtt_insert_bo_at(tile->mem.ggtt, bo,
> - start + bo->size, U64_MAX);
> + start, end);
I think this is just about controlling the ggtt bias range. i.e please
allocate bo->size somewhere within [start + bo->size, U64_MAX]. There
was a reason for the + bo->size, I think something odd like initial fb
using low ggtt address (pre-programmed by bios), and wanting to use that
for guc or something instead so we effectively move it with the above.
I think we also only need such an interface for funky stuff like initial
fb, which is either in stolen or vram. The actual allocate backing pages
part of the api should respect start, like for vram and stolen, which is
the main point of FIXED_PLACEMENT. Trying to do that for system memory
is not really possible AFAIK.
If we just want something with specific ggtt alignment we could plumb
that through to the mm interface. For example, put this anywhere within
ggtt but ensure address is aligned to 256M. We then only pass FLAG_GGTT
and not FIXED_PLACEMENT.
> } else {
> err = xe_ggtt_insert_bo(tile->mem.ggtt, bo);
> }
>
> base-commit: cffd77865f476994680892601e09bc2164179907
next prev parent reply other threads:[~2024-06-21 9:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-21 7:15 [PATCH v1 1/1] drm/xe/bo: Fix fixed placement ggtt pinning code Alan Previn
2024-06-21 7:20 ` ✓ CI.Patch_applied: success for series starting with [v1,1/1] " Patchwork
2024-06-21 7:20 ` ✓ CI.checkpatch: " Patchwork
2024-06-21 7:21 ` ✓ CI.KUnit: " Patchwork
2024-06-21 7:33 ` ✓ CI.Build: " Patchwork
2024-06-21 7:35 ` ✗ CI.Hooks: failure " Patchwork
2024-06-21 7:37 ` ✓ CI.checksparse: success " Patchwork
2024-06-21 8:05 ` ✓ CI.BAT: " Patchwork
2024-06-21 9:24 ` Matthew Auld [this message]
2024-06-21 9:40 ` ✗ CI.FULL: failure " Patchwork
2024-06-21 14:49 ` [PATCH v1 1/1] " Rodrigo Vivi
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