From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Matthew Brost <matthew.brost@intel.com>, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v2 2/3] drm/xe: Validate user fence during creation
Date: Fri, 01 Mar 2024 07:55:40 +0100 [thread overview]
Message-ID: <6f8409697d39299e3672fd42f7057e421cb54f19.camel@linux.intel.com> (raw)
In-Reply-To: <20240301035522.238307-3-matthew.brost@intel.com>
On Thu, 2024-02-29 at 19:55 -0800, Matthew Brost wrote:
> Fail invalidate addresses during user fence creation.
>
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel
> GPUs")
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/xe_sync.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_sync.c
> b/drivers/gpu/drm/xe/xe_sync.c
> index c836a5f3a1ea..c20e1f9ad267 100644
> --- a/drivers/gpu/drm/xe/xe_sync.c
> +++ b/drivers/gpu/drm/xe/xe_sync.c
> @@ -53,14 +53,18 @@ static struct xe_user_fence
> *user_fence_create(struct xe_device *xe, u64 addr,
> u64 value)
> {
> struct xe_user_fence *ufence;
> + u64 __user *ptr = u64_to_user_ptr(addr);
> +
> + if (!access_ok(ptr, sizeof(ptr)))
> + return ERR_PTR(-EFAULT);
I think we also need to enforce u64 alignment. Otherwise, particularly
on 32-bit user-space the user fence memory could cross a page-border?
>
> ufence = kmalloc(sizeof(*ufence), GFP_KERNEL);
> if (!ufence)
> - return NULL;
> + return ERR_PTR(-ENOMEM);
>
> ufence->xe = xe;
> kref_init(&ufence->refcount);
> - ufence->addr = u64_to_user_ptr(addr);
> + ufence->addr = ptr;
> ufence->value = value;
> ufence->mm = current->mm;
> mmgrab(ufence->mm);
> @@ -183,8 +187,8 @@ int xe_sync_entry_parse(struct xe_device *xe,
> struct xe_file *xef,
> } else {
> sync->ufence = user_fence_create(xe,
> sync_in.addr,
>
> sync_in.timeline_value);
> - if (XE_IOCTL_DBG(xe, !sync->ufence))
> - return -ENOMEM;
> + if (XE_IOCTL_DBG(xe, IS_ERR(sync->ufence)))
> + return PTR_ERR(sync->ufence);
> }
>
> break;
next prev parent reply other threads:[~2024-03-01 6:55 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-01 3:55 [PATCH v2 0/3] xe_sync and ufence rework Matthew Brost
2024-03-01 3:55 ` [PATCH v2 1/3] drm/xe: Remove used xe_sync_entry_wait Matthew Brost
2024-03-01 3:55 ` [PATCH v2 2/3] drm/xe: Validate user fence during creation Matthew Brost
2024-03-01 6:55 ` Thomas Hellström [this message]
2024-03-01 7:58 ` Matthew Brost
2024-03-01 8:22 ` Thomas Hellström
2024-03-01 3:55 ` [PATCH v2 3/3] drm/xe: Get page on user fence creation Matthew Brost
2024-03-01 6:36 ` Thomas Hellström
2024-03-01 7:46 ` Matthew Brost
2024-03-01 8:56 ` Thomas Hellström
2024-03-01 13:31 ` Thomas Hellström
2024-03-01 22:43 ` Matthew Brost
2024-03-01 3:59 ` ✓ CI.Patch_applied: success for xe_sync and ufence rework (rev2) Patchwork
2024-03-01 4:00 ` ✓ CI.checkpatch: " Patchwork
2024-03-01 4:00 ` ✓ CI.KUnit: " Patchwork
2024-03-01 4:11 ` ✓ CI.Build: " Patchwork
2024-03-01 4:12 ` ✓ CI.Hooks: " Patchwork
2024-03-01 4:13 ` ✓ CI.checksparse: " Patchwork
2024-03-01 4:39 ` ✗ CI.BAT: failure " Patchwork
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