From: Matthew Auld <matthew.auld@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-xe@lists.freedesktop.org,
Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Subject: Re: [PATCH] drm/xe/display: mark DPT with XE_BO_PAGETABLE
Date: Thu, 14 Mar 2024 17:05:51 +0000 [thread overview]
Message-ID: <760c2986-1f16-434b-828e-ab92e9bc009a@intel.com> (raw)
In-Reply-To: <dibnzpe5c3g34vfaodp5xw2au64cqsw5yqcaku6rgps47b6xzh@i4gzcr62grjs>
On 14/03/2024 17:00, Lucas De Marchi wrote:
> On Thu, Mar 14, 2024 at 04:49:06PM +0000, Matthew Auld wrote:
>> Otherwise in the case where we use normal system memory, the CPU access
>> will always be cached, like when filling the DPT PTEs, which is likely
>> not what we want since HW access could be incoherent on platforms like
>> LNL. Marking as XE_BO_PAGETABLE will force wc/uc underneath on such
>> platforms.
>>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Thanks.
>
> humn... since you're touching these flags, could you take a look at
> https://lore.kernel.org/intel-xe/20240314052619.2628396-1-lucas.demarchi@intel.com/ ?
Sure, will take a look now.
>
> thanks
> Lucas De Marchi
>
>> ---
>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 9 ++++++---
>> 1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> index 722c84a56607..b220f136be70 100644
>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> @@ -100,17 +100,20 @@ static int __xe_pin_fb_vma_dpt(struct
>> intel_framebuffer *fb,
>> dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
>> ttm_bo_type_kernel,
>> XE_BO_CREATE_VRAM0_BIT |
>> - XE_BO_CREATE_GGTT_BIT);
>> + XE_BO_CREATE_GGTT_BIT |
>> + XE_BO_PAGETABLE);
>> else
>> dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
>> ttm_bo_type_kernel,
>> XE_BO_CREATE_STOLEN_BIT |
>> - XE_BO_CREATE_GGTT_BIT);
>> + XE_BO_CREATE_GGTT_BIT |
>> + XE_BO_PAGETABLE);
>> if (IS_ERR(dpt))
>> dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
>> ttm_bo_type_kernel,
>> XE_BO_CREATE_SYSTEM_BIT |
>> - XE_BO_CREATE_GGTT_BIT);
>> + XE_BO_CREATE_GGTT_BIT |
>> + XE_BO_PAGETABLE);
>> if (IS_ERR(dpt))
>> return PTR_ERR(dpt);
>>
>> --
>> 2.44.0
>>
next prev parent reply other threads:[~2024-03-14 17:05 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-14 16:49 [PATCH] drm/xe/display: mark DPT with XE_BO_PAGETABLE Matthew Auld
2024-03-14 17:00 ` Lucas De Marchi
2024-03-14 17:05 ` Matthew Auld [this message]
2024-03-14 19:16 ` Juha-Pekka Heikkila
2024-03-14 20:01 ` ✓ CI.Patch_applied: success for " Patchwork
2024-03-14 20:02 ` ✓ CI.checkpatch: " Patchwork
2024-03-14 20:03 ` ✓ CI.KUnit: " Patchwork
2024-03-14 20:13 ` ✓ CI.Build: " Patchwork
2024-03-14 20:16 ` ✓ CI.Hooks: " Patchwork
2024-03-14 20:17 ` ✓ CI.checksparse: " Patchwork
2024-03-14 20:40 ` ✓ CI.BAT: " Patchwork
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