Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

Dibin Moolakadan Subrahmanian
2026-03-13T04:25:43Z

On 13-03-2026 08:56, Kandpal, Suraj wrote:
>> On 12-03-2026 08:48, Kandpal, Suraj wrote:
>>>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
>>>>
>>>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
>>>>
>>> Add same Bspec link here too
>>>
>>>> Signed-off-by: Dibin Moolakadan Subrahmanian
>>>> <dibin.moolakadan.subrahmanian@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
>>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> b/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> index 38b284a0db82..e60f1f977070 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
>>>> intel_display *display, bool enable) static u32
>>>> pipedmc_interrupt_mask(struct intel_display *display) {
>>>> if (DISPLAY_VER(display) >= 35)
>>>> - return PIPEDMC_FLIPQ_PROG_DONE;
>>>> + return PIPEDMC_FLIPQ_PROG_DONE |
>>>> + PIPEDMC_ERROR;
>>>>
>>> Mostly looks okay but here's my question:
>>> I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on
>>> LNL pipe B, As I can see from Ville's commit message, but is it still the case for
>> PTL ?
>>> Can we have that tested ?
>>> If that works we can add the PIPEDMC_ERROR from PTL onwards.
>>> Then here we can change code to create a mask and then return it finally like
>> :
>>> mask = PIPEDMC_FLIPQ_PROG_DONE
>>>
>>> if display ver >= 30
>>> mask |= PIPEDMC_ERROR
>>>
>>> if display ver < 35
>>> mask |= PIPEDMC_GTT_FAULT |
>>> PIPEDMC_ATS_FAULT;
>>>
>>> Return mask;
>>>
>>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
>> Thank you for spotting this, I think its better to add above logic in new series
>> rather than combing with 35+ bit mask update.
>>
>> Regards,
>> Dibin
> If that is the case then I think its better to drop this patch altogether.
> We have a justification of why we remove bits in first patch, that was a change in NVL H/w.
> But this change was introduced in LNL.
> Without a strong reasoning of why you are enabling this is in NVL and not in PTL (which I don’t see in this patch series)
> I suggest you add this patch with as a part of the series where you have a use case for it. And if there too you only add it for NVL
> You will need to add a comments as to why this is not enabled for PTL.

This patch intent to fix the interrupt mask for 35+.
I dont see any reason to disable this bit as
1) error bit warning is already present in interrupt handler.
2) bit is defined in bsepc.
3) LNL it was mentioned disabled because pipeB triggering it during first DC state transition
which did not see in this case.

Regards,
Dibin

>
> Regards,
> Suraj Kandpal
>
>
>>> Regards,
>>> Suraj Kandpal
>>>
>>>> /*
>>>> * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
>>>> --
>>>> 2.43.0