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* [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
@ 2026-04-09 10:15 Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
                   ` (14 more replies)
  0 siblings, 15 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Ankit Nautiyal, Nicolas Frattaroli

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restructure the DP/HDMI sink format handling. I got inspired to do this
by https://lore.kernel.org/dri-devel/20260324-color-format-v11-8-605559af4fb4@collabora.com/

I envision that after this the aforementioned patch could just
become something like this:

1. s/intel_foo_compute_formats/intel_foo_compute_formats_auto/
2. Add a new intel_foo_compute_formats()

   intel_foo_compute_formats()
   {
        switch (color_format) {
        case YCBCR420:
                return intel_foo_compute_output_format(YCBCR420);
        case RGB:
                return intel_foo_compute_output_format(RGB);
        case AUTO:
                return intel_foo_compute_formats_auto();
        }
   }

v2: A few more updates to the DP mode validation

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Ville Syrjälä (9):
  drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also
    modes
  drm/i915/hdmi: Restructure the sink/output format selection
  drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
  drm/i915/dp: Restructure the sink/output format selection
  drm/i915/dp: Validate "4:2:0 also" modes twice
  drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
  drm/i915/dp: Validate sink format in .mode_valid()
  drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last
    resort
  drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last
    resort

 drivers/gpu/drm/i915/display/intel_dp.c   | 250 +++++++++++++---------
 drivers/gpu/drm/i915/display/intel_hdmi.c | 167 +++++++++------
 2 files changed, 254 insertions(+), 163 deletions(-)

-- 
2.52.0


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH v2 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
                   ` (13 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_hdmi_mode_valid() is calling intel_pfit_mode_valid() only
on the first attempt (4:2:0 for "4:2:0 only" modes, 4:4:4 for
everything else). Add the call also for the "4:2:0 also" modes case
so that we actually know the pipe scaler can actually produce the
4:2:0 output.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 17bd2c207453..0d88eaefbe52 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2079,6 +2079,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
 			return status;
 
 		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
+
+		status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+		if (status != MODE_OK)
+			return status;
+
 		status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
 						     sink_format);
 		if (status != MODE_OK)
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 2/9] drm/i915/hdmi: Restructure the sink/output format selection
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
                   ` (12 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_hdmi_compute_output_format() is a bit of a mess. Try to
restructure it into a more readable form.

Right now we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes

Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
but in opposite orders. Let's write that out in a more explicit
if-else form. And since I'm running out of function names I'll
rename the function with that high level logic into
intel_hdmi_compute_formats() and it will call (the new)
intel_hdmi_compute_output_format() with an explicit sink_format
as needed.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
 1 file changed, 70 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 0d88eaefbe52..9c241d93166c 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
 	return status;
 }
 
+static enum drm_mode_status
+intel_hdmi_sink_format_valid(struct intel_connector *connector,
+			     const struct drm_display_mode *mode,
+			     bool has_hdmi_sink,
+			     enum intel_output_format sink_format)
+{
+	const struct drm_display_info *info = &connector->base.display_info;
+
+	switch (sink_format) {
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (!has_hdmi_sink ||
+		    !connector->base.ycbcr_420_allowed ||
+		    !drm_mode_is_420(info, mode))
+			return MODE_NO_420;
+
+		return MODE_OK;
+	case INTEL_OUTPUT_FORMAT_RGB:
+		return MODE_OK;
+	default:
+		MISSING_CASE(sink_format);
+		return MODE_BAD;
+	}
+}
+
 static enum drm_mode_status
 intel_hdmi_mode_valid(struct drm_connector *_connector,
 		      const struct drm_display_mode *mode)
@@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
 		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
 }
 
-static enum intel_output_format
-intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
-		       struct intel_connector *connector,
-		       bool ycbcr_420_output)
-{
-	if (!crtc_state->has_hdmi_sink)
-		return INTEL_OUTPUT_FORMAT_RGB;
-
-	if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
-		return INTEL_OUTPUT_FORMAT_YCBCR420;
-	else
-		return INTEL_OUTPUT_FORMAT_RGB;
-}
-
 static enum intel_output_format
 intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
 {
@@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
 
 static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
 					    struct intel_crtc_state *crtc_state,
-					    const struct drm_connector_state *conn_state,
-					    bool respect_downstream_limits)
+					    struct intel_connector *connector,
+					    bool respect_downstream_limits,
+					    enum intel_output_format sink_format)
 {
-	struct intel_display *display = to_intel_display(encoder);
-	struct intel_connector *connector = to_intel_connector(conn_state->connector);
 	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
-	const struct drm_display_info *info = &connector->base.display_info;
-	bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
-	int ret;
 
-	crtc_state->sink_format =
-		intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
-
-	if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
-		drm_dbg_kms(display->drm,
-			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
-	}
+	if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
+					 crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
+		return -EINVAL;
 
+	crtc_state->sink_format = sink_format;
 	crtc_state->output_format = intel_hdmi_output_format(crtc_state);
-	ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
-	if (ret) {
-		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
-		    !crtc_state->has_hdmi_sink ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(info, adjusted_mode))
-			return ret;
-
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-		crtc_state->output_format = intel_hdmi_output_format(crtc_state);
-		ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
+
+	return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
+}
+
+static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
+				      struct intel_crtc_state *crtc_state,
+				      const struct drm_connector_state *conn_state,
+				      bool respect_downstream_limits)
+{
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	const struct drm_display_info *info = &connector->base.display_info;
+	int ret;
+
+	if (drm_mode_is_420_only(info, adjusted_mode)) {
+		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+						       respect_downstream_limits,
+						       INTEL_OUTPUT_FORMAT_YCBCR420);
+
+		if (ret) {
+			drm_dbg_kms(display->drm,
+				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+
+			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+							       respect_downstream_limits,
+							       INTEL_OUTPUT_FORMAT_RGB);
+		}
+	} else {
+		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+						       respect_downstream_limits,
+						       INTEL_OUTPUT_FORMAT_RGB);
+
+		if (ret && drm_mode_is_420_also(info, adjusted_mode))
+			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+							       respect_downstream_limits,
+							       INTEL_OUTPUT_FORMAT_YCBCR420);
 	}
 
 	return ret;
@@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 	 * Try to respect downstream TMDS clock limits first, if
 	 * that fails assume the user might know something we don't.
 	 */
-	ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
+	ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
 	if (ret)
-		ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
+		ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
 	if (ret) {
 		drm_dbg_kms(display->drm,
 			    "unsupported HDMI clock (%d kHz), rejecting mode\n",
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
                   ` (11 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restructure the HDMI mode validation to resemble the new
intel_hdmi_compute_formats(). Keeping the two in sync helps
to avoid different bugs in each.

The main difference between mode_valid() and
intel_hdmi_compute_formats() is that we don't want the
Hail Mary RGB fallback for "4:2:0 only" modes.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 60 ++++++++++++-----------
 1 file changed, 32 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 9c241d93166c..79093d8fc2e6 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2045,6 +2045,27 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
 	}
 }
 
+static enum drm_mode_status
+intel_hdmi_mode_valid_format(struct intel_connector *connector,
+			     const struct drm_display_mode *mode,
+			     int clock, bool has_hdmi_sink,
+			     enum intel_output_format sink_format)
+{
+	struct intel_display *display = to_intel_display(connector);
+	enum drm_mode_status status;
+
+	status = intel_hdmi_sink_format_valid(connector, mode,
+					      has_hdmi_sink, sink_format);
+	if (status != MODE_OK)
+		return status;
+
+	status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+	if (status != MODE_OK)
+		return status;
+
+	return intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
+}
+
 static enum drm_mode_status
 intel_hdmi_mode_valid(struct drm_connector *_connector,
 		      const struct drm_display_mode *mode)
@@ -2052,12 +2073,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
 	struct intel_connector *connector = to_intel_connector(_connector);
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
+	const struct drm_display_info *info = &connector->base.display_info;
 	enum drm_mode_status status;
 	int clock = mode->clock;
 	int max_dotclk = display->cdclk.max_dotclk_freq;
 	bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->base.state);
-	bool ycbcr_420_only;
-	enum intel_output_format sink_format;
 
 	status = intel_cpu_transcoder_mode_valid(display, mode);
 	if (status != MODE_OK)
@@ -2084,36 +2104,20 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
 	if (clock > 600000)
 		return MODE_CLOCK_HIGH;
 
-	ycbcr_420_only = drm_mode_is_420_only(&connector->base.display_info, mode);
+	if (drm_mode_is_420_only(info, mode)) {
+		status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+						      INTEL_OUTPUT_FORMAT_YCBCR420);
+	} else {
+		status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+						      INTEL_OUTPUT_FORMAT_RGB);
 
-	if (ycbcr_420_only)
-		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-	else
-		sink_format = INTEL_OUTPUT_FORMAT_RGB;
-
-	status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
+			status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+							      INTEL_OUTPUT_FORMAT_YCBCR420);
+	}
 	if (status != MODE_OK)
 		return status;
 
-	status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
-	if (status != MODE_OK) {
-		if (ycbcr_420_only ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(&connector->base.display_info, mode))
-			return status;
-
-		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-
-		status = intel_pfit_mode_valid(display, mode, sink_format, 0);
-		if (status != MODE_OK)
-			return status;
-
-		status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
-						     sink_format);
-		if (status != MODE_OK)
-			return status;
-	}
-
 	return intel_mode_valid_max_plane_size(display, mode, 1);
 }
 
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 4/9] drm/i915/dp: Restructure the sink/output format selection
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (2 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:51   ` Nautiyal, Ankit K
  2026-04-09 10:15 ` [PATCH v2 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
                   ` (10 subsequent siblings)
  14 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restructure intel_dp_compute_output_format() to resemble the new
intel_hdmi_compute_output_formats().

Again, we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes

Take the exact same approach with the DP code, making the
format selection much less convoluted.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
 1 file changed, 69 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b8b6d62fb275..ed5841f224ee 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1379,6 +1379,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	return MODE_OK;
 }
 
+static enum drm_mode_status
+intel_dp_sink_format_valid(struct intel_connector *connector,
+			   const struct drm_display_mode *mode,
+			   enum intel_output_format sink_format)
+{
+	const struct drm_display_info *info = &connector->base.display_info;
+
+	switch (sink_format) {
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (!connector->base.ycbcr_420_allowed ||
+		    !drm_mode_is_420(info, mode))
+			return MODE_NO_420;
+
+		return MODE_OK;
+	case INTEL_OUTPUT_FORMAT_RGB:
+		return MODE_OK;
+	default:
+		MISSING_CASE(sink_format);
+		return MODE_BAD;
+	}
+}
+
 int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
 {
 	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
@@ -3338,41 +3360,59 @@ static int
 intel_dp_compute_output_format(struct intel_encoder *encoder,
 			       struct intel_crtc_state *crtc_state,
 			       struct drm_connector_state *conn_state,
-			       bool respect_downstream_limits)
+			       bool respect_downstream_limits,
+			       enum intel_output_format sink_format)
 {
-	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct intel_connector *connector = intel_dp->attached_connector;
-	const struct drm_display_info *info = &connector->base.display_info;
 	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
-	bool ycbcr_420_only;
-	int ret;
 
-	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
-
-	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
-		drm_dbg_kms(display->drm,
-			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
-	} else {
-		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
-	}
+	if (intel_dp_sink_format_valid(connector, adjusted_mode,
+				       sink_format) != MODE_OK)
+		return -EINVAL;
 
+	crtc_state->sink_format = sink_format;
 	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
 
-	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
-					   respect_downstream_limits);
-	if (ret) {
-		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(info, adjusted_mode))
-			return ret;
-
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-		crtc_state->output_format = intel_dp_output_format(connector,
-								   crtc_state->sink_format);
-		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
-						   respect_downstream_limits);
+	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
+					    respect_downstream_limits);
+}
+
+static int
+intel_dp_compute_formats(struct intel_encoder *encoder,
+			 struct intel_crtc_state *crtc_state,
+			 struct drm_connector_state *conn_state,
+			 bool respect_downstream_limits)
+{
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	struct intel_connector *connector = intel_dp->attached_connector;
+	const struct drm_display_info *info = &connector->base.display_info;
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	int ret;
+
+	if (drm_mode_is_420_only(info, adjusted_mode)) {
+		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+						     respect_downstream_limits,
+						     INTEL_OUTPUT_FORMAT_YCBCR420);
+
+		if (ret) {
+			drm_dbg_kms(display->drm,
+				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+
+			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+							     respect_downstream_limits,
+							     INTEL_OUTPUT_FORMAT_RGB);
+		}
+	} else {
+		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+						     respect_downstream_limits,
+						     INTEL_OUTPUT_FORMAT_RGB);
+
+		if (ret && drm_mode_is_420_also(info, adjusted_mode))
+			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+							     respect_downstream_limits,
+							     INTEL_OUTPUT_FORMAT_YCBCR420);
 	}
 
 	return ret;
@@ -3547,9 +3587,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	 * Try to respect downstream TMDS clock limits first, if
 	 * that fails assume the user might know something we don't.
 	 */
-	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
+	ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
 	if (ret)
-		ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
+		ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
 	if (ret)
 		return ret;
 
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (3 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:58   ` Nautiyal, Ankit K
  2026-04-09 10:15 ` [PATCH v2 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
                   ` (9 subsequent siblings)
  14 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we only validate "4:2:0 also" modes as RGB. But
if that fails we could perhaps still use the mode in with
4:2:0 output. All we have to do is retry the validation with
the different sink format.

So far we did the double validation only so far as it affects
PCON TMDS clock limits. But validating everything twice seems
a bit more sane.

Note that intel_dp_output_format() might still end up picking
RGB for the actual output format (and letting PCON deal with
the YCbCr conversion). So I suppose we could still fail the
validation due to that, and forcing even the output format
to 4:2:0 might solve it on a third try. But we'd need the
same fallback logic in intel_dp_compute_config(). For now
this seems sufficient.

v2: Pass output_format to intel_dp_mode_min_link_bpp_x16()
    Add TODO about remaining issues
    Nuke intel_dp_sink_format()

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 151 ++++++++++++------------
 1 file changed, 78 insertions(+), 73 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ed5841f224ee..99672341f43e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1234,28 +1234,11 @@ int intel_dp_output_format_link_bpp_x16(enum intel_output_format output_format,
 	return fxp_q4_from_int(pipe_bpp);
 }
 
-static enum intel_output_format
-intel_dp_sink_format(struct intel_connector *connector,
-		     const struct drm_display_mode *mode)
-{
-	const struct drm_display_info *info = &connector->base.display_info;
-
-	if (drm_mode_is_420_only(info, mode))
-		return INTEL_OUTPUT_FORMAT_YCBCR420;
-
-	return INTEL_OUTPUT_FORMAT_RGB;
-}
-
 static int
 intel_dp_mode_min_link_bpp_x16(struct intel_connector *connector,
-			       const struct drm_display_mode *mode)
+			       const struct drm_display_mode *mode,
+			       enum intel_output_format output_format)
 {
-	enum intel_output_format output_format, sink_format;
-
-	sink_format = intel_dp_sink_format(connector, mode);
-
-	output_format = intel_dp_output_format(connector, sink_format);
-
 	return intel_dp_output_format_link_bpp_x16(output_format,
 						   intel_dp_min_bpp(output_format));
 }
@@ -1329,14 +1312,10 @@ static int frl_required_bw(int clock, int bpc,
 static enum drm_mode_status
 intel_dp_mode_valid_downstream(struct intel_connector *connector,
 			       const struct drm_display_mode *mode,
-			       int target_clock)
+			       int target_clock,
+			       enum intel_output_format sink_format)
 {
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	const struct drm_display_info *info = &connector->base.display_info;
-	enum drm_mode_status status;
-	enum intel_output_format sink_format;
-
-	sink_format = intel_dp_sink_format(connector, mode);
 
 	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
 	if (intel_dp->dfp.pcon_max_frl_bw) {
@@ -1361,22 +1340,8 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 		return MODE_CLOCK_HIGH;
 
 	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
-	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
-					   8, sink_format, true);
-
-	if (status != MODE_OK) {
-		if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(info, mode))
-			return status;
-		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
-						   8, sink_format, true);
-		if (status != MODE_OK)
-			return status;
-	}
-
-	return MODE_OK;
+	return intel_dp_tmds_clock_valid(intel_dp, target_clock,
+					 8, sink_format, true);
 }
 
 static enum drm_mode_status
@@ -1472,15 +1437,14 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
 }
 
 static enum drm_mode_status
-intel_dp_mode_valid(struct drm_connector *_connector,
-		    const struct drm_display_mode *mode)
+intel_dp_mode_valid_format(struct intel_connector *connector,
+			   const struct drm_display_mode *mode,
+			   int target_clock,
+			   enum intel_output_format sink_format)
 {
-	struct intel_display *display = to_intel_display(_connector->dev);
-	struct intel_connector *connector = to_intel_connector(_connector);
+	struct intel_display *display = to_intel_display(connector);
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	enum intel_output_format sink_format, output_format;
-	const struct drm_display_mode *fixed_mode;
-	int target_clock = mode->clock;
+	enum intel_output_format output_format;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 	u16 dsc_max_compressed_bpp = 0;
 	enum drm_mode_status status;
@@ -1488,29 +1452,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	int num_joined_pipes;
 	int link_bpp_x16;
 
-	status = intel_cpu_transcoder_mode_valid(display, mode);
-	if (status != MODE_OK)
-		return status;
-
-	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
-		return MODE_H_ILLEGAL;
-
-	if (mode->clock < 10000)
-		return MODE_CLOCK_LOW;
-
-	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
-		return MODE_H_ILLEGAL;
-
-	fixed_mode = intel_panel_fixed_mode(connector, mode);
-	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
-		status = intel_panel_mode_valid(connector, mode);
-		if (status != MODE_OK)
-			return status;
-
-		target_clock = fixed_mode->clock;
-	}
-
-	sink_format = intel_dp_sink_format(connector, mode);
 	output_format = intel_dp_output_format(connector, sink_format);
 
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
@@ -1518,7 +1459,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 
 	max_rate = intel_dp_max_link_data_rate(intel_dp, max_link_clock, max_lanes);
 
-	link_bpp_x16 = intel_dp_mode_min_link_bpp_x16(connector, mode);
+	link_bpp_x16 = intel_dp_mode_min_link_bpp_x16(connector, mode,
+						      output_format);
 	mode_rate = intel_dp_link_required(max_link_clock, max_lanes,
 					   target_clock, mode->hdisplay,
 					   link_bpp_x16, 0);
@@ -1608,7 +1550,70 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	if (status != MODE_OK)
 		return status;
 
-	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
+	return intel_dp_mode_valid_downstream(connector, mode,
+					      target_clock, sink_format);
+}
+
+static enum drm_mode_status
+intel_dp_mode_valid(struct drm_connector *_connector,
+		    const struct drm_display_mode *mode)
+{
+	struct intel_display *display = to_intel_display(_connector->dev);
+	struct intel_connector *connector = to_intel_connector(_connector);
+	const struct drm_display_info *info = &connector->base.display_info;
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	const struct drm_display_mode *fixed_mode;
+	int target_clock = mode->clock;
+	enum drm_mode_status status;
+
+	status = intel_cpu_transcoder_mode_valid(display, mode);
+	if (status != MODE_OK)
+		return status;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		return MODE_H_ILLEGAL;
+
+	if (mode->clock < 10000)
+		return MODE_CLOCK_LOW;
+
+	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
+		return MODE_H_ILLEGAL;
+
+	fixed_mode = intel_panel_fixed_mode(connector, mode);
+	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
+		status = intel_panel_mode_valid(connector, mode);
+		if (status != MODE_OK)
+			return status;
+
+		target_clock = fixed_mode->clock;
+	}
+
+	/*
+	 * TODO: Even when using a 4:2:0 sink_format intel_dp_output_format()
+	 * will always choose a 4:4:4 output_format if the DFP can do the
+	 * 4:4:4->4:2:0 conversion for us. Thus a mode may still be rejected
+	 * if we only have enough DP link bandwidth for 4:2:0 but not for
+	 * 4:4:4. Another attempt with an explicit 4:2:0 output_format might
+	 * be needed here. intel_dp_compute_config() would need the same
+	 * logic, or else the actual modeset would still fail.
+	 *
+	 * Also a lot of the checks only depend on output_format but not
+	 * sink_format, so we are potentially doing redundant work by
+	 * testing the same output_format for two different sink_formats.
+	 */
+	if (drm_mode_is_420_only(info, mode)) {
+		status = intel_dp_mode_valid_format(connector, mode, target_clock,
+						    INTEL_OUTPUT_FORMAT_YCBCR420);
+	} else {
+		status = intel_dp_mode_valid_format(connector, mode, target_clock,
+						    INTEL_OUTPUT_FORMAT_RGB);
+
+		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
+			status = intel_dp_mode_valid_format(connector, mode, target_clock,
+							    INTEL_OUTPUT_FORMAT_YCBCR420);
+	}
+
+	return status;
 }
 
 bool intel_dp_source_supports_tps3(struct intel_display *display)
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (4 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
                   ` (8 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

DVI sinks can't deal with YCbCr. Make sure we have a HDMI sink connected
after the PCON before doing YCbCr 4:2:0 output.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 99672341f43e..e80682834530 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1349,10 +1349,15 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
 			   const struct drm_display_mode *mode,
 			   enum intel_output_format sink_format)
 {
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	const struct drm_display_info *info = &connector->base.display_info;
 
 	switch (sink_format) {
 	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (intel_dp->dfp.min_tmds_clock &&
+		    !intel_dp_has_hdmi_sink(intel_dp))
+			return MODE_NO_420;
+
 		if (!connector->base.ycbcr_420_allowed ||
 		    !drm_mode_is_420(info, mode))
 			return MODE_NO_420;
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 7/9] drm/i915/dp: Validate sink format in .mode_valid()
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (5 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
                   ` (7 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make sure the sink supports our chosen sink format. I suppose it
might be at least possible that some PCONs might not snoop the EDID
hard enough and filter out all the modes that they should.

Also if we ever want to add a similar "force DVI" knob to DP
outputs that we have for native HDMI, we'd need to manually
get rid of anything DVI sinks can't handle.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e80682834530..945994fe681b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1457,6 +1457,10 @@ intel_dp_mode_valid_format(struct intel_connector *connector,
 	int num_joined_pipes;
 	int link_bpp_x16;
 
+	status = intel_dp_sink_format_valid(connector, mode, sink_format);
+	if (status != MODE_OK)
+		return status;
+
 	output_format = intel_dp_output_format(connector, sink_format);
 
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (6 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:15 ` [PATCH v2 9/9] drm/i915/dp: " Ville Syrjala
                   ` (6 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
already during the first pass when respect_downstream_limits==true.
It seems better to try everything else first (like ignoring TMDS
clock limits) while still preferring 4:2:0, and only if everything
else has failed fall back to RGB.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 79093d8fc2e6..874076a29da4 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2314,7 +2314,7 @@ static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
 						       respect_downstream_limits,
 						       INTEL_OUTPUT_FORMAT_YCBCR420);
 
-		if (ret) {
+		if (ret && !respect_downstream_limits) {
 			drm_dbg_kms(display->drm,
 				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
 
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH v2 9/9] drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (7 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
@ 2026-04-09 10:15 ` Ville Syrjala
  2026-04-09 10:23 ` ✗ CI.KUnit: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev2) Patchwork
                   ` (5 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-04-09 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli, Ankit Nautiyal

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
already during the first pass when respect_downstream_limits==true.
It seems better to try everything else first (like ignoring TMDS
clock limits) while still preferring 4:2:0, and only if everything
else has failed fall back to RGB.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 945994fe681b..35b8fb5740aa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3410,7 +3410,7 @@ intel_dp_compute_formats(struct intel_encoder *encoder,
 						     respect_downstream_limits,
 						     INTEL_OUTPUT_FORMAT_YCBCR420);
 
-		if (ret) {
+		if (ret && !respect_downstream_limits) {
 			drm_dbg_kms(display->drm,
 				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
 
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 18+ messages in thread

* ✗ CI.KUnit: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev2)
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (8 preceding siblings ...)
  2026-04-09 10:15 ` [PATCH v2 9/9] drm/i915/dp: " Ville Syrjala
@ 2026-04-09 10:23 ` Patchwork
  2026-04-09 15:40 ` [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Nicolas Frattaroli
                   ` (4 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-04-09 10:23 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-xe

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev2)
URL   : https://patchwork.freedesktop.org/series/164123/
State : failure

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:22:19] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:22:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:22:55] Starting KUnit Kernel (1/1)...
[10:22:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:22:55] ================== guc_buf (11 subtests) ===================
[10:22:55] [PASSED] test_smallest
[10:22:55] [PASSED] test_largest
[10:22:55] [PASSED] test_granular
[10:22:55] [PASSED] test_unique
[10:22:55] [PASSED] test_overlap
[10:22:55] [PASSED] test_reusable
[10:22:55] [PASSED] test_too_big
[10:22:55] [PASSED] test_flush
[10:22:55] [PASSED] test_lookup
[10:22:55] [PASSED] test_data
[10:22:55] [PASSED] test_class
[10:22:55] ===================== [PASSED] guc_buf =====================
[10:22:55] =================== guc_dbm (7 subtests) ===================
[10:22:55] [PASSED] test_empty
[10:22:55] [PASSED] test_default
[10:22:55] ======================== test_size  ========================
[10:22:55] [PASSED] 4
[10:22:55] [PASSED] 8
[10:22:55] [PASSED] 32
[10:22:55] [PASSED] 256
[10:22:55] ==================== [PASSED] test_size ====================
[10:22:55] ======================= test_reuse  ========================
[10:22:55] [PASSED] 4
[10:22:55] [PASSED] 8
[10:22:55] [PASSED] 32
[10:22:55] [PASSED] 256
[10:22:55] =================== [PASSED] test_reuse ====================
[10:22:55] =================== test_range_overlap  ====================
[10:22:55] [PASSED] 4
[10:22:55] [PASSED] 8
[10:22:55] [PASSED] 32
[10:22:55] [PASSED] 256
[10:22:55] =============== [PASSED] test_range_overlap ================
[10:22:55] =================== test_range_compact  ====================
[10:22:55] [PASSED] 4
[10:22:55] [PASSED] 8
[10:22:55] [PASSED] 32
[10:22:55] [PASSED] 256
[10:22:55] =============== [PASSED] test_range_compact ================
[10:22:55] ==================== test_range_spare  =====================
[10:22:55] [PASSED] 4
[10:22:55] [PASSED] 8
[10:22:55] [PASSED] 32
[10:22:55] [PASSED] 256
[10:22:55] ================ [PASSED] test_range_spare =================
[10:22:55] ===================== [PASSED] guc_dbm =====================
[10:22:55] =================== guc_idm (6 subtests) ===================
[10:22:55] [PASSED] bad_init
[10:22:55] [PASSED] no_init
[10:22:55] [PASSED] init_fini
[10:22:55] [PASSED] check_used
[10:22:55] [PASSED] check_quota
[10:22:55] [PASSED] check_all
[10:22:55] ===================== [PASSED] guc_idm =====================
[10:22:55] ================== no_relay (3 subtests) ===================
[10:22:55] [PASSED] xe_drops_guc2pf_if_not_ready
[10:22:55] [PASSED] xe_drops_guc2vf_if_not_ready
[10:22:55] [PASSED] xe_rejects_send_if_not_ready
[10:22:55] ==================== [PASSED] no_relay =====================
[10:22:55] ================== pf_relay (14 subtests) ==================
[10:22:55] [PASSED] pf_rejects_guc2pf_too_short
[10:22:55] [PASSED] pf_rejects_guc2pf_too_long
[10:22:55] [PASSED] pf_rejects_guc2pf_no_payload
[10:22:55] [PASSED] pf_fails_no_payload
[10:22:55] [PASSED] pf_fails_bad_origin
[10:22:55] [PASSED] pf_fails_bad_type
[10:22:55] [PASSED] pf_txn_reports_error
[10:22:55] [PASSED] pf_txn_sends_pf2guc
[10:22:55] [PASSED] pf_sends_pf2guc
[10:22:55] [SKIPPED] pf_loopback_nop
[10:22:55] [SKIPPED] pf_loopback_echo
[10:22:55] [SKIPPED] pf_loopback_fail
[10:22:55] [SKIPPED] pf_loopback_busy
[10:22:55] [SKIPPED] pf_loopback_retry
[10:22:55] ==================== [PASSED] pf_relay =====================
[10:22:55] ================== vf_relay (3 subtests) ===================
[10:22:55] [PASSED] vf_rejects_guc2vf_too_short
[10:22:55] [PASSED] vf_rejects_guc2vf_too_long
[10:22:55] [PASSED] vf_rejects_guc2vf_no_payload
[10:22:55] ==================== [PASSED] vf_relay =====================
[10:22:55] ================ pf_gt_config (9 subtests) =================
[10:22:55] [PASSED] fair_contexts_1vf
[10:22:55] [PASSED] fair_doorbells_1vf
[10:22:55] [PASSED] fair_ggtt_1vf
[10:22:55] ====================== fair_vram_1vf  ======================
[10:22:55] [PASSED] 3.50 GiB
[10:22:55] [PASSED] 11.5 GiB
[10:22:55] [PASSED] 15.5 GiB
[10:22:55] [PASSED] 31.5 GiB
[10:22:55] [PASSED] 63.5 GiB
[10:22:55] [PASSED] 1.91 GiB
[10:22:55] ================== [PASSED] fair_vram_1vf ==================
[10:22:55] ================ fair_vram_1vf_admin_only  =================
[10:22:55] [PASSED] 3.50 GiB
[10:22:55] [PASSED] 11.5 GiB
[10:22:55] [PASSED] 15.5 GiB
[10:22:55] [PASSED] 31.5 GiB
[10:22:55] [PASSED] 63.5 GiB
[10:22:55] [PASSED] 1.91 GiB
[10:22:55] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:22:55] ====================== fair_contexts  ======================
[10:22:55] [PASSED] 1 VF
[10:22:55] [PASSED] 2 VFs
[10:22:55] [PASSED] 3 VFs
[10:22:55] [PASSED] 4 VFs
[10:22:55] [PASSED] 5 VFs
[10:22:55] [PASSED] 6 VFs
[10:22:55] [PASSED] 7 VFs
[10:22:55] [PASSED] 8 VFs
[10:22:55] [PASSED] 9 VFs
[10:22:55] [PASSED] 10 VFs
[10:22:55] [PASSED] 11 VFs
[10:22:55] [PASSED] 12 VFs
[10:22:55] [PASSED] 13 VFs
[10:22:55] [PASSED] 14 VFs
[10:22:55] [PASSED] 15 VFs
[10:22:55] [PASSED] 16 VFs
[10:22:55] [PASSED] 17 VFs
[10:22:55] [PASSED] 18 VFs
[10:22:55] [PASSED] 19 VFs
[10:22:55] [PASSED] 20 VFs
[10:22:55] [PASSED] 21 VFs
[10:22:55] [PASSED] 22 VFs
[10:22:55] [PASSED] 23 VFs
[10:22:55] [PASSED] 24 VFs
[10:22:55] [PASSED] 25 VFs
[10:22:55] [PASSED] 26 VFs
[10:22:55] [PASSED] 27 VFs
[10:22:55] [PASSED] 28 VFs
[10:22:55] [PASSED] 29 VFs
[10:22:55] [PASSED] 30 VFs
[10:22:55] [PASSED] 31 VFs
[10:22:55] [PASSED] 32 VFs
[10:22:55] [PASSED] 33 VFs
[10:22:55] [PASSED] 34 VFs
[10:22:55] [PASSED] 35 VFs
[10:22:55] [PASSED] 36 VFs
[10:22:55] [PASSED] 37 VFs
[10:22:55] [PASSED] 38 VFs
[10:22:55] [PASSED] 39 VFs
[10:22:55] [PASSED] 40 VFs
[10:22:55] [PASSED] 41 VFs
[10:22:55] [PASSED] 42 VFs
[10:22:55] [PASSED] 43 VFs
[10:22:55] [PASSED] 44 VFs
[10:22:55] [PASSED] 45 VFs
[10:22:55] [PASSED] 46 VFs
[10:22:55] [PASSED] 47 VFs
[10:22:55] [PASSED] 48 VFs
[10:22:55] [PASSED] 49 VFs
[10:22:55] [PASSED] 50 VFs
[10:22:55] [PASSED] 51 VFs
[10:22:55] [PASSED] 52 VFs
[10:22:55] [PASSED] 53 VFs
[10:22:55] [PASSED] 54 VFs
[10:22:55] [PASSED] 55 VFs
[10:22:55] [PASSED] 56 VFs
[10:22:55] [PASSED] 57 VFs
[10:22:55] [PASSED] 58 VFs
[10:22:55] [PASSED] 59 VFs
[10:22:55] [PASSED] 60 VFs
[10:22:55] [PASSED] 61 VFs
[10:22:55] [PASSED] 62 VFs
[10:22:55] [PASSED] 63 VFs
[10:22:55] ================== [PASSED] fair_contexts ==================
[10:22:55] ===================== fair_doorbells  ======================
[10:22:55] [PASSED] 1 VF
[10:22:55] [PASSED] 2 VFs
[10:22:55] [PASSED] 3 VFs
[10:22:55] [PASSED] 4 VFs
[10:22:55] [PASSED] 5 VFs
[10:22:55] [PASSED] 6 VFs
[10:22:55] [PASSED] 7 VFs
[10:22:55] [PASSED] 8 VFs
[10:22:55] [PASSED] 9 VFs
[10:22:55] [PASSED] 10 VFs
[10:22:55] [PASSED] 11 VFs
[10:22:55] [PASSED] 12 VFs
[10:22:55] [PASSED] 13 VFs
[10:22:55] [PASSED] 14 VFs
[10:22:55] [PASSED] 15 VFs
[10:22:55] [PASSED] 16 VFs
[10:22:55] [PASSED] 17 VFs
[10:22:55] [PASSED] 18 VFs
[10:22:55] [PASSED] 19 VFs
[10:22:55] [PASSED] 20 VFs
[10:22:55] [PASSED] 21 VFs
[10:22:55] [PASSED] 22 VFs
[10:22:55] [PASSED] 23 VFs
[10:22:55] [PASSED] 24 VFs
[10:22:55] [PASSED] 25 VFs
[10:22:55] [PASSED] 26 VFs
[10:22:55] [PASSED] 27 VFs
[10:22:55] [PASSED] 28 VFs
[10:22:55] [PASSED] 29 VFs
[10:22:55] [PASSED] 30 VFs
[10:22:55] [PASSED] 31 VFs
[10:22:55] [PASSED] 32 VFs
[10:22:55] [PASSED] 33 VFs
[10:22:55] [PASSED] 34 VFs
[10:22:55] [PASSED] 35 VFs
[10:22:55] [PASSED] 36 VFs
[10:22:55] [PASSED] 37 VFs
[10:22:55] [PASSED] 38 VFs
[10:22:55] [PASSED] 39 VFs
[10:22:55] [PASSED] 40 VFs
[10:22:55] [PASSED] 41 VFs
[10:22:55] [PASSED] 42 VFs
[10:22:55] [PASSED] 43 VFs
[10:22:55] [PASSED] 44 VFs
[10:22:55] [PASSED] 45 VFs
[10:22:55] [PASSED] 46 VFs
[10:22:55] [PASSED] 47 VFs
[10:22:55] [PASSED] 48 VFs
[10:22:55] [PASSED] 49 VFs
[10:22:55] [PASSED] 50 VFs
[10:22:55] [PASSED] 51 VFs
[10:22:55] [PASSED] 52 VFs
[10:22:55] [PASSED] 53 VFs
[10:22:55] [PASSED] 54 VFs
[10:22:55] [PASSED] 55 VFs
[10:22:55] [PASSED] 56 VFs
[10:22:55] [PASSED] 57 VFs
[10:22:55] [PASSED] 58 VFs
[10:22:55] [PASSED] 59 VFs
[10:22:55] [PASSED] 60 VFs
[10:22:55] [PASSED] 61 VFs
[10:22:55] [PASSED] 62 VFs
[10:22:55] [PASSED] 63 VFs
[10:22:55] ================= [PASSED] fair_doorbells ==================
[10:22:55] ======================== fair_ggtt  ========================
[10:22:55] [PASSED] 1 VF
[10:22:55] [PASSED] 2 VFs
[10:22:55] [PASSED] 3 VFs
[10:22:55] [PASSED] 4 VFs
[10:22:55] [PASSED] 5 VFs
[10:22:55] [PASSED] 6 VFs
[10:22:55] [PASSED] 7 VFs
[10:22:55] [PASSED] 8 VFs
[10:22:55] [PASSED] 9 VFs
[10:22:55] [PASSED] 10 VFs
[10:22:55] [PASSED] 11 VFs
[10:22:55] [PASSED] 12 VFs
[10:22:55] [PASSED] 13 VFs
[10:22:55] [PASSED] 14 VFs
[10:22:55] [PASSED] 15 VFs
[10:22:55] [PASSED] 16 VFs
[10:22:55] [PASSED] 17 VFs
[10:22:55] [PASSED] 18 VFs
[10:22:55] [PASSED] 19 VFs
[10:22:55] [PASSED] 20 VFs
[10:22:55] [PASSED] 21 VFs
[10:22:55] [PASSED] 22 VFs
[10:22:55] [PASSED] 23 VFs
[10:22:55] [PASSED] 24 VFs
[10:22:55] [PASSED] 25 VFs
[10:22:55] [PASSED] 26 VFs
[10:22:55] [PASSED] 27 VFs
[10:22:55] [PASSED] 28 VFs
[10:22:55] [PASSED] 29 VFs
[10:22:55] [PASSED] 30 VFs
[10:22:55] [PASSED] 31 VFs
[10:22:55] [PASSED] 32 VFs
[10:22:55] [PASSED] 33 VFs
[10:22:55] [PASSED] 34 VFs
[10:22:55] [PASSED] 35 VFs
[10:22:55] [PASSED] 36 VFs
[10:22:55] [PASSED] 37 VFs
[10:22:55] [PASSED] 38 VFs
[10:22:55] [PASSED] 39 VFs
[10:22:55] [PASSED] 40 VFs
[10:22:55] [PASSED] 41 VFs
[10:22:55] [PASSED] 42 VFs
[10:22:55] [PASSED] 43 VFs
[10:22:55] [PASSED] 44 VFs
[10:22:55] [PASSED] 45 VFs
[10:22:55] [PASSED] 46 VFs
[10:22:55] [PASSED] 47 VFs
[10:22:55] [PASSED] 48 VFs
[10:22:55] [PASSED] 49 VFs
[10:22:55] [PASSED] 50 VFs
[10:22:55] [PASSED] 51 VFs
[10:22:55] [PASSED] 52 VFs
[10:22:55] [PASSED] 53 VFs
[10:22:55] [PASSED] 54 VFs
[10:22:55] [PASSED] 55 VFs
[10:22:55] [PASSED] 56 VFs
[10:22:55] [PASSED] 57 VFs
[10:22:55] [PASSED] 58 VFs
[10:22:55] [PASSED] 59 VFs
[10:22:55] [PASSED] 60 VFs
[10:22:55] [PASSED] 61 VFs
[10:22:55] [PASSED] 62 VFs
[10:22:55] [PASSED] 63 VFs
[10:22:55] ==================== [PASSED] fair_ggtt ====================
[10:22:55] ======================== fair_vram  ========================
[10:22:55] [PASSED] 1 VF
[10:22:55] [PASSED] 2 VFs
[10:22:55] [PASSED] 3 VFs
[10:22:55] [PASSED] 4 VFs
[10:22:55] [PASSED] 5 VFs
[10:22:55] [PASSED] 6 VFs
[10:22:55] [PASSED] 7 VFs
[10:22:55] [PASSED] 8 VFs
[10:22:55] [PASSED] 9 VFs
[10:22:55] [PASSED] 10 VFs
[10:22:56] [PASSED] 11 VFs
[10:22:56] [PASSED] 12 VFs
[10:22:56] [PASSED] 13 VFs
[10:22:56] [PASSED] 14 VFs
[10:22:56] [PASSED] 15 VFs
[10:22:56] [PASSED] 16 VFs
[10:22:56] [PASSED] 17 VFs
[10:22:56] [PASSED] 18 VFs
[10:22:56] [PASSED] 19 VFs
[10:22:56] [PASSED] 20 VFs
[10:22:56] [PASSED] 21 VFs
[10:22:56] [PASSED] 22 VFs
[10:22:56] [PASSED] 23 VFs
[10:22:56] [PASSED] 24 VFs
[10:22:56] [PASSED] 25 VFs
[10:22:56] [PASSED] 26 VFs
[10:22:56] [PASSED] 27 VFs
[10:22:56] [PASSED] 28 VFs
[10:22:56] [PASSED] 29 VFs
[10:22:56] [PASSED] 30 VFs
[10:22:56] [PASSED] 31 VFs
[10:22:56] [PASSED] 32 VFs
[10:22:56] [PASSED] 33 VFs
[10:22:56] [PASSED] 34 VFs
[10:22:56] [PASSED] 35 VFs
[10:22:56] [PASSED] 36 VFs
[10:22:56] [PASSED] 37 VFs
[10:22:56] [PASSED] 38 VFs
[10:22:56] [PASSED] 39 VFs
[10:22:56] [PASSED] 40 VFs
[10:22:56] [PASSED] 41 VFs
[10:22:56] [PASSED] 42 VFs
[10:22:56] [PASSED] 43 VFs
[10:22:56] [PASSED] 44 VFs
[10:22:56] [PASSED] 45 VFs
[10:22:56] [PASSED] 46 VFs
[10:22:56] [PASSED] 47 VFs
[10:22:56] [PASSED] 48 VFs
[10:22:56] [PASSED] 49 VFs
[10:22:56] [PASSED] 50 VFs
[10:22:56] [PASSED] 51 VFs
[10:22:56] [PASSED] 52 VFs
[10:22:56] [PASSED] 53 VFs
[10:22:56] [PASSED] 54 VFs
[10:22:56] [PASSED] 55 VFs
[10:22:56] [PASSED] 56 VFs
[10:22:56] [PASSED] 57 VFs
[10:22:56] [PASSED] 58 VFs
[10:22:56] [PASSED] 59 VFs
[10:22:56] [PASSED] 60 VFs
[10:22:56] [PASSED] 61 VFs
[10:22:56] [PASSED] 62 VFs
[10:22:56] [PASSED] 63 VFs
[10:22:56] ==================== [PASSED] fair_vram ====================
[10:22:56] ================== [PASSED] pf_gt_config ===================
[10:22:56] ===================== lmtt (1 subtest) =====================
[10:22:56] ======================== test_ops  =========================
[10:22:56] [PASSED] 2-level
[10:22:56] [PASSED] multi-level
[10:22:56] ==================== [PASSED] test_ops =====================
[10:22:56] ====================== [PASSED] lmtt =======================
[10:22:56] ================= pf_service (11 subtests) =================
[10:22:56] [PASSED] pf_negotiate_any
[10:22:56] [PASSED] pf_negotiate_base_match
[10:22:56] [PASSED] pf_negotiate_base_newer
[10:22:56] [PASSED] pf_negotiate_base_next
[10:22:56] [SKIPPED] pf_negotiate_base_older
[10:22:56] [PASSED] pf_negotiate_base_prev
[10:22:56] [PASSED] pf_negotiate_latest_match
[10:22:56] [PASSED] pf_negotiate_latest_newer
[10:22:56] [PASSED] pf_negotiate_latest_next
[10:22:56] [SKIPPED] pf_negotiate_latest_older
[10:22:56] [SKIPPED] pf_negotiate_latest_prev
[10:22:56] =================== [PASSED] pf_service ====================
[10:22:56] ================= xe_guc_g2g (2 subtests) ==================
[10:22:56] ============== xe_live_guc_g2g_kunit_default  ==============
[10:22:56] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:22:56] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:22:56] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:22:56] =================== [SKIPPED] xe_guc_g2g ===================
[10:22:56] =================== xe_mocs (2 subtests) ===================
[10:22:56] ================ xe_live_mocs_kernel_kunit  ================
[10:22:56] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:22:56] ================ xe_live_mocs_reset_kunit  =================
[10:22:56] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:22:56] ==================== [SKIPPED] xe_mocs =====================
[10:22:56] ================= xe_migrate (2 subtests) ==================
[10:22:56] ================= xe_migrate_sanity_kunit  =================
[10:22:56] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:22:56] ================== xe_validate_ccs_kunit  ==================
[10:22:56] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:22:56] =================== [SKIPPED] xe_migrate ===================
[10:22:56] ================== xe_dma_buf (1 subtest) ==================
[10:22:56] ==================== xe_dma_buf_kunit  =====================
[10:22:56] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:22:56] =================== [SKIPPED] xe_dma_buf ===================
[10:22:56] ================= xe_bo_shrink (1 subtest) =================
[10:22:56] =================== xe_bo_shrink_kunit  ====================
[10:22:56] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:22:56] ================== [SKIPPED] xe_bo_shrink ==================
[10:22:56] ==================== xe_bo (2 subtests) ====================
[10:22:56] ================== xe_ccs_migrate_kunit  ===================
[10:22:56] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:22:56] ==================== xe_bo_evict_kunit  ====================
[10:22:56] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:22:56] ===================== [SKIPPED] xe_bo ======================
[10:22:56] ==================== args (13 subtests) ====================
[10:22:56] [PASSED] count_args_test
[10:22:56] [PASSED] call_args_example
[10:22:56] [PASSED] call_args_test
[10:22:56] [PASSED] drop_first_arg_example
[10:22:56] [PASSED] drop_first_arg_test
[10:22:56] [PASSED] first_arg_example
[10:22:56] [PASSED] first_arg_test
[10:22:56] [PASSED] last_arg_example
[10:22:56] [PASSED] last_arg_test
[10:22:56] [PASSED] pick_arg_example
[10:22:56] [PASSED] if_args_example
[10:22:56] [PASSED] if_args_test
[10:22:56] [PASSED] sep_comma_example
[10:22:56] ====================== [PASSED] args =======================
[10:22:56] =================== xe_pci (3 subtests) ====================
[10:22:56] ==================== check_graphics_ip  ====================
[10:22:56] [PASSED] 12.00 Xe_LP
[10:22:56] [PASSED] 12.10 Xe_LP+
[10:22:56] [PASSED] 12.55 Xe_HPG
[10:22:56] [PASSED] 12.60 Xe_HPC
[10:22:56] [PASSED] 12.70 Xe_LPG
[10:22:56] [PASSED] 12.71 Xe_LPG
[10:22:56] [PASSED] 12.74 Xe_LPG+
[10:22:56] [PASSED] 20.01 Xe2_HPG
[10:22:56] [PASSED] 20.02 Xe2_HPG
[10:22:56] [PASSED] 20.04 Xe2_LPG
[10:22:56] [PASSED] 30.00 Xe3_LPG
[10:22:56] [PASSED] 30.01 Xe3_LPG
[10:22:56] [PASSED] 30.03 Xe3_LPG
[10:22:56] [PASSED] 30.04 Xe3_LPG
[10:22:56] [PASSED] 30.05 Xe3_LPG
[10:22:56] [PASSED] 35.10 Xe3p_LPG
[10:22:56] [PASSED] 35.11 Xe3p_XPC
[10:22:56] ================ [PASSED] check_graphics_ip ================
[10:22:56] ===================== check_media_ip  ======================
[10:22:56] [PASSED] 12.00 Xe_M
[10:22:56] [PASSED] 12.55 Xe_HPM
[10:22:56] [PASSED] 13.00 Xe_LPM+
[10:22:56] [PASSED] 13.01 Xe2_HPM
[10:22:56] [PASSED] 20.00 Xe2_LPM
[10:22:56] [PASSED] 30.00 Xe3_LPM
[10:22:56] [PASSED] 30.02 Xe3_LPM
[10:22:56] [PASSED] 35.00 Xe3p_LPM
[10:22:56] [PASSED] 35.03 Xe3p_HPM
[10:22:56] ================= [PASSED] check_media_ip ==================
[10:22:56] =================== check_platform_desc  ===================
[10:22:56] [PASSED] 0x9A60 (TIGERLAKE)
[10:22:56] [PASSED] 0x9A68 (TIGERLAKE)
[10:22:56] [PASSED] 0x9A70 (TIGERLAKE)
[10:22:56] [PASSED] 0x9A40 (TIGERLAKE)
[10:22:56] [PASSED] 0x9A49 (TIGERLAKE)
[10:22:56] [PASSED] 0x9A59 (TIGERLAKE)
[10:22:56] [PASSED] 0x9A78 (TIGERLAKE)
[10:22:56] [PASSED] 0x9AC0 (TIGERLAKE)
[10:22:56] [PASSED] 0x9AC9 (TIGERLAKE)
[10:22:56] [PASSED] 0x9AD9 (TIGERLAKE)
[10:22:56] [PASSED] 0x9AF8 (TIGERLAKE)
[10:22:56] [PASSED] 0x4C80 (ROCKETLAKE)
[10:22:56] [PASSED] 0x4C8A (ROCKETLAKE)
[10:22:56] [PASSED] 0x4C8B (ROCKETLAKE)
[10:22:56] [PASSED] 0x4C8C (ROCKETLAKE)
[10:22:56] [PASSED] 0x4C90 (ROCKETLAKE)
[10:22:56] [PASSED] 0x4C9A (ROCKETLAKE)
[10:22:56] [PASSED] 0x4680 (ALDERLAKE_S)
[10:22:56] [PASSED] 0x4682 (ALDERLAKE_S)
[10:22:56] [PASSED] 0x4688 (ALDERLAKE_S)
[10:22:56] [PASSED] 0x468A (ALDERLAKE_S)
[10:22:56] [PASSED] 0x468B (ALDERLAKE_S)
[10:22:56] [PASSED] 0x4690 (ALDERLAKE_S)
[10:22:56] [PASSED] 0x4692 (ALDERLAKE_S)
[10:22:56] [PASSED] 0x4693 (ALDERLAKE_S)
[10:22:56] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46AA (ALDERLAKE_P)
[10:22:56] [PASSED] 0x462A (ALDERLAKE_P)
[10:22:56] [PASSED] 0x4626 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x4628 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:22:56] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:22:56] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:22:56] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:22:56] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:22:56] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:22:56] [PASSED] 0xA721 (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA720 (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:22:56] [PASSED] 0xA780 (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA781 (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA782 (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA783 (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA788 (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA789 (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA78A (ALDERLAKE_S)
[10:22:56] [PASSED] 0xA78B (ALDERLAKE_S)
[10:22:56] [PASSED] 0x4905 (DG1)
[10:22:56] [PASSED] 0x4906 (DG1)
[10:22:56] [PASSED] 0x4907 (DG1)
[10:22:56] [PASSED] 0x4908 (DG1)
[10:22:56] [PASSED] 0x4909 (DG1)
[10:22:56] [PASSED] 0x56C0 (DG2)
[10:22:56] [PASSED] 0x56C2 (DG2)
[10:22:56] [PASSED] 0x56C1 (DG2)
[10:22:56] [PASSED] 0x7D51 (METEORLAKE)
[10:22:56] [PASSED] 0x7DD1 (METEORLAKE)
[10:22:56] [PASSED] 0x7D41 (METEORLAKE)
[10:22:56] [PASSED] 0x7D67 (METEORLAKE)
[10:22:56] [PASSED] 0xB640 (METEORLAKE)
[10:22:56] [PASSED] 0x56A0 (DG2)
[10:22:56] [PASSED] 0x56A1 (DG2)
[10:22:56] [PASSED] 0x56A2 (DG2)
[10:22:56] [PASSED] 0x56BE (DG2)
[10:22:56] [PASSED] 0x56BF (DG2)
[10:22:56] [PASSED] 0x5690 (DG2)
[10:22:56] [PASSED] 0x5691 (DG2)
[10:22:56] [PASSED] 0x5692 (DG2)
[10:22:56] [PASSED] 0x56A5 (DG2)
[10:22:56] [PASSED] 0x56A6 (DG2)
[10:22:56] [PASSED] 0x56B0 (DG2)
[10:22:56] [PASSED] 0x56B1 (DG2)
[10:22:56] [PASSED] 0x56BA (DG2)
[10:22:56] [PASSED] 0x56BB (DG2)
[10:22:56] [PASSED] 0x56BC (DG2)
[10:22:56] [PASSED] 0x56BD (DG2)
[10:22:56] [PASSED] 0x5693 (DG2)
[10:22:56] [PASSED] 0x5694 (DG2)
[10:22:56] [PASSED] 0x5695 (DG2)
[10:22:56] [PASSED] 0x56A3 (DG2)
[10:22:56] [PASSED] 0x56A4 (DG2)
[10:22:56] [PASSED] 0x56B2 (DG2)
[10:22:56] [PASSED] 0x56B3 (DG2)
[10:22:56] [PASSED] 0x5696 (DG2)
[10:22:56] [PASSED] 0x5697 (DG2)
[10:22:56] [PASSED] 0xB69 (PVC)
[10:22:56] [PASSED] 0xB6E (PVC)
[10:22:56] [PASSED] 0xBD4 (PVC)
[10:22:56] [PASSED] 0xBD5 (PVC)
[10:22:56] [PASSED] 0xBD6 (PVC)
[10:22:56] [PASSED] 0xBD7 (PVC)
[10:22:56] [PASSED] 0xBD8 (PVC)
[10:22:56] [PASSED] 0xBD9 (PVC)
[10:22:56] [PASSED] 0xBDA (PVC)
[10:22:56] [PASSED] 0xBDB (PVC)
[10:22:56] [PASSED] 0xBE0 (PVC)
[10:22:56] [PASSED] 0xBE1 (PVC)
[10:22:56] [PASSED] 0xBE5 (PVC)
[10:22:56] [PASSED] 0x7D40 (METEORLAKE)
[10:22:56] [PASSED] 0x7D45 (METEORLAKE)
[10:22:56] [PASSED] 0x7D55 (METEORLAKE)
[10:22:56] [PASSED] 0x7D60 (METEORLAKE)
[10:22:56] [PASSED] 0x7DD5 (METEORLAKE)
[10:22:56] [PASSED] 0x6420 (LUNARLAKE)
[10:22:56] [PASSED] 0x64A0 (LUNARLAKE)
[10:22:56] [PASSED] 0x64B0 (LUNARLAKE)
[10:22:56] [PASSED] 0xE202 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE209 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE20B (BATTLEMAGE)
[10:22:56] [PASSED] 0xE20C (BATTLEMAGE)
[10:22:56] [PASSED] 0xE20D (BATTLEMAGE)
[10:22:56] [PASSED] 0xE210 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE211 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE212 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE216 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE220 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE221 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE222 (BATTLEMAGE)
[10:22:56] [PASSED] 0xE223 (BATTLEMAGE)
[10:22:56] [PASSED] 0xB080 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB081 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB082 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB083 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB084 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB085 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB086 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB087 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB08F (PANTHERLAKE)
[10:22:56] [PASSED] 0xB090 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:22:56] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:22:56] [PASSED] 0xFD80 (PANTHERLAKE)
[10:22:56] [PASSED] 0xFD81 (PANTHERLAKE)
[10:22:56] [PASSED] 0xD740 (NOVALAKE_S)
[10:22:56] [PASSED] 0xD741 (NOVALAKE_S)
[10:22:56] [PASSED] 0xD742 (NOVALAKE_S)
[10:22:56] [PASSED] 0xD743 (NOVALAKE_S)
[10:22:56] [PASSED] 0xD744 (NOVALAKE_S)
[10:22:56] [PASSED] 0xD745 (NOVALAKE_S)
[10:22:56] [PASSED] 0x674C (CRESCENTISLAND)
[10:22:56] [PASSED] 0xD750 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD751 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD752 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD753 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD754 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD755 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD756 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD757 (NOVALAKE_P)
[10:22:56] [PASSED] 0xD75F (NOVALAKE_P)
[10:22:56] =============== [PASSED] check_platform_desc ===============
[10:22:56] ===================== [PASSED] xe_pci ======================
[10:22:56] =================== xe_rtp (2 subtests) ====================
[10:22:56] =============== xe_rtp_process_to_sr_tests  ================
[10:22:56] [PASSED] coalesce-same-reg
[10:22:56] [PASSED] no-match-no-add
[10:22:56] [PASSED] match-or
[10:22:56] [PASSED] match-or-xfail
[10:22:56] [PASSED] no-match-no-add-multiple-rules
[10:22:56] [PASSED] two-regs-two-entries
[10:22:56] [PASSED] clr-one-set-other
[10:22:56] [PASSED] set-field
[10:22:56] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:22:56] [PASSED] conflict-not-disjoint
[10:22:56] [PASSED] conflict-reg-type
[10:22:56] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:22:56] ================== xe_rtp_process_tests  ===================
[10:22:56] [PASSED] active1
[10:22:56] [PASSED] active2
[10:22:56] [PASSED] active-inactive
[10:22:56] [PASSED] inactive-active
[10:22:56] [PASSED] inactive-1st_or_active-inactive
[10:22:56] [PASSED] inactive-2nd_or_active-inactive
[10:22:56] [PASSED] inactive-last_or_active-inactive
[10:22:56] [PASSED] inactive-no_or_active-inactive
[10:22:56] ============== [PASSED] xe_rtp_process_tests ===============
[10:22:56] ===================== [PASSED] xe_rtp ======================
[10:22:56] ==================== xe_wa (1 subtest) =====================
[10:22:56] ======================== xe_wa_gt  =========================
[10:22:56] [PASSED] TIGERLAKE B0
[10:22:56] [PASSED] DG1 A0
[10:22:56] [PASSED] DG1 B0
[10:22:56] [PASSED] ALDERLAKE_S A0
[10:22:56] [PASSED] ALDERLAKE_S B0
[10:22:56] [PASSED] ALDERLAKE_S C0
[10:22:56] [PASSED] ALDERLAKE_S D0
[10:22:56] [PASSED] ALDERLAKE_P A0
[10:22:56] [PASSED] ALDERLAKE_P B0
[10:22:56] [PASSED] ALDERLAKE_P C0
[10:22:56] [PASSED] ALDERLAKE_S RPLS D0
[10:22:56] [PASSED] ALDERLAKE_P RPLU E0
[10:22:56] [PASSED] DG2 G10 C0
[10:22:56] [PASSED] DG2 G11 B1
[10:22:56] [PASSED] DG2 G12 A1
[10:22:56] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:22:56] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:22:56] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:22:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:22:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:22:56] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:22:56] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:22:56] ==================== [PASSED] xe_wa_gt =====================
[10:22:56] ====================== [PASSED] xe_wa ======================
[10:22:56] ============================================================
[10:22:56] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:22:56] Elapsed time: 36.180s total, 4.208s configuring, 31.354s building, 0.602s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:22:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:22:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:23:21] Starting KUnit Kernel (1/1)...
[10:23:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:23:21] ============ drm_test_pick_cmdline (2 subtests) ============
[10:23:21] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:23:21] =============== drm_test_pick_cmdline_named  ===============
[10:23:21] [PASSED] NTSC
[10:23:21] [PASSED] NTSC-J
[10:23:21] [PASSED] PAL
[10:23:21] [PASSED] PAL-M
[10:23:21] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:23:21] ============== [PASSED] drm_test_pick_cmdline ==============
[10:23:21] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:23:21] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:23:21] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:23:21] =========== drm_validate_clone_mode (2 subtests) ===========
[10:23:21] ============== drm_test_check_in_clone_mode  ===============
[10:23:21] [PASSED] in_clone_mode
[10:23:21] [PASSED] not_in_clone_mode
[10:23:21] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:23:21] =============== drm_test_check_valid_clones  ===============
[10:23:21] [PASSED] not_in_clone_mode
[10:23:21] [PASSED] valid_clone
[10:23:21] [PASSED] invalid_clone
[10:23:21] =========== [PASSED] drm_test_check_valid_clones ===========
[10:23:21] ============= [PASSED] drm_validate_clone_mode =============
[10:23:21] ============= drm_validate_modeset (1 subtest) =============
[10:23:21] [PASSED] drm_test_check_connector_changed_modeset
[10:23:21] ============== [PASSED] drm_validate_modeset ===============
[10:23:21] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:23:21] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:23:21] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:23:21] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:23:21] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:23:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:23:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:23:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:23:21] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:23:21] ============== drm_bridge_alloc (2 subtests) ===============
[10:23:21] [PASSED] drm_test_drm_bridge_alloc_basic
[10:23:21] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:23:21] ================ [PASSED] drm_bridge_alloc =================
[10:23:21] ============= drm_cmdline_parser (40 subtests) =============
[10:23:21] [PASSED] drm_test_cmdline_force_d_only
[10:23:21] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:23:21] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:23:21] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:23:21] [PASSED] drm_test_cmdline_force_e_only
[10:23:21] [PASSED] drm_test_cmdline_res
[10:23:21] [PASSED] drm_test_cmdline_res_vesa
[10:23:21] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:23:21] [PASSED] drm_test_cmdline_res_rblank
[10:23:21] [PASSED] drm_test_cmdline_res_bpp
[10:23:21] [PASSED] drm_test_cmdline_res_refresh
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:23:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:23:21] [PASSED] drm_test_cmdline_res_margins_force_on
[10:23:21] [PASSED] drm_test_cmdline_res_vesa_margins
[10:23:21] [PASSED] drm_test_cmdline_name
[10:23:21] [PASSED] drm_test_cmdline_name_bpp
[10:23:21] [PASSED] drm_test_cmdline_name_option
[10:23:21] [PASSED] drm_test_cmdline_name_bpp_option
[10:23:21] [PASSED] drm_test_cmdline_rotate_0
[10:23:21] [PASSED] drm_test_cmdline_rotate_90
[10:23:21] [PASSED] drm_test_cmdline_rotate_180
[10:23:21] [PASSED] drm_test_cmdline_rotate_270
[10:23:21] [PASSED] drm_test_cmdline_hmirror
[10:23:21] [PASSED] drm_test_cmdline_vmirror
[10:23:21] [PASSED] drm_test_cmdline_margin_options
[10:23:21] [PASSED] drm_test_cmdline_multiple_options
[10:23:21] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:23:21] [PASSED] drm_test_cmdline_extra_and_option
[10:23:21] [PASSED] drm_test_cmdline_freestanding_options
[10:23:21] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:23:21] [PASSED] drm_test_cmdline_panel_orientation
[10:23:21] ================ drm_test_cmdline_invalid  =================
[10:23:21] [PASSED] margin_only
[10:23:22] [PASSED] interlace_only
[10:23:22] [PASSED] res_missing_x
[10:23:22] [PASSED] res_missing_y
[10:23:22] [PASSED] res_bad_y
[10:23:22] [PASSED] res_missing_y_bpp
[10:23:22] [PASSED] res_bad_bpp
[10:23:22] [PASSED] res_bad_refresh
[10:23:22] [PASSED] res_bpp_refresh_force_on_off
[10:23:22] [PASSED] res_invalid_mode
[10:23:22] [PASSED] res_bpp_wrong_place_mode
[10:23:22] [PASSED] name_bpp_refresh
[10:23:22] [PASSED] name_refresh
[10:23:22] [PASSED] name_refresh_wrong_mode
[10:23:22] [PASSED] name_refresh_invalid_mode
[10:23:22] [PASSED] rotate_multiple
[10:23:22] [PASSED] rotate_invalid_val
[10:23:22] [PASSED] rotate_truncated
[10:23:22] [PASSED] invalid_option
[10:23:22] [PASSED] invalid_tv_option
[10:23:22] [PASSED] truncated_tv_option
[10:23:22] ============ [PASSED] drm_test_cmdline_invalid =============
[10:23:22] =============== drm_test_cmdline_tv_options  ===============
[10:23:22] [PASSED] NTSC
[10:23:22] [PASSED] NTSC_443
[10:23:22] [PASSED] NTSC_J
[10:23:22] [PASSED] PAL
[10:23:22] [PASSED] PAL_M
[10:23:22] [PASSED] PAL_N
[10:23:22] [PASSED] SECAM
[10:23:22] [PASSED] MONO_525
[10:23:22] [PASSED] MONO_625
[10:23:22] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:23:22] =============== [PASSED] drm_cmdline_parser ================
[10:23:22] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:23:22] [PASSED] drm_test_connector_hdmi_init_valid
[10:23:22] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:23:22] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:23:22] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:23:22] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:23:22] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:23:22] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:23:22] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:23:22] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:23:22] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:23:22] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:23:22] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:23:22] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:23:22] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:23:22] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:23:22] [PASSED] drm_test_connector_hdmi_init_null_product
[10:23:22] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:23:22] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:23:22] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:23:22] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:23:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:23:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:23:22] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:23:22] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:23:22] [PASSED] HDMI-A
[10:23:22] [PASSED] HDMI-B
[10:23:22] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:23:22] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:23:22] [PASSED] Unknown
[10:23:22] [PASSED] VGA
[10:23:22] [PASSED] DVI-I
[10:23:22] [PASSED] DVI-D
[10:23:22] [PASSED] DVI-A
[10:23:22] [PASSED] Composite
[10:23:22] [PASSED] SVIDEO
[10:23:22] [PASSED] LVDS
[10:23:22] [PASSED] Component
[10:23:22] [PASSED] DIN
[10:23:22] [PASSED] DP
[10:23:22] [PASSED] TV
[10:23:22] [PASSED] eDP
[10:23:22] [PASSED] Virtual
[10:23:22] [PASSED] DSI
[10:23:22] [PASSED] DPI
[10:23:22] [PASSED] Writeback
[10:23:22] [PASSED] SPI
[10:23:22] [PASSED] USB
[10:23:22] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:23:22] ============ [PASSED] drmm_connector_hdmi_init =============
[10:23:22] ============= drmm_connector_init (3 subtests) =============
[10:23:22] [PASSED] drm_test_drmm_connector_init
[10:23:22] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:23:22] ========= drm_test_drmm_connector_init_type_valid  =========
[10:23:22] [PASSED] Unknown
[10:23:22] [PASSED] VGA
[10:23:22] [PASSED] DVI-I
[10:23:22] [PASSED] DVI-D
[10:23:22] [PASSED] DVI-A
[10:23:22] [PASSED] Composite
[10:23:22] [PASSED] SVIDEO
[10:23:22] [PASSED] LVDS
[10:23:22] [PASSED] Component
[10:23:22] [PASSED] DIN
[10:23:22] [PASSED] DP
[10:23:22] [PASSED] HDMI-A
[10:23:22] [PASSED] HDMI-B
[10:23:22] [PASSED] TV
[10:23:22] [PASSED] eDP
[10:23:22] [PASSED] Virtual
[10:23:22] [PASSED] DSI
[10:23:22] [PASSED] DPI
[10:23:22] [PASSED] Writeback
[10:23:22] [PASSED] SPI
[10:23:22] [PASSED] USB
[10:23:22] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:23:22] =============== [PASSED] drmm_connector_init ===============
[10:23:22] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_init
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:23:22] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:23:22] [PASSED] Unknown
[10:23:22] [PASSED] VGA
[10:23:22] [PASSED] DVI-I
[10:23:22] [PASSED] DVI-D
[10:23:22] [PASSED] DVI-A
[10:23:22] [PASSED] Composite
[10:23:22] [PASSED] SVIDEO
[10:23:22] [PASSED] LVDS
[10:23:22] [PASSED] Component
[10:23:22] [PASSED] DIN
[10:23:22] [PASSED] DP
[10:23:22] [PASSED] HDMI-A
[10:23:22] [PASSED] HDMI-B
[10:23:22] [PASSED] TV
[10:23:22] [PASSED] eDP
[10:23:22] [PASSED] Virtual
[10:23:22] [PASSED] DSI
[10:23:22] [PASSED] DPI
[10:23:22] [PASSED] Writeback
[10:23:22] [PASSED] SPI
[10:23:22] [PASSED] USB
[10:23:22] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:23:22] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:23:22] [PASSED] Unknown
[10:23:22] [PASSED] VGA
[10:23:22] [PASSED] DVI-I
[10:23:22] [PASSED] DVI-D
[10:23:22] [PASSED] DVI-A
[10:23:22] [PASSED] Composite
[10:23:22] [PASSED] SVIDEO
[10:23:22] [PASSED] LVDS
[10:23:22] [PASSED] Component
[10:23:22] [PASSED] DIN
[10:23:22] [PASSED] DP
[10:23:22] [PASSED] HDMI-A
[10:23:22] [PASSED] HDMI-B
[10:23:22] [PASSED] TV
[10:23:22] [PASSED] eDP
[10:23:22] [PASSED] Virtual
[10:23:22] [PASSED] DSI
[10:23:22] [PASSED] DPI
[10:23:22] [PASSED] Writeback
[10:23:22] [PASSED] SPI
[10:23:22] [PASSED] USB
[10:23:22] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:23:22] =========== [PASSED] drm_connector_dynamic_init ============
[10:23:22] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:23:22] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:23:22] ======= drm_connector_dynamic_register (7 subtests) ========
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:23:22] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:23:22] ========= [PASSED] drm_connector_dynamic_register ==========
[10:23:22] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:23:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:23:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:23:22] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:23:22] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:23:22] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:23:22] [PASSED] NTSC
[10:23:22] [PASSED] NTSC-443
[10:23:22] [PASSED] NTSC-J
[10:23:22] [PASSED] PAL
[10:23:22] [PASSED] PAL-M
[10:23:22] [PASSED] PAL-N
[10:23:22] [PASSED] SECAM
[10:23:22] [PASSED] Mono
[10:23:22] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:23:22] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:23:22] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:23:22] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:23:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:23:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:23:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:23:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:23:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:23:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:23:22] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:23:22] [PASSED] VIC 96
[10:23:22] [PASSED] VIC 97
[10:23:22] [PASSED] VIC 101
[10:23:22] [PASSED] VIC 102
[10:23:22] [PASSED] VIC 106
[10:23:22] [PASSED] VIC 107
[10:23:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:23:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:23:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:23:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:23:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:23:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:23:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:23:22] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:23:22] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:23:22] [PASSED] Automatic
[10:23:22] [PASSED] Full
[10:23:22] [PASSED] Limited 16:235
[10:23:22] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:23:22] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:23:22] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:23:22] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:23:22] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:23:22] [PASSED] RGB
[10:23:22] [PASSED] YUV 4:2:0
[10:23:22] [PASSED] YUV 4:2:2
[10:23:22] [PASSED] YUV 4:4:4
[10:23:22] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:23:22] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:23:22] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:23:22] ============= drm_damage_helper (21 subtests) ==============
[10:23:22] [PASSED] drm_test_damage_iter_no_damage
[10:23:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:23:22] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:23:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:23:22] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:23:22] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:23:22] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:23:22] [PASSED] drm_test_damage_iter_simple_damage
[10:23:22] [PASSED] drm_test_damage_iter_single_damage
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:23:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:23:22] [PASSED] drm_test_damage_iter_damage
[10:23:22] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:23:22] [PASSED] drm_test_damage_iter_damage_one_outside
[10:23:22] [PASSED] drm_test_damage_iter_damage_src_moved
[10:23:22] [PASSED] drm_test_damage_iter_damage_not_visible
[10:23:22] ================ [PASSED] drm_damage_helper ================
[10:23:22] ============== drm_dp_mst_helper (3 subtests) ==============
[10:23:22] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:23:22] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:23:22] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:23:22] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:23:22] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:23:22] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:23:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:23:22] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:23:22] [PASSED] Link rate 2000000 lane count 4
[10:23:22] [PASSED] Link rate 2000000 lane count 2
[10:23:22] [PASSED] Link rate 2000000 lane count 1
[10:23:22] [PASSED] Link rate 1350000 lane count 4
[10:23:22] [PASSED] Link rate 1350000 lane count 2
[10:23:22] [PASSED] Link rate 1350000 lane count 1
[10:23:22] [PASSED] Link rate 1000000 lane count 4
[10:23:22] [PASSED] Link rate 1000000 lane count 2
[10:23:22] [PASSED] Link rate 1000000 lane count 1
[10:23:22] [PASSED] Link rate 810000 lane count 4
[10:23:22] [PASSED] Link rate 810000 lane count 2
[10:23:22] [PASSED] Link rate 810000 lane count 1
[10:23:22] [PASSED] Link rate 540000 lane count 4
[10:23:22] [PASSED] Link rate 540000 lane count 2
[10:23:22] [PASSED] Link rate 540000 lane count 1
[10:23:22] [PASSED] Link rate 270000 lane count 4
[10:23:22] [PASSED] Link rate 270000 lane count 2
[10:23:22] [PASSED] Link rate 270000 lane count 1
[10:23:22] [PASSED] Link rate 162000 lane count 4
[10:23:22] [PASSED] Link rate 162000 lane count 2
[10:23:22] [PASSED] Link rate 162000 lane count 1
[10:23:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:23:22] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:23:22] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:23:22] [PASSED] DP_POWER_UP_PHY with port number
[10:23:22] [PASSED] DP_POWER_DOWN_PHY with port number
[10:23:22] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:23:22] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:23:22] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:23:22] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:23:22] [PASSED] DP_QUERY_PAYLOAD with port number
[10:23:22] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:23:22] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:23:22] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:23:22] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:23:22] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:23:22] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:23:22] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:23:22] [PASSED] DP_REMOTE_I2C_READ with port number
[10:23:22] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:23:22] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:23:22] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:23:22] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:23:22] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:23:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:23:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:23:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:23:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:23:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:23:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:23:22] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:23:22] ================ [PASSED] drm_dp_mst_helper ================
[10:23:22] ================== drm_exec (7 subtests) ===================
[10:23:22] [PASSED] sanitycheck
[10:23:22] [PASSED] test_lock
[10:23:22] [PASSED] test_lock_unlock
[10:23:22] [PASSED] test_duplicates
[10:23:22] [PASSED] test_prepare
[10:23:22] [PASSED] test_prepare_array
[10:23:22] [PASSED] test_multiple_loops
[10:23:22] ==================== [PASSED] drm_exec =====================
[10:23:22] =========== drm_format_helper_test (17 subtests) ===========
[10:23:22] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:23:22] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:23:22] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:23:22] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:23:22] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:23:22] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:23:22] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:23:22] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:23:22] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:23:22] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:23:22] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:23:22] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:23:22] ==================== drm_test_fb_swab  =====================
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ================ [PASSED] drm_test_fb_swab =================
[10:23:22] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:23:22] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:23:22] [PASSED] single_pixel_source_buffer
[10:23:22] [PASSED] single_pixel_clip_rectangle
[10:23:22] [PASSED] well_known_colors
[10:23:22] [PASSED] destination_pitch
[10:23:22] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:23:22] ================= drm_test_fb_clip_offset  =================
[10:23:22] [PASSED] pass through
[10:23:22] [PASSED] horizontal offset
[10:23:22] [PASSED] vertical offset
[10:23:22] [PASSED] horizontal and vertical offset
[10:23:22] [PASSED] horizontal offset (custom pitch)
[10:23:22] [PASSED] vertical offset (custom pitch)
[10:23:22] [PASSED] horizontal and vertical offset (custom pitch)
[10:23:22] ============= [PASSED] drm_test_fb_clip_offset =============
[10:23:22] =================== drm_test_fb_memcpy  ====================
[10:23:22] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:23:22] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:23:22] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:23:22] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:23:22] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:23:22] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:23:22] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:23:22] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:23:22] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:23:22] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:23:22] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:23:22] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:23:22] =============== [PASSED] drm_test_fb_memcpy ================
[10:23:22] ============= [PASSED] drm_format_helper_test ==============
[10:23:22] ================= drm_format (18 subtests) =================
[10:23:22] [PASSED] drm_test_format_block_width_invalid
[10:23:22] [PASSED] drm_test_format_block_width_one_plane
[10:23:22] [PASSED] drm_test_format_block_width_two_plane
[10:23:22] [PASSED] drm_test_format_block_width_three_plane
[10:23:22] [PASSED] drm_test_format_block_width_tiled
[10:23:22] [PASSED] drm_test_format_block_height_invalid
[10:23:22] [PASSED] drm_test_format_block_height_one_plane
[10:23:22] [PASSED] drm_test_format_block_height_two_plane
[10:23:22] [PASSED] drm_test_format_block_height_three_plane
[10:23:22] [PASSED] drm_test_format_block_height_tiled
[10:23:22] [PASSED] drm_test_format_min_pitch_invalid
[10:23:22] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:23:22] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:23:22] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:23:22] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:23:22] [PASSED] drm_test_format_min_pitch_two_plane
[10:23:22] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:23:22] [PASSED] drm_test_format_min_pitch_tiled
[10:23:22] =================== [PASSED] drm_format ====================
[10:23:22] ============== drm_framebuffer (10 subtests) ===============
[10:23:22] ========== drm_test_framebuffer_check_src_coords  ==========
[10:23:22] [PASSED] Success: source fits into fb
[10:23:22] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:23:22] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:23:22] [PASSED] Fail: overflowing fb with source width
[10:23:22] [PASSED] Fail: overflowing fb with source height
[10:23:22] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:23:22] [PASSED] drm_test_framebuffer_cleanup
[10:23:22] =============== drm_test_framebuffer_create  ===============
[10:23:22] [PASSED] ABGR8888 normal sizes
[10:23:22] [PASSED] ABGR8888 max sizes
[10:23:22] [PASSED] ABGR8888 pitch greater than min required
[10:23:22] [PASSED] ABGR8888 pitch less than min required
[10:23:22] [PASSED] ABGR8888 Invalid width
[10:23:22] [PASSED] ABGR8888 Invalid buffer handle
[10:23:22] [PASSED] No pixel format
[10:23:22] [PASSED] ABGR8888 Width 0
[10:23:22] [PASSED] ABGR8888 Height 0
[10:23:22] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:23:22] [PASSED] ABGR8888 Large buffer offset
[10:23:22] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:23:22] [PASSED] ABGR8888 Invalid flag
[10:23:22] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:23:22] [PASSED] ABGR8888 Valid buffer modifier
[10:23:22] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:23:22] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] NV12 Normal sizes
[10:23:22] [PASSED] NV12 Max sizes
[10:23:22] [PASSED] NV12 Invalid pitch
[10:23:22] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:23:22] [PASSED] NV12 different  modifier per-plane
[10:23:22] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:23:22] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] NV12 Modifier for inexistent plane
[10:23:22] [PASSED] NV12 Handle for inexistent plane
[10:23:22] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:23:22] [PASSED] YVU420 Normal sizes
[10:23:22] [PASSED] YVU420 Max sizes
[10:23:22] [PASSED] YVU420 Invalid pitch
[10:23:22] [PASSED] YVU420 Different pitches
[10:23:22] [PASSED] YVU420 Different buffer offsets/pitches
[10:23:22] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:23:22] [PASSED] YVU420 Valid modifier
[10:23:22] [PASSED] YVU420 Different modifiers per plane
[10:23:22] [PASSED] YVU420 Modifier for inexistent plane
[10:23:22] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:23:22] [PASSED] X0L2 Normal sizes
[10:23:22] [PASSED] X0L2 Max sizes
[10:23:22] [PASSED] X0L2 Invalid pitch
[10:23:22] [PASSED] X0L2 Pitch greater than minimum required
[10:23:22] [PASSED] X0L2 Handle for inexistent plane
[10:23:22] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:23:22] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:23:22] [PASSED] X0L2 Valid modifier
[10:23:22] [PASSED] X0L2 Modifier for inexistent plane
[10:23:22] =========== [PASSED] drm_test_framebuffer_create ===========
[10:23:22] [PASSED] drm_test_framebuffer_free
[10:23:22] [PASSED] drm_test_framebuffer_init
[10:23:22] [PASSED] drm_test_framebuffer_init_bad_format
[10:23:22] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:23:22] [PASSED] drm_test_framebuffer_lookup
[10:23:22] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:23:22] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:23:22] ================= [PASSED] drm_framebuffer =================
[10:23:22] ================ drm_gem_shmem (8 subtests) ================
[10:23:22] [PASSED] drm_gem_shmem_test_obj_create
[10:23:22] [PASSED] drm_gem_shmem_test_obj_create_private
[10:23:22] [PASSED] drm_gem_shmem_test_pin_pages
[10:23:22] [PASSED] drm_gem_shmem_test_vmap
[10:23:22] [PASSED] drm_gem_shmem_test_get_sg_table
[10:23:22] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:23:22] [PASSED] drm_gem_shmem_test_madvise
[10:23:22] [PASSED] drm_gem_shmem_test_purge
[10:23:22] ================== [PASSED] drm_gem_shmem ==================
[10:23:22] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:23:22] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:23:22] [PASSED] Automatic
[10:23:22] [PASSED] Full
[10:23:22] [PASSED] Limited 16:235
[10:23:22] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:23:22] [PASSED] drm_test_check_disable_connector
[10:23:22] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:23:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:23:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:23:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:23:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:23:22] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:23:22] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:23:22] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:23:22] [PASSED] drm_test_check_output_bpc_dvi
[10:23:22] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:23:22] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:23:22] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:23:22] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:23:22] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:23:22] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:23:22] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:23:22] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:23:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:23:22] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:23:22] [PASSED] drm_test_check_broadcast_rgb_value
[10:23:22] [PASSED] drm_test_check_bpc_8_value
[10:23:22] [PASSED] drm_test_check_bpc_10_value
[10:23:22] [PASSED] drm_test_check_bpc_12_value
[10:23:22] [PASSED] drm_test_check_format_value
[10:23:22] [PASSED] drm_test_check_tmds_char_value
[10:23:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:23:22] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:23:22] [PASSED] drm_test_check_mode_valid
[10:23:22] [PASSED] drm_test_check_mode_valid_reject
[10:23:22] [PASSED] drm_test_check_mode_valid_reject_rate
[10:23:22] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:23:22] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:23:22] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:23:22] [PASSED] drm_test_check_infoframes
[10:23:22] [PASSED] drm_test_check_reject_avi_infoframe
[10:23:22] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:23:22] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:23:22] [PASSED] drm_test_check_reject_audio_infoframe
[10:23:22] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:23:22] ================= drm_managed (2 subtests) =================
[10:23:22] [PASSED] drm_test_managed_release_action
[10:23:22] [PASSED] drm_test_managed_run_action
[10:23:22] =================== [PASSED] drm_managed ===================
[10:23:22] =================== drm_mm (6 subtests) ====================
[10:23:22] [PASSED] drm_test_mm_init
[10:23:22] [PASSED] drm_test_mm_debug
[10:23:22] [PASSED] drm_test_mm_align32
[10:23:22] [PASSED] drm_test_mm_align64
[10:23:22] [PASSED] drm_test_mm_lowest
[10:23:22] [PASSED] drm_test_mm_highest
[10:23:22] ===================== [PASSED] drm_mm ======================
[10:23:22] ============= drm_modes_analog_tv (5 subtests) =============
[10:23:22] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:23:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:23:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:23:22] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:23:22] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:23:22] =============== [PASSED] drm_modes_analog_tv ===============
[10:23:22] ============== drm_plane_helper (2 subtests) ===============
[10:23:22] =============== drm_test_check_plane_state  ================
[10:23:22] [PASSED] clipping_simple
[10:23:22] [PASSED] clipping_rotate_reflect
[10:23:22] [PASSED] positioning_simple
[10:23:22] [PASSED] upscaling
[10:23:22] [PASSED] downscaling
[10:23:22] [PASSED] rounding1
[10:23:22] [PASSED] rounding2
[10:23:22] [PASSED] rounding3
[10:23:22] [PASSED] rounding4
[10:23:22] =========== [PASSED] drm_test_check_plane_state ============
[10:23:22] =========== drm_test_check_invalid_plane_state  ============
[10:23:22] [PASSED] positioning_invalid
[10:23:22] [PASSED] upscaling_invalid
[10:23:22] [PASSED] downscaling_invalid
[10:23:22] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:23:22] ================ [PASSED] drm_plane_helper =================
[10:23:22] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:23:22] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:23:22] [PASSED] None
[10:23:22] [PASSED] PAL
[10:23:22] [PASSED] NTSC
[10:23:22] [PASSED] Both, NTSC Default
[10:23:22] [PASSED] Both, PAL Default
[10:23:22] [PASSED] Both, NTSC Default, with PAL on command-line
[10:23:22] [PASSED] Both, PAL Default, with NTSC on command-line
[10:23:22] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:23:22] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:23:22] ================== drm_rect (9 subtests) ===================
[10:23:22] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:23:22] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:23:22] [PASSED] drm_test_rect_clip_scaled_clipped
[10:23:22] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:23:22] ================= drm_test_rect_intersect  =================
[10:23:22] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:23:22] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:23:22] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:23:22] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:23:22] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:23:22] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:23:22] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:23:22] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:23:22] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:23:22] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:23:22] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:23:22] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:23:22] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:23:22] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:23:22] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:23:22] ============= [PASSED] drm_test_rect_intersect =============
[10:23:22] ================ drm_test_rect_calc_hscale  ================
[10:23:22] [PASSED] normal use
[10:23:22] [PASSED] out of max range
[10:23:22] [PASSED] out of min range
[10:23:22] [PASSED] zero dst
[10:23:22] [PASSED] negative src
[10:23:22] [PASSED] negative dst
[10:23:22] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:23:22] ================ drm_test_rect_calc_vscale  ================
[10:23:22] [PASSED] normal use
[10:23:22] [PASSED] out of max range
[10:23:22] [PASSED] out of min range
[10:23:22] [PASSED] zero dst
[10:23:22] [PASSED] negative src
[10:23:22] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:23:22] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:23:22] ================== drm_test_rect_rotate  ===================
[10:23:22] [PASSED] reflect-x
[10:23:22] [PASSED] reflect-y
[10:23:22] [PASSED] rotate-0
[10:23:22] [PASSED] rotate-90
[10:23:22] [PASSED] rotate-180
[10:23:22] [PASSED] rotate-270
[10:23:22] ============== [PASSED] drm_test_rect_rotate ===============
[10:23:22] ================ drm_test_rect_rotate_inv  =================
[10:23:22] [PASSED] reflect-x
[10:23:22] [PASSED] reflect-y
[10:23:22] [PASSED] rotate-0
[10:23:22] [PASSED] rotate-90
[10:23:22] [PASSED] rotate-180
[10:23:22] [PASSED] rotate-270
[10:23:22] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:23:22] ==================== [PASSED] drm_rect =====================
[10:23:22] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:23:22] ============ drm_test_sysfb_build_fourcc_list  =============
[10:23:22] [PASSED] no native formats
[10:23:22] [PASSED] XRGB8888 as native format
[10:23:22] [PASSED] remove duplicates
[10:23:22] [PASSED] convert alpha formats
[10:23:22] [PASSED] random formats
[10:23:22] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:23:22] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:23:22] ================== drm_fixp (2 subtests) ===================
[10:23:22] [PASSED] drm_test_int2fixp
[10:23:22] [PASSED] drm_test_sm2fixp
[10:23:22] ==================== [PASSED] drm_fixp =====================
[10:23:22] ============================================================
[10:23:22] Testing complete. Ran 621 tests: passed: 621
[10:23:22] Elapsed time: 25.861s total, 1.659s configuring, 24.032s building, 0.130s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[10:23:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:23:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:23:33] Starting KUnit Kernel (1/1)...
[10:23:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:23:33] ================= ttm_device (5 subtests) ==================
[10:23:33] [PASSED] ttm_device_init_basic
[10:23:33] [PASSED] ttm_device_init_multiple
[10:23:33] [PASSED] ttm_device_fini_basic
[10:23:33] [PASSED] ttm_device_init_no_vma_man
[10:23:33] ================== ttm_device_init_pools  ==================
[10:23:33] [PASSED] No DMA allocations, no DMA32 required
[10:23:33] # ttm_device_init_pools: ASSERTION FAILED at drivers/gpu/drm/ttm/tests/ttm_device_test.c:178
[10:23:33] Expected !list_lru_count(&pt.pages) to be false, but is true
[10:23:33] [FAILED] DMA allocations, DMA32 required
[10:23:33] [PASSED] No DMA allocations, DMA32 required
[10:23:33]     # ttm_device_init_pools: ASSERTION FAILED at drivers/gpu/drm/ttm/tests/ttm_device_test.c:178
[10:23:33]     Expected !list_lru_count(&pt.pages) to be false, but is true
[10:23:33] ------------[ cut here ]------------
[10:23:33] WARNING: lib/refcount.c:28 at devres_release_all+0xaa/0x100, CPU#0: kunit_try_catch/46
[10:23:33] refcount_t: underflow; use-after-free.
[10:23:33] CPU: 0 UID: 0 PID: 46 Comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g221d0418dcfd #3 VOLUNTARY
[10:23:33] Tainted: [W]=WARN, [N]=TEST
[10:23:33] Stack:
[10:23:33]  6044ed8b 00000000 00000000 00000001
[10:23:33]  ffffff00 6044ed8b 6032367a 00000009
[10:23:33]  0000001c 60043e88 6002381c a88cbd40
[10:23:33] Call Trace:
[10:23:33]  [<6032367a>] ? devres_release_all+0xaa/0x100
[10:23:33]  [<60043e88>] ? dump_stack_lvl+0x5e/0x7a
[10:23:33]  [<6002381c>] ? _printk+0x0/0x65
[10:23:33]  [<6001f09f>] ? __warn.cold+0x79/0x11f
[10:23:33]  [<6001f1d9>] ? warn_slowpath_fmt+0x94/0xa1
[10:23:33]  [<601ef1a0>] ? kernfs_free_rcu+0x0/0x70
[10:23:33]  [<60052e36>] ? um_set_signals+0x36/0x60
[10:23:33]  [<600c5a42>] ? call_rcu+0x52/0x90
[10:23:33]  [<6001f145>] ? warn_slowpath_fmt+0x0/0xa1
[10:23:33]  [<60147f50>] ? kfree+0x0/0x250
[10:23:33]  [<6032367a>] ? devres_release_all+0xaa/0x100
[10:23:33]  [<60396bb0>] ? mutex_unlock+0x0/0x30
[10:23:33]  [<6031c3c0>] ? bus_notify+0x0/0x60
[10:23:33]  [<60396bb0>] ? mutex_unlock+0x0/0x30
[10:23:33]  [<60398620>] ? mutex_lock+0x0/0x40
[10:23:33]  [<6031ca24>] ? device_unbind_cleanup+0x14/0xb0
[10:23:33]  [<6031e1f6>] ? device_release_driver_internal+0x256/0x2b0
[10:23:33]  [<60372210>] ? kobject_put+0x0/0x150
[10:23:33]  [<601f3d40>] ? sysfs_remove_file_ns+0x0/0x20
[10:23:33]  [<6031c00f>] ? bus_remove_device+0x10f/0x1a0
[10:23:33]  [<601f3d40>] ? sysfs_remove_file_ns+0x0/0x20
[10:23:33]  [<601f17b8>] ? kernfs_remove_by_name_ns+0x98/0x130
[10:23:33]  [<60315a8c>] ? device_del+0x1bc/0x600
[10:23:33]  [<60052e00>] ? um_set_signals+0x0/0x60
[10:23:33]  [<6025b2a0>] ? device_unregister_wrapper+0x0/0x10
[10:23:33]  [<60052e00>] ? um_set_signals+0x0/0x60
[10:23:33]  [<60315ee4>] ? device_unregister+0x14/0x40
[10:23:33]  [<60257e66>] ? kunit_release_action+0xf6/0x170
[10:23:33]  [<60257d70>] ? kunit_release_action+0x0/0x170
[10:23:33]  [<6025b2e2>] ? kunit_device_unregister+0x32/0x80
[10:23:33]  [<60259890>] ? kunit_generic_run_threadfn_adapter+0x0/0x30
[10:23:33]  [<6025748e>] ? kunit_try_run_case_cleanup+0x2e/0x40
[10:23:33]  [<602598a6>] ? kunit_generic_run_threadfn_adapter+0x16/0x30
[10:23:33]  [<60081e36>] ? kthread+0xe6/0x150
[10:23:33]  [<60046435>] ? new_thread_handler+0x45/0x60
[10:23:33] ---[ end trace 0000000000000000 ]---
[10:23:33] [FAILED] DMA allocations, no DMA32 required
[10:23:33] # ttm_device_init_pools: pass:2 fail:2 skip:0 total:4
[10:23:33] ============== [FAILED] ttm_device_init_pools ==============
[10:23:33]     # module: ttm_device_test
[10:23:33] # ttm_device: pass:4 fail:1 skip:0 total:5
[10:23:33] # Totals: pass:6 fail:2 skip:0 total:8
[10:23:33] =================== [FAILED] ttm_device ====================
[10:23:33] ================== ttm_pool (8 subtests) ===================
[10:23:33] ================== ttm_pool_alloc_basic  ===================
[10:23:33] [PASSED] One page
[10:23:33] [PASSED] More than one page
[10:23:33] [PASSED] Above the allocation limit
[10:23:33] [PASSED] One page, with coherent DMA mappings enabled
[10:23:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:23:33] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:23:33] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:23:33] [PASSED] One page
[10:23:33] [PASSED] More than one page
[10:23:33] [PASSED] Above the allocation limit
[10:23:33] [PASSED] One page, with coherent DMA mappings enabled
[10:23:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:23:33] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:23:33] [PASSED] ttm_pool_alloc_order_caching_match
[10:23:33] [PASSED] ttm_pool_alloc_caching_mismatch
[10:23:33] [PASSED] ttm_pool_alloc_order_mismatch
[10:23:33] [PASSED] ttm_pool_free_dma_alloc
[10:23:33] [ERROR] Test: ttm_pool: missing expected subtest!
[10:23:33] 
[10:23:33] Pid: 75, comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g221d0418dcfd
[10:23:33] RIP: 0033:list_lru_count_node+0xe/0x20
[10:23:33] RSP: 00000000a88cbed8  EFLAGS: 00010246
[10:23:33] RAX: 0000000000000000 RBX: 00000000a8803c90 RCX: 0000000068e4c7d8
[10:23:33] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000068c86880
[10:23:33] RBP: 0000000068c86800 R08: 00000000a7658c28 R09: 0000000068c50c80
[10:23:33] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000068c50c80
[10:23:33] R13: 0000000060440770 R14: 000000006010eb50 R15: 0000000068c86880
[10:23:33] Kernel panic - not syncing: Segfault with no mm
[10:23:33] [CRASHED] 
[10:23:33] [ERROR] Test: ttm_pool: missing expected subtest!
[10:23:33] [CRASHED] 
[10:23:33] [ERROR] Test: ttm_pool: missing subtest result line!
[10:23:33] # module: ttm_pool_test
[10:23:33] ==================== [CRASHED] ttm_pool ====================
[10:23:33] [ERROR] Test: main: missing expected subtest!
[10:23:33] [CRASHED] 
[10:23:33] [ERROR] Test: main: missing expected subtest!
[10:23:33] [CRASHED] 
[10:23:33] [ERROR] Test: main: missing expected subtest!
[10:23:33] [CRASHED] 
[10:23:33] [ERROR] Test: main: missing expected subtest!
[10:23:33] [CRASHED] 
[10:23:33] ============================================================
[10:23:33] Testing complete. Ran 28 tests: passed: 20, failed: 2, crashed: 6, errors: 7
The kernel seems to have crashed; you can decode the stack traces with:
$ scripts/decode_stacktrace.sh .kunit/vmlinux .kunit < .kunit/test.log | tee .kunit/decoded.log | /kernel/tools/testing/kunit/kunit.py parse
[10:23:33] Elapsed time: 11.639s total, 1.718s configuring, 9.605s building, 0.317s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [PATCH v2 4/9] drm/i915/dp: Restructure the sink/output format selection
  2026-04-09 10:15 ` [PATCH v2 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
@ 2026-04-09 10:51   ` Nautiyal, Ankit K
  0 siblings, 0 replies; 18+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-09 10:51 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli


On 4/9/2026 3:45 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Restructure intel_dp_compute_output_format() to resemble the new
> intel_hdmi_compute_output_formats().
>
> Again, we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
>
> Take the exact same approach with the DP code, making the
> format selection much less convoluted.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
>   1 file changed, 69 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index b8b6d62fb275..ed5841f224ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1379,6 +1379,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>   	return MODE_OK;
>   }
>   
> +static enum drm_mode_status
> +intel_dp_sink_format_valid(struct intel_connector *connector,
> +			   const struct drm_display_mode *mode,
> +			   enum intel_output_format sink_format)
> +{
> +	const struct drm_display_info *info = &connector->base.display_info;
> +
> +	switch (sink_format) {
> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> +		if (!connector->base.ycbcr_420_allowed ||
> +		    !drm_mode_is_420(info, mode))
> +			return MODE_NO_420;
> +
> +		return MODE_OK;
> +	case INTEL_OUTPUT_FORMAT_RGB:
> +		return MODE_OK;
> +	default:
> +		MISSING_CASE(sink_format);
> +		return MODE_BAD;
> +	}
> +}
> +
>   int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
>   {
>   	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> @@ -3338,41 +3360,59 @@ static int
>   intel_dp_compute_output_format(struct intel_encoder *encoder,
>   			       struct intel_crtc_state *crtc_state,
>   			       struct drm_connector_state *conn_state,
> -			       bool respect_downstream_limits)
> +			       bool respect_downstream_limits,
> +			       enum intel_output_format sink_format)
>   {
> -	struct intel_display *display = to_intel_display(encoder);
>   	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>   	struct intel_connector *connector = intel_dp->attached_connector;
> -	const struct drm_display_info *info = &connector->base.display_info;
>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> -	bool ycbcr_420_only;
> -	int ret;
>   
> -	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> -
> -	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> -		drm_dbg_kms(display->drm,
> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> -	} else {
> -		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> -	}
> +	if (intel_dp_sink_format_valid(connector, adjusted_mode,
> +				       sink_format) != MODE_OK)
> +		return -EINVAL;
>   
> +	crtc_state->sink_format = sink_format;
>   	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
>   
> -	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> -					   respect_downstream_limits);
> -	if (ret) {
> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(info, adjusted_mode))
> -			return ret;
> -
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -		crtc_state->output_format = intel_dp_output_format(connector,
> -								   crtc_state->sink_format);
> -		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> -						   respect_downstream_limits);
> +	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> +					    respect_downstream_limits);
> +}
> +
> +static int
> +intel_dp_compute_formats(struct intel_encoder *encoder,
> +			 struct intel_crtc_state *crtc_state,
> +			 struct drm_connector_state *conn_state,
> +			 bool respect_downstream_limits)
> +{
> +	struct intel_display *display = to_intel_display(encoder);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> +	int ret;
> +
> +	if (drm_mode_is_420_only(info, adjusted_mode)) {
> +		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +						     respect_downstream_limits,
> +						     INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> +		if (ret) {
> +			drm_dbg_kms(display->drm,
> +				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> +			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +							     respect_downstream_limits,
> +							     INTEL_OUTPUT_FORMAT_RGB);
> +		}
> +	} else {
> +		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +						     respect_downstream_limits,
> +						     INTEL_OUTPUT_FORMAT_RGB);
> +
> +		if (ret && drm_mode_is_420_also(info, adjusted_mode))
> +			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +							     respect_downstream_limits,
> +							     INTEL_OUTPUT_FORMAT_YCBCR420);
>   	}
>   
>   	return ret;
> @@ -3547,9 +3587,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>   	 * Try to respect downstream TMDS clock limits first, if
>   	 * that fails assume the user might know something we don't.
>   	 */
> -	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
> +	ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
>   	if (ret)
> -		ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
> +		ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
>   	if (ret)
>   		return ret;
>   

^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [PATCH v2 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice
  2026-04-09 10:15 ` [PATCH v2 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
@ 2026-04-09 10:58   ` Nautiyal, Ankit K
  0 siblings, 0 replies; 18+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-09 10:58 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli


On 4/9/2026 3:45 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we only validate "4:2:0 also" modes as RGB. But
> if that fails we could perhaps still use the mode in with
> 4:2:0 output. All we have to do is retry the validation with
> the different sink format.
>
> So far we did the double validation only so far as it affects
> PCON TMDS clock limits. But validating everything twice seems
> a bit more sane.
>
> Note that intel_dp_output_format() might still end up picking
> RGB for the actual output format (and letting PCON deal with
> the YCbCr conversion). So I suppose we could still fail the
> validation due to that, and forcing even the output format
> to 4:2:0 might solve it on a third try. But we'd need the
> same fallback logic in intel_dp_compute_config(). For now
> this seems sufficient.
>
> v2: Pass output_format to intel_dp_mode_min_link_bpp_x16()
>      Add TODO about remaining issues
>      Nuke intel_dp_sink_format()

Thanks, this addresses all the comments on v1.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 151 ++++++++++++------------
>   1 file changed, 78 insertions(+), 73 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ed5841f224ee..99672341f43e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1234,28 +1234,11 @@ int intel_dp_output_format_link_bpp_x16(enum intel_output_format output_format,
>   	return fxp_q4_from_int(pipe_bpp);
>   }
>   
> -static enum intel_output_format
> -intel_dp_sink_format(struct intel_connector *connector,
> -		     const struct drm_display_mode *mode)
> -{
> -	const struct drm_display_info *info = &connector->base.display_info;
> -
> -	if (drm_mode_is_420_only(info, mode))
> -		return INTEL_OUTPUT_FORMAT_YCBCR420;
> -
> -	return INTEL_OUTPUT_FORMAT_RGB;
> -}
> -
>   static int
>   intel_dp_mode_min_link_bpp_x16(struct intel_connector *connector,
> -			       const struct drm_display_mode *mode)
> +			       const struct drm_display_mode *mode,
> +			       enum intel_output_format output_format)
>   {
> -	enum intel_output_format output_format, sink_format;
> -
> -	sink_format = intel_dp_sink_format(connector, mode);
> -
> -	output_format = intel_dp_output_format(connector, sink_format);
> -
>   	return intel_dp_output_format_link_bpp_x16(output_format,
>   						   intel_dp_min_bpp(output_format));
>   }
> @@ -1329,14 +1312,10 @@ static int frl_required_bw(int clock, int bpc,
>   static enum drm_mode_status
>   intel_dp_mode_valid_downstream(struct intel_connector *connector,
>   			       const struct drm_display_mode *mode,
> -			       int target_clock)
> +			       int target_clock,
> +			       enum intel_output_format sink_format)
>   {
>   	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	const struct drm_display_info *info = &connector->base.display_info;
> -	enum drm_mode_status status;
> -	enum intel_output_format sink_format;
> -
> -	sink_format = intel_dp_sink_format(connector, mode);
>   
>   	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
>   	if (intel_dp->dfp.pcon_max_frl_bw) {
> @@ -1361,22 +1340,8 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>   		return MODE_CLOCK_HIGH;
>   
>   	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> -	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> -					   8, sink_format, true);
> -
> -	if (status != MODE_OK) {
> -		if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(info, mode))
> -			return status;
> -		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> -						   8, sink_format, true);
> -		if (status != MODE_OK)
> -			return status;
> -	}
> -
> -	return MODE_OK;
> +	return intel_dp_tmds_clock_valid(intel_dp, target_clock,
> +					 8, sink_format, true);
>   }
>   
>   static enum drm_mode_status
> @@ -1472,15 +1437,14 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
>   }
>   
>   static enum drm_mode_status
> -intel_dp_mode_valid(struct drm_connector *_connector,
> -		    const struct drm_display_mode *mode)
> +intel_dp_mode_valid_format(struct intel_connector *connector,
> +			   const struct drm_display_mode *mode,
> +			   int target_clock,
> +			   enum intel_output_format sink_format)
>   {
> -	struct intel_display *display = to_intel_display(_connector->dev);
> -	struct intel_connector *connector = to_intel_connector(_connector);
> +	struct intel_display *display = to_intel_display(connector);
>   	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	enum intel_output_format sink_format, output_format;
> -	const struct drm_display_mode *fixed_mode;
> -	int target_clock = mode->clock;
> +	enum intel_output_format output_format;
>   	int max_rate, mode_rate, max_lanes, max_link_clock;
>   	u16 dsc_max_compressed_bpp = 0;
>   	enum drm_mode_status status;
> @@ -1488,29 +1452,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>   	int num_joined_pipes;
>   	int link_bpp_x16;
>   
> -	status = intel_cpu_transcoder_mode_valid(display, mode);
> -	if (status != MODE_OK)
> -		return status;
> -
> -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> -		return MODE_H_ILLEGAL;
> -
> -	if (mode->clock < 10000)
> -		return MODE_CLOCK_LOW;
> -
> -	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
> -		return MODE_H_ILLEGAL;
> -
> -	fixed_mode = intel_panel_fixed_mode(connector, mode);
> -	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> -		status = intel_panel_mode_valid(connector, mode);
> -		if (status != MODE_OK)
> -			return status;
> -
> -		target_clock = fixed_mode->clock;
> -	}
> -
> -	sink_format = intel_dp_sink_format(connector, mode);
>   	output_format = intel_dp_output_format(connector, sink_format);
>   
>   	max_link_clock = intel_dp_max_link_rate(intel_dp);
> @@ -1518,7 +1459,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>   
>   	max_rate = intel_dp_max_link_data_rate(intel_dp, max_link_clock, max_lanes);
>   
> -	link_bpp_x16 = intel_dp_mode_min_link_bpp_x16(connector, mode);
> +	link_bpp_x16 = intel_dp_mode_min_link_bpp_x16(connector, mode,
> +						      output_format);
>   	mode_rate = intel_dp_link_required(max_link_clock, max_lanes,
>   					   target_clock, mode->hdisplay,
>   					   link_bpp_x16, 0);
> @@ -1608,7 +1550,70 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>   	if (status != MODE_OK)
>   		return status;
>   
> -	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
> +	return intel_dp_mode_valid_downstream(connector, mode,
> +					      target_clock, sink_format);
> +}
> +
> +static enum drm_mode_status
> +intel_dp_mode_valid(struct drm_connector *_connector,
> +		    const struct drm_display_mode *mode)
> +{
> +	struct intel_display *display = to_intel_display(_connector->dev);
> +	struct intel_connector *connector = to_intel_connector(_connector);
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	const struct drm_display_mode *fixed_mode;
> +	int target_clock = mode->clock;
> +	enum drm_mode_status status;
> +
> +	status = intel_cpu_transcoder_mode_valid(display, mode);
> +	if (status != MODE_OK)
> +		return status;
> +
> +	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> +		return MODE_H_ILLEGAL;
> +
> +	if (mode->clock < 10000)
> +		return MODE_CLOCK_LOW;
> +
> +	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
> +		return MODE_H_ILLEGAL;
> +
> +	fixed_mode = intel_panel_fixed_mode(connector, mode);
> +	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> +		status = intel_panel_mode_valid(connector, mode);
> +		if (status != MODE_OK)
> +			return status;
> +
> +		target_clock = fixed_mode->clock;
> +	}
> +
> +	/*
> +	 * TODO: Even when using a 4:2:0 sink_format intel_dp_output_format()
> +	 * will always choose a 4:4:4 output_format if the DFP can do the
> +	 * 4:4:4->4:2:0 conversion for us. Thus a mode may still be rejected
> +	 * if we only have enough DP link bandwidth for 4:2:0 but not for
> +	 * 4:4:4. Another attempt with an explicit 4:2:0 output_format might
> +	 * be needed here. intel_dp_compute_config() would need the same
> +	 * logic, or else the actual modeset would still fail.
> +	 *
> +	 * Also a lot of the checks only depend on output_format but not
> +	 * sink_format, so we are potentially doing redundant work by
> +	 * testing the same output_format for two different sink_formats.
> +	 */
> +	if (drm_mode_is_420_only(info, mode)) {
> +		status = intel_dp_mode_valid_format(connector, mode, target_clock,
> +						    INTEL_OUTPUT_FORMAT_YCBCR420);
> +	} else {
> +		status = intel_dp_mode_valid_format(connector, mode, target_clock,
> +						    INTEL_OUTPUT_FORMAT_RGB);
> +
> +		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
> +			status = intel_dp_mode_valid_format(connector, mode, target_clock,
> +							    INTEL_OUTPUT_FORMAT_YCBCR420);
> +	}
> +
> +	return status;
>   }
>   
>   bool intel_dp_source_supports_tps3(struct intel_display *display)

^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (9 preceding siblings ...)
  2026-04-09 10:23 ` ✗ CI.KUnit: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev2) Patchwork
@ 2026-04-09 15:40 ` Nicolas Frattaroli
  2026-04-10 10:07 ` ✗ CI.checkpatch: warning for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3) Patchwork
                   ` (3 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Nicolas Frattaroli @ 2026-04-09 15:40 UTC (permalink / raw)
  To: intel-gfx, Ville Syrjala; +Cc: intel-xe, Ankit Nautiyal

On Thursday, 9 April 2026 12:15:30 Central European Summer Time Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Restructure the DP/HDMI sink format handling. I got inspired to do this
> by https://lore.kernel.org/dri-devel/20260324-color-format-v11-8-605559af4fb4@collabora.com/
> 
> I envision that after this the aforementioned patch could just
> become something like this:
> 
> 1. s/intel_foo_compute_formats/intel_foo_compute_formats_auto/
> 2. Add a new intel_foo_compute_formats()
> 
>    intel_foo_compute_formats()
>    {
>         switch (color_format) {
>         case YCBCR420:
>                 return intel_foo_compute_output_format(YCBCR420);
>         case RGB:
>                 return intel_foo_compute_output_format(RGB);
>         case AUTO:
>                 return intel_foo_compute_formats_auto();
>         }
>    }
> 
> v2: A few more updates to the DP mode validation
> 
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> 
> Ville Syrjälä (9):
>   drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also
>     modes
>   drm/i915/hdmi: Restructure the sink/output format selection
>   drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
>   drm/i915/dp: Restructure the sink/output format selection
>   drm/i915/dp: Validate "4:2:0 also" modes twice
>   drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
>   drm/i915/dp: Validate sink format in .mode_valid()
>   drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last
>     resort
>   drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last
>     resort
> 
>  drivers/gpu/drm/i915/display/intel_dp.c   | 250 +++++++++++++---------
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 167 +++++++++------
>  2 files changed, 254 insertions(+), 163 deletions(-)
> 
> 

For the whole series:

Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Tested both DisplayPort and HDMI on an N97 board, exercising various
output formats.



^ permalink raw reply	[flat|nested] 18+ messages in thread

* ✗ CI.checkpatch: warning for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (10 preceding siblings ...)
  2026-04-09 15:40 ` [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Nicolas Frattaroli
@ 2026-04-10 10:07 ` Patchwork
  2026-04-10 10:08 ` ✓ CI.KUnit: success " Patchwork
                   ` (2 subsequent siblings)
  14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-04-10 10:07 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-xe

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
URL   : https://patchwork.freedesktop.org/series/164123/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit c74b7e436b44da664d8d6351b5d84585d3efefa1
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Thu Apr 9 13:15:39 2026 +0300

    drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort
    
    Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
    already during the first pass when respect_downstream_limits==true.
    It seems better to try everything else first (like ignoring TMDS
    clock limits) while still preferring 4:2:0, and only if everything
    else has failed fall back to RGB.
    
    Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
    Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch 645a9910880f44919269478accf620dd33cb2656 drm-intel
42680d92d5d6 drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes
cf23c05e87af drm/i915/hdmi: Restructure the sink/output format selection
4612271e25d6 drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
410ff498f616 drm/i915/dp: Restructure the sink/output format selection
d3151258cacc drm/i915/dp: Validate "4:2:0 also" modes twice
-:33: WARNING:BAD_SIGN_OFF: Duplicate signature
#33: 
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

total: 0 errors, 1 warnings, 0 checks, 200 lines checked
a51576859e78 drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
d3337a1718ae drm/i915/dp: Validate sink format in .mode_valid()
2354316199ca drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort
c74b7e436b44 drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort



^ permalink raw reply	[flat|nested] 18+ messages in thread

* ✓ CI.KUnit: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (11 preceding siblings ...)
  2026-04-10 10:07 ` ✗ CI.checkpatch: warning for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3) Patchwork
@ 2026-04-10 10:08 ` Patchwork
  2026-04-10 10:53 ` ✓ Xe.CI.BAT: " Patchwork
  2026-04-10 17:42 ` ✗ Xe.CI.FULL: failure " Patchwork
  14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-04-10 10:08 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-xe

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
URL   : https://patchwork.freedesktop.org/series/164123/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:07:01] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:07:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:07:37] Starting KUnit Kernel (1/1)...
[10:07:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:07:37] ================== guc_buf (11 subtests) ===================
[10:07:37] [PASSED] test_smallest
[10:07:37] [PASSED] test_largest
[10:07:37] [PASSED] test_granular
[10:07:37] [PASSED] test_unique
[10:07:37] [PASSED] test_overlap
[10:07:37] [PASSED] test_reusable
[10:07:37] [PASSED] test_too_big
[10:07:37] [PASSED] test_flush
[10:07:37] [PASSED] test_lookup
[10:07:37] [PASSED] test_data
[10:07:37] [PASSED] test_class
[10:07:37] ===================== [PASSED] guc_buf =====================
[10:07:37] =================== guc_dbm (7 subtests) ===================
[10:07:37] [PASSED] test_empty
[10:07:37] [PASSED] test_default
[10:07:37] ======================== test_size  ========================
[10:07:37] [PASSED] 4
[10:07:37] [PASSED] 8
[10:07:37] [PASSED] 32
[10:07:37] [PASSED] 256
[10:07:37] ==================== [PASSED] test_size ====================
[10:07:37] ======================= test_reuse  ========================
[10:07:37] [PASSED] 4
[10:07:37] [PASSED] 8
[10:07:37] [PASSED] 32
[10:07:37] [PASSED] 256
[10:07:37] =================== [PASSED] test_reuse ====================
[10:07:37] =================== test_range_overlap  ====================
[10:07:37] [PASSED] 4
[10:07:37] [PASSED] 8
[10:07:37] [PASSED] 32
[10:07:37] [PASSED] 256
[10:07:37] =============== [PASSED] test_range_overlap ================
[10:07:37] =================== test_range_compact  ====================
[10:07:37] [PASSED] 4
[10:07:37] [PASSED] 8
[10:07:37] [PASSED] 32
[10:07:37] [PASSED] 256
[10:07:37] =============== [PASSED] test_range_compact ================
[10:07:37] ==================== test_range_spare  =====================
[10:07:37] [PASSED] 4
[10:07:37] [PASSED] 8
[10:07:37] [PASSED] 32
[10:07:37] [PASSED] 256
[10:07:37] ================ [PASSED] test_range_spare =================
[10:07:37] ===================== [PASSED] guc_dbm =====================
[10:07:37] =================== guc_idm (6 subtests) ===================
[10:07:37] [PASSED] bad_init
[10:07:37] [PASSED] no_init
[10:07:37] [PASSED] init_fini
[10:07:37] [PASSED] check_used
[10:07:37] [PASSED] check_quota
[10:07:37] [PASSED] check_all
[10:07:37] ===================== [PASSED] guc_idm =====================
[10:07:37] ================== no_relay (3 subtests) ===================
[10:07:37] [PASSED] xe_drops_guc2pf_if_not_ready
[10:07:37] [PASSED] xe_drops_guc2vf_if_not_ready
[10:07:37] [PASSED] xe_rejects_send_if_not_ready
[10:07:37] ==================== [PASSED] no_relay =====================
[10:07:37] ================== pf_relay (14 subtests) ==================
[10:07:37] [PASSED] pf_rejects_guc2pf_too_short
[10:07:37] [PASSED] pf_rejects_guc2pf_too_long
[10:07:37] [PASSED] pf_rejects_guc2pf_no_payload
[10:07:37] [PASSED] pf_fails_no_payload
[10:07:37] [PASSED] pf_fails_bad_origin
[10:07:37] [PASSED] pf_fails_bad_type
[10:07:37] [PASSED] pf_txn_reports_error
[10:07:37] [PASSED] pf_txn_sends_pf2guc
[10:07:37] [PASSED] pf_sends_pf2guc
[10:07:37] [SKIPPED] pf_loopback_nop
[10:07:37] [SKIPPED] pf_loopback_echo
[10:07:37] [SKIPPED] pf_loopback_fail
[10:07:37] [SKIPPED] pf_loopback_busy
[10:07:37] [SKIPPED] pf_loopback_retry
[10:07:37] ==================== [PASSED] pf_relay =====================
[10:07:37] ================== vf_relay (3 subtests) ===================
[10:07:37] [PASSED] vf_rejects_guc2vf_too_short
[10:07:37] [PASSED] vf_rejects_guc2vf_too_long
[10:07:37] [PASSED] vf_rejects_guc2vf_no_payload
[10:07:37] ==================== [PASSED] vf_relay =====================
[10:07:37] ================ pf_gt_config (9 subtests) =================
[10:07:37] [PASSED] fair_contexts_1vf
[10:07:37] [PASSED] fair_doorbells_1vf
[10:07:37] [PASSED] fair_ggtt_1vf
[10:07:37] ====================== fair_vram_1vf  ======================
[10:07:37] [PASSED] 3.50 GiB
[10:07:37] [PASSED] 11.5 GiB
[10:07:37] [PASSED] 15.5 GiB
[10:07:37] [PASSED] 31.5 GiB
[10:07:37] [PASSED] 63.5 GiB
[10:07:37] [PASSED] 1.91 GiB
[10:07:37] ================== [PASSED] fair_vram_1vf ==================
[10:07:37] ================ fair_vram_1vf_admin_only  =================
[10:07:37] [PASSED] 3.50 GiB
[10:07:37] [PASSED] 11.5 GiB
[10:07:37] [PASSED] 15.5 GiB
[10:07:37] [PASSED] 31.5 GiB
[10:07:37] [PASSED] 63.5 GiB
[10:07:37] [PASSED] 1.91 GiB
[10:07:37] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:07:37] ====================== fair_contexts  ======================
[10:07:37] [PASSED] 1 VF
[10:07:37] [PASSED] 2 VFs
[10:07:37] [PASSED] 3 VFs
[10:07:37] [PASSED] 4 VFs
[10:07:37] [PASSED] 5 VFs
[10:07:37] [PASSED] 6 VFs
[10:07:37] [PASSED] 7 VFs
[10:07:37] [PASSED] 8 VFs
[10:07:37] [PASSED] 9 VFs
[10:07:37] [PASSED] 10 VFs
[10:07:37] [PASSED] 11 VFs
[10:07:37] [PASSED] 12 VFs
[10:07:37] [PASSED] 13 VFs
[10:07:37] [PASSED] 14 VFs
[10:07:37] [PASSED] 15 VFs
[10:07:37] [PASSED] 16 VFs
[10:07:37] [PASSED] 17 VFs
[10:07:37] [PASSED] 18 VFs
[10:07:37] [PASSED] 19 VFs
[10:07:37] [PASSED] 20 VFs
[10:07:37] [PASSED] 21 VFs
[10:07:37] [PASSED] 22 VFs
[10:07:37] [PASSED] 23 VFs
[10:07:37] [PASSED] 24 VFs
[10:07:37] [PASSED] 25 VFs
[10:07:37] [PASSED] 26 VFs
[10:07:37] [PASSED] 27 VFs
[10:07:37] [PASSED] 28 VFs
[10:07:37] [PASSED] 29 VFs
[10:07:37] [PASSED] 30 VFs
[10:07:37] [PASSED] 31 VFs
[10:07:37] [PASSED] 32 VFs
[10:07:37] [PASSED] 33 VFs
[10:07:37] [PASSED] 34 VFs
[10:07:37] [PASSED] 35 VFs
[10:07:37] [PASSED] 36 VFs
[10:07:37] [PASSED] 37 VFs
[10:07:37] [PASSED] 38 VFs
[10:07:37] [PASSED] 39 VFs
[10:07:37] [PASSED] 40 VFs
[10:07:37] [PASSED] 41 VFs
[10:07:37] [PASSED] 42 VFs
[10:07:37] [PASSED] 43 VFs
[10:07:37] [PASSED] 44 VFs
[10:07:37] [PASSED] 45 VFs
[10:07:37] [PASSED] 46 VFs
[10:07:37] [PASSED] 47 VFs
[10:07:37] [PASSED] 48 VFs
[10:07:37] [PASSED] 49 VFs
[10:07:37] [PASSED] 50 VFs
[10:07:37] [PASSED] 51 VFs
[10:07:37] [PASSED] 52 VFs
[10:07:37] [PASSED] 53 VFs
[10:07:37] [PASSED] 54 VFs
[10:07:37] [PASSED] 55 VFs
[10:07:37] [PASSED] 56 VFs
[10:07:37] [PASSED] 57 VFs
[10:07:37] [PASSED] 58 VFs
[10:07:37] [PASSED] 59 VFs
[10:07:37] [PASSED] 60 VFs
[10:07:37] [PASSED] 61 VFs
[10:07:37] [PASSED] 62 VFs
[10:07:37] [PASSED] 63 VFs
[10:07:37] ================== [PASSED] fair_contexts ==================
[10:07:37] ===================== fair_doorbells  ======================
[10:07:37] [PASSED] 1 VF
[10:07:37] [PASSED] 2 VFs
[10:07:37] [PASSED] 3 VFs
[10:07:37] [PASSED] 4 VFs
[10:07:37] [PASSED] 5 VFs
[10:07:37] [PASSED] 6 VFs
[10:07:37] [PASSED] 7 VFs
[10:07:37] [PASSED] 8 VFs
[10:07:37] [PASSED] 9 VFs
[10:07:37] [PASSED] 10 VFs
[10:07:37] [PASSED] 11 VFs
[10:07:37] [PASSED] 12 VFs
[10:07:37] [PASSED] 13 VFs
[10:07:37] [PASSED] 14 VFs
[10:07:37] [PASSED] 15 VFs
[10:07:37] [PASSED] 16 VFs
[10:07:37] [PASSED] 17 VFs
[10:07:37] [PASSED] 18 VFs
[10:07:37] [PASSED] 19 VFs
[10:07:37] [PASSED] 20 VFs
[10:07:37] [PASSED] 21 VFs
[10:07:37] [PASSED] 22 VFs
[10:07:37] [PASSED] 23 VFs
[10:07:37] [PASSED] 24 VFs
[10:07:37] [PASSED] 25 VFs
[10:07:37] [PASSED] 26 VFs
[10:07:37] [PASSED] 27 VFs
[10:07:37] [PASSED] 28 VFs
[10:07:37] [PASSED] 29 VFs
[10:07:37] [PASSED] 30 VFs
[10:07:37] [PASSED] 31 VFs
[10:07:37] [PASSED] 32 VFs
[10:07:37] [PASSED] 33 VFs
[10:07:37] [PASSED] 34 VFs
[10:07:37] [PASSED] 35 VFs
[10:07:37] [PASSED] 36 VFs
[10:07:37] [PASSED] 37 VFs
[10:07:37] [PASSED] 38 VFs
[10:07:37] [PASSED] 39 VFs
[10:07:37] [PASSED] 40 VFs
[10:07:37] [PASSED] 41 VFs
[10:07:37] [PASSED] 42 VFs
[10:07:37] [PASSED] 43 VFs
[10:07:37] [PASSED] 44 VFs
[10:07:37] [PASSED] 45 VFs
[10:07:37] [PASSED] 46 VFs
[10:07:37] [PASSED] 47 VFs
[10:07:37] [PASSED] 48 VFs
[10:07:37] [PASSED] 49 VFs
[10:07:37] [PASSED] 50 VFs
[10:07:37] [PASSED] 51 VFs
[10:07:37] [PASSED] 52 VFs
[10:07:37] [PASSED] 53 VFs
[10:07:37] [PASSED] 54 VFs
[10:07:37] [PASSED] 55 VFs
[10:07:37] [PASSED] 56 VFs
[10:07:37] [PASSED] 57 VFs
[10:07:37] [PASSED] 58 VFs
[10:07:37] [PASSED] 59 VFs
[10:07:37] [PASSED] 60 VFs
[10:07:37] [PASSED] 61 VFs
[10:07:37] [PASSED] 62 VFs
[10:07:37] [PASSED] 63 VFs
[10:07:37] ================= [PASSED] fair_doorbells ==================
[10:07:37] ======================== fair_ggtt  ========================
[10:07:37] [PASSED] 1 VF
[10:07:37] [PASSED] 2 VFs
[10:07:37] [PASSED] 3 VFs
[10:07:37] [PASSED] 4 VFs
[10:07:37] [PASSED] 5 VFs
[10:07:37] [PASSED] 6 VFs
[10:07:37] [PASSED] 7 VFs
[10:07:37] [PASSED] 8 VFs
[10:07:37] [PASSED] 9 VFs
[10:07:37] [PASSED] 10 VFs
[10:07:37] [PASSED] 11 VFs
[10:07:37] [PASSED] 12 VFs
[10:07:37] [PASSED] 13 VFs
[10:07:37] [PASSED] 14 VFs
[10:07:37] [PASSED] 15 VFs
[10:07:37] [PASSED] 16 VFs
[10:07:37] [PASSED] 17 VFs
[10:07:37] [PASSED] 18 VFs
[10:07:37] [PASSED] 19 VFs
[10:07:37] [PASSED] 20 VFs
[10:07:37] [PASSED] 21 VFs
[10:07:37] [PASSED] 22 VFs
[10:07:37] [PASSED] 23 VFs
[10:07:37] [PASSED] 24 VFs
[10:07:37] [PASSED] 25 VFs
[10:07:37] [PASSED] 26 VFs
[10:07:37] [PASSED] 27 VFs
[10:07:37] [PASSED] 28 VFs
[10:07:37] [PASSED] 29 VFs
[10:07:37] [PASSED] 30 VFs
[10:07:37] [PASSED] 31 VFs
[10:07:37] [PASSED] 32 VFs
[10:07:37] [PASSED] 33 VFs
[10:07:37] [PASSED] 34 VFs
[10:07:37] [PASSED] 35 VFs
[10:07:37] [PASSED] 36 VFs
[10:07:37] [PASSED] 37 VFs
[10:07:37] [PASSED] 38 VFs
[10:07:37] [PASSED] 39 VFs
[10:07:37] [PASSED] 40 VFs
[10:07:37] [PASSED] 41 VFs
[10:07:37] [PASSED] 42 VFs
[10:07:37] [PASSED] 43 VFs
[10:07:37] [PASSED] 44 VFs
[10:07:37] [PASSED] 45 VFs
[10:07:37] [PASSED] 46 VFs
[10:07:37] [PASSED] 47 VFs
[10:07:37] [PASSED] 48 VFs
[10:07:37] [PASSED] 49 VFs
[10:07:37] [PASSED] 50 VFs
[10:07:37] [PASSED] 51 VFs
[10:07:37] [PASSED] 52 VFs
[10:07:37] [PASSED] 53 VFs
[10:07:37] [PASSED] 54 VFs
[10:07:37] [PASSED] 55 VFs
[10:07:37] [PASSED] 56 VFs
[10:07:37] [PASSED] 57 VFs
[10:07:37] [PASSED] 58 VFs
[10:07:37] [PASSED] 59 VFs
[10:07:37] [PASSED] 60 VFs
[10:07:37] [PASSED] 61 VFs
[10:07:37] [PASSED] 62 VFs
[10:07:37] [PASSED] 63 VFs
[10:07:37] ==================== [PASSED] fair_ggtt ====================
[10:07:37] ======================== fair_vram  ========================
[10:07:37] [PASSED] 1 VF
[10:07:37] [PASSED] 2 VFs
[10:07:37] [PASSED] 3 VFs
[10:07:37] [PASSED] 4 VFs
[10:07:37] [PASSED] 5 VFs
[10:07:37] [PASSED] 6 VFs
[10:07:37] [PASSED] 7 VFs
[10:07:37] [PASSED] 8 VFs
[10:07:37] [PASSED] 9 VFs
[10:07:37] [PASSED] 10 VFs
[10:07:37] [PASSED] 11 VFs
[10:07:37] [PASSED] 12 VFs
[10:07:37] [PASSED] 13 VFs
[10:07:37] [PASSED] 14 VFs
[10:07:37] [PASSED] 15 VFs
[10:07:37] [PASSED] 16 VFs
[10:07:37] [PASSED] 17 VFs
[10:07:37] [PASSED] 18 VFs
[10:07:37] [PASSED] 19 VFs
[10:07:37] [PASSED] 20 VFs
[10:07:37] [PASSED] 21 VFs
[10:07:37] [PASSED] 22 VFs
[10:07:37] [PASSED] 23 VFs
[10:07:37] [PASSED] 24 VFs
[10:07:37] [PASSED] 25 VFs
[10:07:37] [PASSED] 26 VFs
[10:07:37] [PASSED] 27 VFs
[10:07:37] [PASSED] 28 VFs
[10:07:37] [PASSED] 29 VFs
[10:07:37] [PASSED] 30 VFs
[10:07:37] [PASSED] 31 VFs
[10:07:37] [PASSED] 32 VFs
[10:07:37] [PASSED] 33 VFs
[10:07:37] [PASSED] 34 VFs
[10:07:37] [PASSED] 35 VFs
[10:07:37] [PASSED] 36 VFs
[10:07:37] [PASSED] 37 VFs
[10:07:37] [PASSED] 38 VFs
[10:07:37] [PASSED] 39 VFs
[10:07:37] [PASSED] 40 VFs
[10:07:37] [PASSED] 41 VFs
[10:07:37] [PASSED] 42 VFs
[10:07:37] [PASSED] 43 VFs
[10:07:37] [PASSED] 44 VFs
[10:07:37] [PASSED] 45 VFs
[10:07:37] [PASSED] 46 VFs
[10:07:37] [PASSED] 47 VFs
[10:07:37] [PASSED] 48 VFs
[10:07:37] [PASSED] 49 VFs
[10:07:37] [PASSED] 50 VFs
[10:07:37] [PASSED] 51 VFs
[10:07:37] [PASSED] 52 VFs
[10:07:37] [PASSED] 53 VFs
[10:07:37] [PASSED] 54 VFs
[10:07:37] [PASSED] 55 VFs
[10:07:37] [PASSED] 56 VFs
[10:07:37] [PASSED] 57 VFs
[10:07:37] [PASSED] 58 VFs
[10:07:37] [PASSED] 59 VFs
[10:07:37] [PASSED] 60 VFs
[10:07:37] [PASSED] 61 VFs
[10:07:37] [PASSED] 62 VFs
[10:07:37] [PASSED] 63 VFs
[10:07:37] ==================== [PASSED] fair_vram ====================
[10:07:37] ================== [PASSED] pf_gt_config ===================
[10:07:37] ===================== lmtt (1 subtest) =====================
[10:07:37] ======================== test_ops  =========================
[10:07:37] [PASSED] 2-level
[10:07:37] [PASSED] multi-level
[10:07:37] ==================== [PASSED] test_ops =====================
[10:07:37] ====================== [PASSED] lmtt =======================
[10:07:37] ================= pf_service (11 subtests) =================
[10:07:37] [PASSED] pf_negotiate_any
[10:07:37] [PASSED] pf_negotiate_base_match
[10:07:37] [PASSED] pf_negotiate_base_newer
[10:07:37] [PASSED] pf_negotiate_base_next
[10:07:37] [SKIPPED] pf_negotiate_base_older
[10:07:37] [PASSED] pf_negotiate_base_prev
[10:07:37] [PASSED] pf_negotiate_latest_match
[10:07:37] [PASSED] pf_negotiate_latest_newer
[10:07:37] [PASSED] pf_negotiate_latest_next
[10:07:37] [SKIPPED] pf_negotiate_latest_older
[10:07:37] [SKIPPED] pf_negotiate_latest_prev
[10:07:37] =================== [PASSED] pf_service ====================
[10:07:37] ================= xe_guc_g2g (2 subtests) ==================
[10:07:37] ============== xe_live_guc_g2g_kunit_default  ==============
[10:07:37] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:07:37] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:07:37] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:07:37] =================== [SKIPPED] xe_guc_g2g ===================
[10:07:37] =================== xe_mocs (2 subtests) ===================
[10:07:37] ================ xe_live_mocs_kernel_kunit  ================
[10:07:37] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:07:37] ================ xe_live_mocs_reset_kunit  =================
[10:07:37] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:07:37] ==================== [SKIPPED] xe_mocs =====================
[10:07:37] ================= xe_migrate (2 subtests) ==================
[10:07:37] ================= xe_migrate_sanity_kunit  =================
[10:07:37] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:07:37] ================== xe_validate_ccs_kunit  ==================
[10:07:37] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:07:37] =================== [SKIPPED] xe_migrate ===================
[10:07:37] ================== xe_dma_buf (1 subtest) ==================
[10:07:37] ==================== xe_dma_buf_kunit  =====================
[10:07:37] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:07:37] =================== [SKIPPED] xe_dma_buf ===================
[10:07:37] ================= xe_bo_shrink (1 subtest) =================
[10:07:37] =================== xe_bo_shrink_kunit  ====================
[10:07:37] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:07:37] ================== [SKIPPED] xe_bo_shrink ==================
[10:07:37] ==================== xe_bo (2 subtests) ====================
[10:07:37] ================== xe_ccs_migrate_kunit  ===================
[10:07:37] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:07:37] ==================== xe_bo_evict_kunit  ====================
[10:07:37] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:07:37] ===================== [SKIPPED] xe_bo ======================
[10:07:37] ==================== args (13 subtests) ====================
[10:07:37] [PASSED] count_args_test
[10:07:37] [PASSED] call_args_example
[10:07:37] [PASSED] call_args_test
[10:07:37] [PASSED] drop_first_arg_example
[10:07:37] [PASSED] drop_first_arg_test
[10:07:37] [PASSED] first_arg_example
[10:07:37] [PASSED] first_arg_test
[10:07:37] [PASSED] last_arg_example
[10:07:37] [PASSED] last_arg_test
[10:07:37] [PASSED] pick_arg_example
[10:07:37] [PASSED] if_args_example
[10:07:37] [PASSED] if_args_test
[10:07:37] [PASSED] sep_comma_example
[10:07:37] ====================== [PASSED] args =======================
[10:07:37] =================== xe_pci (3 subtests) ====================
[10:07:37] ==================== check_graphics_ip  ====================
[10:07:37] [PASSED] 12.00 Xe_LP
[10:07:37] [PASSED] 12.10 Xe_LP+
[10:07:37] [PASSED] 12.55 Xe_HPG
[10:07:37] [PASSED] 12.60 Xe_HPC
[10:07:37] [PASSED] 12.70 Xe_LPG
[10:07:37] [PASSED] 12.71 Xe_LPG
[10:07:37] [PASSED] 12.74 Xe_LPG+
[10:07:37] [PASSED] 20.01 Xe2_HPG
[10:07:37] [PASSED] 20.02 Xe2_HPG
[10:07:37] [PASSED] 20.04 Xe2_LPG
[10:07:37] [PASSED] 30.00 Xe3_LPG
[10:07:37] [PASSED] 30.01 Xe3_LPG
[10:07:37] [PASSED] 30.03 Xe3_LPG
[10:07:37] [PASSED] 30.04 Xe3_LPG
[10:07:37] [PASSED] 30.05 Xe3_LPG
[10:07:37] [PASSED] 35.10 Xe3p_LPG
[10:07:37] [PASSED] 35.11 Xe3p_XPC
[10:07:37] ================ [PASSED] check_graphics_ip ================
[10:07:37] ===================== check_media_ip  ======================
[10:07:37] [PASSED] 12.00 Xe_M
[10:07:37] [PASSED] 12.55 Xe_HPM
[10:07:37] [PASSED] 13.00 Xe_LPM+
[10:07:37] [PASSED] 13.01 Xe2_HPM
[10:07:37] [PASSED] 20.00 Xe2_LPM
[10:07:37] [PASSED] 30.00 Xe3_LPM
[10:07:37] [PASSED] 30.02 Xe3_LPM
[10:07:37] [PASSED] 35.00 Xe3p_LPM
[10:07:37] [PASSED] 35.03 Xe3p_HPM
[10:07:37] ================= [PASSED] check_media_ip ==================
[10:07:37] =================== check_platform_desc  ===================
[10:07:37] [PASSED] 0x9A60 (TIGERLAKE)
[10:07:37] [PASSED] 0x9A68 (TIGERLAKE)
[10:07:37] [PASSED] 0x9A70 (TIGERLAKE)
[10:07:37] [PASSED] 0x9A40 (TIGERLAKE)
[10:07:37] [PASSED] 0x9A49 (TIGERLAKE)
[10:07:37] [PASSED] 0x9A59 (TIGERLAKE)
[10:07:37] [PASSED] 0x9A78 (TIGERLAKE)
[10:07:37] [PASSED] 0x9AC0 (TIGERLAKE)
[10:07:37] [PASSED] 0x9AC9 (TIGERLAKE)
[10:07:37] [PASSED] 0x9AD9 (TIGERLAKE)
[10:07:37] [PASSED] 0x9AF8 (TIGERLAKE)
[10:07:37] [PASSED] 0x4C80 (ROCKETLAKE)
[10:07:37] [PASSED] 0x4C8A (ROCKETLAKE)
[10:07:37] [PASSED] 0x4C8B (ROCKETLAKE)
[10:07:37] [PASSED] 0x4C8C (ROCKETLAKE)
[10:07:37] [PASSED] 0x4C90 (ROCKETLAKE)
[10:07:37] [PASSED] 0x4C9A (ROCKETLAKE)
[10:07:37] [PASSED] 0x4680 (ALDERLAKE_S)
[10:07:37] [PASSED] 0x4682 (ALDERLAKE_S)
[10:07:37] [PASSED] 0x4688 (ALDERLAKE_S)
[10:07:37] [PASSED] 0x468A (ALDERLAKE_S)
[10:07:37] [PASSED] 0x468B (ALDERLAKE_S)
[10:07:37] [PASSED] 0x4690 (ALDERLAKE_S)
[10:07:37] [PASSED] 0x4692 (ALDERLAKE_S)
[10:07:37] [PASSED] 0x4693 (ALDERLAKE_S)
[10:07:37] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46AA (ALDERLAKE_P)
[10:07:37] [PASSED] 0x462A (ALDERLAKE_P)
[10:07:37] [PASSED] 0x4626 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x4628 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:07:37] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:07:37] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:07:37] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:07:37] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:07:37] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:07:37] [PASSED] 0xA721 (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA720 (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:07:37] [PASSED] 0xA780 (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA781 (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA782 (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA783 (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA788 (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA789 (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA78A (ALDERLAKE_S)
[10:07:37] [PASSED] 0xA78B (ALDERLAKE_S)
[10:07:37] [PASSED] 0x4905 (DG1)
[10:07:37] [PASSED] 0x4906 (DG1)
[10:07:37] [PASSED] 0x4907 (DG1)
[10:07:37] [PASSED] 0x4908 (DG1)
[10:07:37] [PASSED] 0x4909 (DG1)
[10:07:37] [PASSED] 0x56C0 (DG2)
[10:07:37] [PASSED] 0x56C2 (DG2)
[10:07:37] [PASSED] 0x56C1 (DG2)
[10:07:37] [PASSED] 0x7D51 (METEORLAKE)
[10:07:37] [PASSED] 0x7DD1 (METEORLAKE)
[10:07:37] [PASSED] 0x7D41 (METEORLAKE)
[10:07:37] [PASSED] 0x7D67 (METEORLAKE)
[10:07:37] [PASSED] 0xB640 (METEORLAKE)
[10:07:37] [PASSED] 0x56A0 (DG2)
[10:07:37] [PASSED] 0x56A1 (DG2)
[10:07:37] [PASSED] 0x56A2 (DG2)
[10:07:37] [PASSED] 0x56BE (DG2)
[10:07:37] [PASSED] 0x56BF (DG2)
[10:07:37] [PASSED] 0x5690 (DG2)
[10:07:37] [PASSED] 0x5691 (DG2)
[10:07:37] [PASSED] 0x5692 (DG2)
[10:07:37] [PASSED] 0x56A5 (DG2)
[10:07:37] [PASSED] 0x56A6 (DG2)
[10:07:37] [PASSED] 0x56B0 (DG2)
[10:07:37] [PASSED] 0x56B1 (DG2)
[10:07:37] [PASSED] 0x56BA (DG2)
[10:07:37] [PASSED] 0x56BB (DG2)
[10:07:37] [PASSED] 0x56BC (DG2)
[10:07:37] [PASSED] 0x56BD (DG2)
[10:07:37] [PASSED] 0x5693 (DG2)
[10:07:37] [PASSED] 0x5694 (DG2)
[10:07:37] [PASSED] 0x5695 (DG2)
[10:07:37] [PASSED] 0x56A3 (DG2)
[10:07:37] [PASSED] 0x56A4 (DG2)
[10:07:37] [PASSED] 0x56B2 (DG2)
[10:07:37] [PASSED] 0x56B3 (DG2)
[10:07:37] [PASSED] 0x5696 (DG2)
[10:07:37] [PASSED] 0x5697 (DG2)
[10:07:37] [PASSED] 0xB69 (PVC)
[10:07:37] [PASSED] 0xB6E (PVC)
[10:07:37] [PASSED] 0xBD4 (PVC)
[10:07:37] [PASSED] 0xBD5 (PVC)
[10:07:37] [PASSED] 0xBD6 (PVC)
[10:07:37] [PASSED] 0xBD7 (PVC)
[10:07:37] [PASSED] 0xBD8 (PVC)
[10:07:37] [PASSED] 0xBD9 (PVC)
[10:07:37] [PASSED] 0xBDA (PVC)
[10:07:37] [PASSED] 0xBDB (PVC)
[10:07:37] [PASSED] 0xBE0 (PVC)
[10:07:37] [PASSED] 0xBE1 (PVC)
[10:07:37] [PASSED] 0xBE5 (PVC)
[10:07:37] [PASSED] 0x7D40 (METEORLAKE)
[10:07:37] [PASSED] 0x7D45 (METEORLAKE)
[10:07:37] [PASSED] 0x7D55 (METEORLAKE)
[10:07:37] [PASSED] 0x7D60 (METEORLAKE)
[10:07:37] [PASSED] 0x7DD5 (METEORLAKE)
[10:07:37] [PASSED] 0x6420 (LUNARLAKE)
[10:07:37] [PASSED] 0x64A0 (LUNARLAKE)
[10:07:37] [PASSED] 0x64B0 (LUNARLAKE)
[10:07:37] [PASSED] 0xE202 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE209 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE20B (BATTLEMAGE)
[10:07:37] [PASSED] 0xE20C (BATTLEMAGE)
[10:07:37] [PASSED] 0xE20D (BATTLEMAGE)
[10:07:37] [PASSED] 0xE210 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE211 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE212 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE216 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE220 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE221 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE222 (BATTLEMAGE)
[10:07:37] [PASSED] 0xE223 (BATTLEMAGE)
[10:07:37] [PASSED] 0xB080 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB081 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB082 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB083 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB084 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB085 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB086 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB087 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB08F (PANTHERLAKE)
[10:07:37] [PASSED] 0xB090 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:07:37] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:07:37] [PASSED] 0xFD80 (PANTHERLAKE)
[10:07:37] [PASSED] 0xFD81 (PANTHERLAKE)
[10:07:37] [PASSED] 0xD740 (NOVALAKE_S)
[10:07:37] [PASSED] 0xD741 (NOVALAKE_S)
[10:07:37] [PASSED] 0xD742 (NOVALAKE_S)
[10:07:37] [PASSED] 0xD743 (NOVALAKE_S)
[10:07:37] [PASSED] 0xD744 (NOVALAKE_S)
[10:07:37] [PASSED] 0xD745 (NOVALAKE_S)
[10:07:37] [PASSED] 0x674C (CRESCENTISLAND)
[10:07:37] [PASSED] 0xD750 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD751 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD752 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD753 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD754 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD755 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD756 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD757 (NOVALAKE_P)
[10:07:37] [PASSED] 0xD75F (NOVALAKE_P)
[10:07:37] =============== [PASSED] check_platform_desc ===============
[10:07:37] ===================== [PASSED] xe_pci ======================
[10:07:37] =================== xe_rtp (2 subtests) ====================
[10:07:37] =============== xe_rtp_process_to_sr_tests  ================
[10:07:37] [PASSED] coalesce-same-reg
[10:07:37] [PASSED] no-match-no-add
[10:07:37] [PASSED] match-or
[10:07:37] [PASSED] match-or-xfail
[10:07:37] [PASSED] no-match-no-add-multiple-rules
[10:07:37] [PASSED] two-regs-two-entries
[10:07:37] [PASSED] clr-one-set-other
[10:07:37] [PASSED] set-field
[10:07:37] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:07:37] [PASSED] conflict-not-disjoint
[10:07:37] [PASSED] conflict-reg-type
[10:07:37] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:07:37] ================== xe_rtp_process_tests  ===================
[10:07:37] [PASSED] active1
[10:07:37] [PASSED] active2
[10:07:37] [PASSED] active-inactive
[10:07:37] [PASSED] inactive-active
[10:07:37] [PASSED] inactive-1st_or_active-inactive
[10:07:37] [PASSED] inactive-2nd_or_active-inactive
[10:07:37] [PASSED] inactive-last_or_active-inactive
[10:07:37] [PASSED] inactive-no_or_active-inactive
[10:07:37] ============== [PASSED] xe_rtp_process_tests ===============
[10:07:37] ===================== [PASSED] xe_rtp ======================
[10:07:37] ==================== xe_wa (1 subtest) =====================
[10:07:37] ======================== xe_wa_gt  =========================
[10:07:37] [PASSED] TIGERLAKE B0
[10:07:37] [PASSED] DG1 A0
[10:07:37] [PASSED] DG1 B0
[10:07:37] [PASSED] ALDERLAKE_S A0
[10:07:37] [PASSED] ALDERLAKE_S B0
[10:07:37] [PASSED] ALDERLAKE_S C0
[10:07:37] [PASSED] ALDERLAKE_S D0
[10:07:37] [PASSED] ALDERLAKE_P A0
[10:07:37] [PASSED] ALDERLAKE_P B0
[10:07:37] [PASSED] ALDERLAKE_P C0
[10:07:37] [PASSED] ALDERLAKE_S RPLS D0
[10:07:37] [PASSED] ALDERLAKE_P RPLU E0
[10:07:37] [PASSED] DG2 G10 C0
[10:07:37] [PASSED] DG2 G11 B1
[10:07:37] [PASSED] DG2 G12 A1
[10:07:37] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:07:37] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:07:37] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:07:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:07:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:07:37] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:07:37] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:07:37] ==================== [PASSED] xe_wa_gt =====================
[10:07:37] ====================== [PASSED] xe_wa ======================
[10:07:37] ============================================================
[10:07:37] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:07:37] Elapsed time: 36.141s total, 4.256s configuring, 31.268s building, 0.606s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:07:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:07:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:08:04] Starting KUnit Kernel (1/1)...
[10:08:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:08:04] ============ drm_test_pick_cmdline (2 subtests) ============
[10:08:04] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:08:04] =============== drm_test_pick_cmdline_named  ===============
[10:08:04] [PASSED] NTSC
[10:08:04] [PASSED] NTSC-J
[10:08:04] [PASSED] PAL
[10:08:04] [PASSED] PAL-M
[10:08:04] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:08:04] ============== [PASSED] drm_test_pick_cmdline ==============
[10:08:04] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:08:04] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:08:04] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:08:04] =========== drm_validate_clone_mode (2 subtests) ===========
[10:08:04] ============== drm_test_check_in_clone_mode  ===============
[10:08:04] [PASSED] in_clone_mode
[10:08:04] [PASSED] not_in_clone_mode
[10:08:04] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:08:04] =============== drm_test_check_valid_clones  ===============
[10:08:04] [PASSED] not_in_clone_mode
[10:08:04] [PASSED] valid_clone
[10:08:04] [PASSED] invalid_clone
[10:08:04] =========== [PASSED] drm_test_check_valid_clones ===========
[10:08:04] ============= [PASSED] drm_validate_clone_mode =============
[10:08:04] ============= drm_validate_modeset (1 subtest) =============
[10:08:04] [PASSED] drm_test_check_connector_changed_modeset
[10:08:04] ============== [PASSED] drm_validate_modeset ===============
[10:08:04] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:08:04] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:08:04] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:08:04] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:08:04] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:08:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:08:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:08:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:08:04] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:08:04] ============== drm_bridge_alloc (2 subtests) ===============
[10:08:04] [PASSED] drm_test_drm_bridge_alloc_basic
[10:08:04] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:08:04] ================ [PASSED] drm_bridge_alloc =================
[10:08:04] ============= drm_cmdline_parser (40 subtests) =============
[10:08:04] [PASSED] drm_test_cmdline_force_d_only
[10:08:04] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:08:04] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:08:04] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:08:04] [PASSED] drm_test_cmdline_force_e_only
[10:08:04] [PASSED] drm_test_cmdline_res
[10:08:04] [PASSED] drm_test_cmdline_res_vesa
[10:08:04] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:08:04] [PASSED] drm_test_cmdline_res_rblank
[10:08:04] [PASSED] drm_test_cmdline_res_bpp
[10:08:04] [PASSED] drm_test_cmdline_res_refresh
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:08:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:08:04] [PASSED] drm_test_cmdline_res_margins_force_on
[10:08:04] [PASSED] drm_test_cmdline_res_vesa_margins
[10:08:04] [PASSED] drm_test_cmdline_name
[10:08:04] [PASSED] drm_test_cmdline_name_bpp
[10:08:04] [PASSED] drm_test_cmdline_name_option
[10:08:04] [PASSED] drm_test_cmdline_name_bpp_option
[10:08:04] [PASSED] drm_test_cmdline_rotate_0
[10:08:04] [PASSED] drm_test_cmdline_rotate_90
[10:08:04] [PASSED] drm_test_cmdline_rotate_180
[10:08:04] [PASSED] drm_test_cmdline_rotate_270
[10:08:04] [PASSED] drm_test_cmdline_hmirror
[10:08:04] [PASSED] drm_test_cmdline_vmirror
[10:08:04] [PASSED] drm_test_cmdline_margin_options
[10:08:04] [PASSED] drm_test_cmdline_multiple_options
[10:08:04] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:08:04] [PASSED] drm_test_cmdline_extra_and_option
[10:08:04] [PASSED] drm_test_cmdline_freestanding_options
[10:08:04] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:08:04] [PASSED] drm_test_cmdline_panel_orientation
[10:08:04] ================ drm_test_cmdline_invalid  =================
[10:08:04] [PASSED] margin_only
[10:08:04] [PASSED] interlace_only
[10:08:04] [PASSED] res_missing_x
[10:08:04] [PASSED] res_missing_y
[10:08:04] [PASSED] res_bad_y
[10:08:04] [PASSED] res_missing_y_bpp
[10:08:04] [PASSED] res_bad_bpp
[10:08:04] [PASSED] res_bad_refresh
[10:08:04] [PASSED] res_bpp_refresh_force_on_off
[10:08:04] [PASSED] res_invalid_mode
[10:08:04] [PASSED] res_bpp_wrong_place_mode
[10:08:04] [PASSED] name_bpp_refresh
[10:08:04] [PASSED] name_refresh
[10:08:04] [PASSED] name_refresh_wrong_mode
[10:08:04] [PASSED] name_refresh_invalid_mode
[10:08:04] [PASSED] rotate_multiple
[10:08:04] [PASSED] rotate_invalid_val
[10:08:04] [PASSED] rotate_truncated
[10:08:04] [PASSED] invalid_option
[10:08:04] [PASSED] invalid_tv_option
[10:08:04] [PASSED] truncated_tv_option
[10:08:04] ============ [PASSED] drm_test_cmdline_invalid =============
[10:08:04] =============== drm_test_cmdline_tv_options  ===============
[10:08:04] [PASSED] NTSC
[10:08:04] [PASSED] NTSC_443
[10:08:04] [PASSED] NTSC_J
[10:08:04] [PASSED] PAL
[10:08:04] [PASSED] PAL_M
[10:08:04] [PASSED] PAL_N
[10:08:04] [PASSED] SECAM
[10:08:04] [PASSED] MONO_525
[10:08:04] [PASSED] MONO_625
[10:08:04] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:08:04] =============== [PASSED] drm_cmdline_parser ================
[10:08:04] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:08:04] [PASSED] drm_test_connector_hdmi_init_valid
[10:08:04] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:08:04] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:08:04] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:08:04] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:08:04] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:08:04] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:08:04] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:08:04] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:08:04] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:08:04] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:08:04] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:08:04] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:08:04] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:08:04] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:08:04] [PASSED] drm_test_connector_hdmi_init_null_product
[10:08:04] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:08:04] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:08:04] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:08:04] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:08:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:08:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:08:04] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:08:04] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:08:04] [PASSED] HDMI-A
[10:08:04] [PASSED] HDMI-B
[10:08:04] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:08:04] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:08:04] [PASSED] Unknown
[10:08:04] [PASSED] VGA
[10:08:04] [PASSED] DVI-I
[10:08:04] [PASSED] DVI-D
[10:08:04] [PASSED] DVI-A
[10:08:04] [PASSED] Composite
[10:08:04] [PASSED] SVIDEO
[10:08:04] [PASSED] LVDS
[10:08:04] [PASSED] Component
[10:08:04] [PASSED] DIN
[10:08:04] [PASSED] DP
[10:08:04] [PASSED] TV
[10:08:04] [PASSED] eDP
[10:08:04] [PASSED] Virtual
[10:08:04] [PASSED] DSI
[10:08:04] [PASSED] DPI
[10:08:04] [PASSED] Writeback
[10:08:04] [PASSED] SPI
[10:08:04] [PASSED] USB
[10:08:04] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:08:04] ============ [PASSED] drmm_connector_hdmi_init =============
[10:08:04] ============= drmm_connector_init (3 subtests) =============
[10:08:04] [PASSED] drm_test_drmm_connector_init
[10:08:04] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:08:04] ========= drm_test_drmm_connector_init_type_valid  =========
[10:08:04] [PASSED] Unknown
[10:08:04] [PASSED] VGA
[10:08:04] [PASSED] DVI-I
[10:08:04] [PASSED] DVI-D
[10:08:04] [PASSED] DVI-A
[10:08:04] [PASSED] Composite
[10:08:04] [PASSED] SVIDEO
[10:08:04] [PASSED] LVDS
[10:08:04] [PASSED] Component
[10:08:04] [PASSED] DIN
[10:08:04] [PASSED] DP
[10:08:04] [PASSED] HDMI-A
[10:08:04] [PASSED] HDMI-B
[10:08:04] [PASSED] TV
[10:08:04] [PASSED] eDP
[10:08:04] [PASSED] Virtual
[10:08:04] [PASSED] DSI
[10:08:04] [PASSED] DPI
[10:08:04] [PASSED] Writeback
[10:08:04] [PASSED] SPI
[10:08:04] [PASSED] USB
[10:08:04] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:08:04] =============== [PASSED] drmm_connector_init ===============
[10:08:04] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_init
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:08:04] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:08:04] [PASSED] Unknown
[10:08:04] [PASSED] VGA
[10:08:04] [PASSED] DVI-I
[10:08:04] [PASSED] DVI-D
[10:08:04] [PASSED] DVI-A
[10:08:04] [PASSED] Composite
[10:08:04] [PASSED] SVIDEO
[10:08:04] [PASSED] LVDS
[10:08:04] [PASSED] Component
[10:08:04] [PASSED] DIN
[10:08:04] [PASSED] DP
[10:08:04] [PASSED] HDMI-A
[10:08:04] [PASSED] HDMI-B
[10:08:04] [PASSED] TV
[10:08:04] [PASSED] eDP
[10:08:04] [PASSED] Virtual
[10:08:04] [PASSED] DSI
[10:08:04] [PASSED] DPI
[10:08:04] [PASSED] Writeback
[10:08:04] [PASSED] SPI
[10:08:04] [PASSED] USB
[10:08:04] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:08:04] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:08:04] [PASSED] Unknown
[10:08:04] [PASSED] VGA
[10:08:04] [PASSED] DVI-I
[10:08:04] [PASSED] DVI-D
[10:08:04] [PASSED] DVI-A
[10:08:04] [PASSED] Composite
[10:08:04] [PASSED] SVIDEO
[10:08:04] [PASSED] LVDS
[10:08:04] [PASSED] Component
[10:08:04] [PASSED] DIN
[10:08:04] [PASSED] DP
[10:08:04] [PASSED] HDMI-A
[10:08:04] [PASSED] HDMI-B
[10:08:04] [PASSED] TV
[10:08:04] [PASSED] eDP
[10:08:04] [PASSED] Virtual
[10:08:04] [PASSED] DSI
[10:08:04] [PASSED] DPI
[10:08:04] [PASSED] Writeback
[10:08:04] [PASSED] SPI
[10:08:04] [PASSED] USB
[10:08:04] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:08:04] =========== [PASSED] drm_connector_dynamic_init ============
[10:08:04] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:08:04] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:08:04] ======= drm_connector_dynamic_register (7 subtests) ========
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:08:04] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:08:04] ========= [PASSED] drm_connector_dynamic_register ==========
[10:08:04] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:08:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:08:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:08:04] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:08:04] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:08:04] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:08:04] [PASSED] NTSC
[10:08:04] [PASSED] NTSC-443
[10:08:04] [PASSED] NTSC-J
[10:08:04] [PASSED] PAL
[10:08:04] [PASSED] PAL-M
[10:08:04] [PASSED] PAL-N
[10:08:04] [PASSED] SECAM
[10:08:04] [PASSED] Mono
[10:08:04] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:08:04] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:08:04] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:08:04] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:08:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:08:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:08:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:08:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:08:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:08:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:08:04] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:08:04] [PASSED] VIC 96
[10:08:04] [PASSED] VIC 97
[10:08:04] [PASSED] VIC 101
[10:08:04] [PASSED] VIC 102
[10:08:04] [PASSED] VIC 106
[10:08:04] [PASSED] VIC 107
[10:08:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:08:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:08:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:08:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:08:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:08:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:08:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:08:04] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:08:04] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:08:04] [PASSED] Automatic
[10:08:04] [PASSED] Full
[10:08:04] [PASSED] Limited 16:235
[10:08:04] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:08:04] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:08:04] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:08:04] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:08:04] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:08:04] [PASSED] RGB
[10:08:04] [PASSED] YUV 4:2:0
[10:08:04] [PASSED] YUV 4:2:2
[10:08:04] [PASSED] YUV 4:4:4
[10:08:04] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:08:04] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:08:04] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:08:04] ============= drm_damage_helper (21 subtests) ==============
[10:08:04] [PASSED] drm_test_damage_iter_no_damage
[10:08:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:08:04] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:08:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:08:04] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:08:04] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:08:04] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:08:04] [PASSED] drm_test_damage_iter_simple_damage
[10:08:04] [PASSED] drm_test_damage_iter_single_damage
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:08:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:08:04] [PASSED] drm_test_damage_iter_damage
[10:08:04] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:08:04] [PASSED] drm_test_damage_iter_damage_one_outside
[10:08:04] [PASSED] drm_test_damage_iter_damage_src_moved
[10:08:04] [PASSED] drm_test_damage_iter_damage_not_visible
[10:08:04] ================ [PASSED] drm_damage_helper ================
[10:08:04] ============== drm_dp_mst_helper (3 subtests) ==============
[10:08:04] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:08:04] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:08:04] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:08:04] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:08:04] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:08:04] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:08:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:08:04] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:08:04] [PASSED] Link rate 2000000 lane count 4
[10:08:04] [PASSED] Link rate 2000000 lane count 2
[10:08:04] [PASSED] Link rate 2000000 lane count 1
[10:08:04] [PASSED] Link rate 1350000 lane count 4
[10:08:04] [PASSED] Link rate 1350000 lane count 2
[10:08:04] [PASSED] Link rate 1350000 lane count 1
[10:08:04] [PASSED] Link rate 1000000 lane count 4
[10:08:04] [PASSED] Link rate 1000000 lane count 2
[10:08:04] [PASSED] Link rate 1000000 lane count 1
[10:08:04] [PASSED] Link rate 810000 lane count 4
[10:08:04] [PASSED] Link rate 810000 lane count 2
[10:08:04] [PASSED] Link rate 810000 lane count 1
[10:08:04] [PASSED] Link rate 540000 lane count 4
[10:08:04] [PASSED] Link rate 540000 lane count 2
[10:08:04] [PASSED] Link rate 540000 lane count 1
[10:08:04] [PASSED] Link rate 270000 lane count 4
[10:08:04] [PASSED] Link rate 270000 lane count 2
[10:08:04] [PASSED] Link rate 270000 lane count 1
[10:08:04] [PASSED] Link rate 162000 lane count 4
[10:08:04] [PASSED] Link rate 162000 lane count 2
[10:08:04] [PASSED] Link rate 162000 lane count 1
[10:08:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:08:04] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:08:04] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:08:04] [PASSED] DP_POWER_UP_PHY with port number
[10:08:04] [PASSED] DP_POWER_DOWN_PHY with port number
[10:08:04] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:08:04] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:08:04] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:08:04] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:08:04] [PASSED] DP_QUERY_PAYLOAD with port number
[10:08:04] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:08:04] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:08:04] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:08:04] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:08:04] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:08:04] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:08:04] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:08:04] [PASSED] DP_REMOTE_I2C_READ with port number
[10:08:04] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:08:04] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:08:04] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:08:04] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:08:04] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:08:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:08:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:08:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:08:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:08:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:08:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:08:04] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:08:04] ================ [PASSED] drm_dp_mst_helper ================
[10:08:04] ================== drm_exec (7 subtests) ===================
[10:08:04] [PASSED] sanitycheck
[10:08:04] [PASSED] test_lock
[10:08:04] [PASSED] test_lock_unlock
[10:08:04] [PASSED] test_duplicates
[10:08:04] [PASSED] test_prepare
[10:08:04] [PASSED] test_prepare_array
[10:08:04] [PASSED] test_multiple_loops
[10:08:04] ==================== [PASSED] drm_exec =====================
[10:08:04] =========== drm_format_helper_test (17 subtests) ===========
[10:08:04] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:08:04] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:08:04] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:08:04] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:08:04] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:08:04] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:08:04] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:08:04] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:08:04] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:08:04] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:08:04] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:08:04] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:08:04] ==================== drm_test_fb_swab  =====================
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ================ [PASSED] drm_test_fb_swab =================
[10:08:04] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:08:04] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:08:04] [PASSED] single_pixel_source_buffer
[10:08:04] [PASSED] single_pixel_clip_rectangle
[10:08:04] [PASSED] well_known_colors
[10:08:04] [PASSED] destination_pitch
[10:08:04] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:08:04] ================= drm_test_fb_clip_offset  =================
[10:08:04] [PASSED] pass through
[10:08:04] [PASSED] horizontal offset
[10:08:04] [PASSED] vertical offset
[10:08:04] [PASSED] horizontal and vertical offset
[10:08:04] [PASSED] horizontal offset (custom pitch)
[10:08:04] [PASSED] vertical offset (custom pitch)
[10:08:04] [PASSED] horizontal and vertical offset (custom pitch)
[10:08:04] ============= [PASSED] drm_test_fb_clip_offset =============
[10:08:04] =================== drm_test_fb_memcpy  ====================
[10:08:04] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:08:04] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:08:04] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:08:04] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:08:04] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:08:04] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:08:04] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:08:04] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:08:04] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:08:04] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:08:04] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:08:04] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:08:04] =============== [PASSED] drm_test_fb_memcpy ================
[10:08:04] ============= [PASSED] drm_format_helper_test ==============
[10:08:04] ================= drm_format (18 subtests) =================
[10:08:04] [PASSED] drm_test_format_block_width_invalid
[10:08:04] [PASSED] drm_test_format_block_width_one_plane
[10:08:04] [PASSED] drm_test_format_block_width_two_plane
[10:08:04] [PASSED] drm_test_format_block_width_three_plane
[10:08:04] [PASSED] drm_test_format_block_width_tiled
[10:08:04] [PASSED] drm_test_format_block_height_invalid
[10:08:04] [PASSED] drm_test_format_block_height_one_plane
[10:08:04] [PASSED] drm_test_format_block_height_two_plane
[10:08:04] [PASSED] drm_test_format_block_height_three_plane
[10:08:04] [PASSED] drm_test_format_block_height_tiled
[10:08:04] [PASSED] drm_test_format_min_pitch_invalid
[10:08:04] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:08:04] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:08:04] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:08:04] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:08:04] [PASSED] drm_test_format_min_pitch_two_plane
[10:08:04] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:08:04] [PASSED] drm_test_format_min_pitch_tiled
[10:08:04] =================== [PASSED] drm_format ====================
[10:08:04] ============== drm_framebuffer (10 subtests) ===============
[10:08:04] ========== drm_test_framebuffer_check_src_coords  ==========
[10:08:04] [PASSED] Success: source fits into fb
[10:08:04] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:08:04] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:08:04] [PASSED] Fail: overflowing fb with source width
[10:08:04] [PASSED] Fail: overflowing fb with source height
[10:08:04] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:08:04] [PASSED] drm_test_framebuffer_cleanup
[10:08:04] =============== drm_test_framebuffer_create  ===============
[10:08:04] [PASSED] ABGR8888 normal sizes
[10:08:04] [PASSED] ABGR8888 max sizes
[10:08:04] [PASSED] ABGR8888 pitch greater than min required
[10:08:04] [PASSED] ABGR8888 pitch less than min required
[10:08:04] [PASSED] ABGR8888 Invalid width
[10:08:04] [PASSED] ABGR8888 Invalid buffer handle
[10:08:04] [PASSED] No pixel format
[10:08:04] [PASSED] ABGR8888 Width 0
[10:08:04] [PASSED] ABGR8888 Height 0
[10:08:04] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:08:04] [PASSED] ABGR8888 Large buffer offset
[10:08:04] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:08:04] [PASSED] ABGR8888 Invalid flag
[10:08:04] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:08:04] [PASSED] ABGR8888 Valid buffer modifier
[10:08:04] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:08:04] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] NV12 Normal sizes
[10:08:04] [PASSED] NV12 Max sizes
[10:08:04] [PASSED] NV12 Invalid pitch
[10:08:04] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:08:04] [PASSED] NV12 different  modifier per-plane
[10:08:04] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:08:04] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] NV12 Modifier for inexistent plane
[10:08:04] [PASSED] NV12 Handle for inexistent plane
[10:08:04] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:08:04] [PASSED] YVU420 Normal sizes
[10:08:04] [PASSED] YVU420 Max sizes
[10:08:04] [PASSED] YVU420 Invalid pitch
[10:08:04] [PASSED] YVU420 Different pitches
[10:08:04] [PASSED] YVU420 Different buffer offsets/pitches
[10:08:04] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:08:04] [PASSED] YVU420 Valid modifier
[10:08:04] [PASSED] YVU420 Different modifiers per plane
[10:08:04] [PASSED] YVU420 Modifier for inexistent plane
[10:08:04] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:08:04] [PASSED] X0L2 Normal sizes
[10:08:04] [PASSED] X0L2 Max sizes
[10:08:04] [PASSED] X0L2 Invalid pitch
[10:08:04] [PASSED] X0L2 Pitch greater than minimum required
[10:08:04] [PASSED] X0L2 Handle for inexistent plane
[10:08:04] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:08:04] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:08:04] [PASSED] X0L2 Valid modifier
[10:08:04] [PASSED] X0L2 Modifier for inexistent plane
[10:08:04] =========== [PASSED] drm_test_framebuffer_create ===========
[10:08:04] [PASSED] drm_test_framebuffer_free
[10:08:04] [PASSED] drm_test_framebuffer_init
[10:08:04] [PASSED] drm_test_framebuffer_init_bad_format
[10:08:04] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:08:04] [PASSED] drm_test_framebuffer_lookup
[10:08:04] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:08:04] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:08:04] ================= [PASSED] drm_framebuffer =================
[10:08:04] ================ drm_gem_shmem (8 subtests) ================
[10:08:04] [PASSED] drm_gem_shmem_test_obj_create
[10:08:04] [PASSED] drm_gem_shmem_test_obj_create_private
[10:08:04] [PASSED] drm_gem_shmem_test_pin_pages
[10:08:04] [PASSED] drm_gem_shmem_test_vmap
[10:08:04] [PASSED] drm_gem_shmem_test_get_sg_table
[10:08:04] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:08:04] [PASSED] drm_gem_shmem_test_madvise
[10:08:04] [PASSED] drm_gem_shmem_test_purge
[10:08:04] ================== [PASSED] drm_gem_shmem ==================
[10:08:04] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:08:04] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:08:04] [PASSED] Automatic
[10:08:04] [PASSED] Full
[10:08:04] [PASSED] Limited 16:235
[10:08:04] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:08:04] [PASSED] drm_test_check_disable_connector
[10:08:04] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:08:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:08:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:08:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:08:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:08:04] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:08:04] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:08:04] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:08:04] [PASSED] drm_test_check_output_bpc_dvi
[10:08:04] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:08:04] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:08:04] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:08:04] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:08:04] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:08:04] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:08:04] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:08:04] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:08:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:08:04] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:08:04] [PASSED] drm_test_check_broadcast_rgb_value
[10:08:04] [PASSED] drm_test_check_bpc_8_value
[10:08:04] [PASSED] drm_test_check_bpc_10_value
[10:08:04] [PASSED] drm_test_check_bpc_12_value
[10:08:04] [PASSED] drm_test_check_format_value
[10:08:04] [PASSED] drm_test_check_tmds_char_value
[10:08:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:08:04] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:08:04] [PASSED] drm_test_check_mode_valid
[10:08:04] [PASSED] drm_test_check_mode_valid_reject
[10:08:04] [PASSED] drm_test_check_mode_valid_reject_rate
[10:08:04] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:08:04] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:08:04] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:08:04] [PASSED] drm_test_check_infoframes
[10:08:04] [PASSED] drm_test_check_reject_avi_infoframe
[10:08:04] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:08:04] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:08:04] [PASSED] drm_test_check_reject_audio_infoframe
[10:08:04] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:08:04] ================= drm_managed (2 subtests) =================
[10:08:04] [PASSED] drm_test_managed_release_action
[10:08:04] [PASSED] drm_test_managed_run_action
[10:08:04] =================== [PASSED] drm_managed ===================
[10:08:04] =================== drm_mm (6 subtests) ====================
[10:08:04] [PASSED] drm_test_mm_init
[10:08:04] [PASSED] drm_test_mm_debug
[10:08:04] [PASSED] drm_test_mm_align32
[10:08:04] [PASSED] drm_test_mm_align64
[10:08:04] [PASSED] drm_test_mm_lowest
[10:08:04] [PASSED] drm_test_mm_highest
[10:08:04] ===================== [PASSED] drm_mm ======================
[10:08:04] ============= drm_modes_analog_tv (5 subtests) =============
[10:08:04] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:08:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:08:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:08:04] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:08:04] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:08:04] =============== [PASSED] drm_modes_analog_tv ===============
[10:08:04] ============== drm_plane_helper (2 subtests) ===============
[10:08:04] =============== drm_test_check_plane_state  ================
[10:08:04] [PASSED] clipping_simple
[10:08:04] [PASSED] clipping_rotate_reflect
[10:08:04] [PASSED] positioning_simple
[10:08:04] [PASSED] upscaling
[10:08:04] [PASSED] downscaling
[10:08:04] [PASSED] rounding1
[10:08:04] [PASSED] rounding2
[10:08:04] [PASSED] rounding3
[10:08:04] [PASSED] rounding4
[10:08:04] =========== [PASSED] drm_test_check_plane_state ============
[10:08:04] =========== drm_test_check_invalid_plane_state  ============
[10:08:04] [PASSED] positioning_invalid
[10:08:04] [PASSED] upscaling_invalid
[10:08:04] [PASSED] downscaling_invalid
[10:08:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:08:04] ================ [PASSED] drm_plane_helper =================
[10:08:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:08:04] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:08:04] [PASSED] None
[10:08:04] [PASSED] PAL
[10:08:04] [PASSED] NTSC
[10:08:04] [PASSED] Both, NTSC Default
[10:08:04] [PASSED] Both, PAL Default
[10:08:04] [PASSED] Both, NTSC Default, with PAL on command-line
[10:08:04] [PASSED] Both, PAL Default, with NTSC on command-line
[10:08:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:08:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:08:04] ================== drm_rect (9 subtests) ===================
[10:08:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:08:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:08:04] [PASSED] drm_test_rect_clip_scaled_clipped
[10:08:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:08:04] ================= drm_test_rect_intersect  =================
[10:08:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:08:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:08:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:08:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:08:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:08:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:08:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:08:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:08:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:08:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:08:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:08:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:08:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:08:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:08:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:08:04] ============= [PASSED] drm_test_rect_intersect =============
[10:08:04] ================ drm_test_rect_calc_hscale  ================
[10:08:04] [PASSED] normal use
[10:08:04] [PASSED] out of max range
[10:08:04] [PASSED] out of min range
[10:08:04] [PASSED] zero dst
[10:08:04] [PASSED] negative src
[10:08:04] [PASSED] negative dst
[10:08:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:08:04] ================ drm_test_rect_calc_vscale  ================
[10:08:04] [PASSED] normal use
[10:08:04] [PASSED] out of max range
[10:08:04] [PASSED] out of min range
[10:08:04] [PASSED] zero dst
[10:08:04] [PASSED] negative src
[10:08:04] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:08:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:08:04] ================== drm_test_rect_rotate  ===================
[10:08:04] [PASSED] reflect-x
[10:08:04] [PASSED] reflect-y
[10:08:04] [PASSED] rotate-0
[10:08:04] [PASSED] rotate-90
[10:08:04] [PASSED] rotate-180
[10:08:04] [PASSED] rotate-270
[10:08:04] ============== [PASSED] drm_test_rect_rotate ===============
[10:08:04] ================ drm_test_rect_rotate_inv  =================
[10:08:04] [PASSED] reflect-x
[10:08:04] [PASSED] reflect-y
[10:08:04] [PASSED] rotate-0
[10:08:04] [PASSED] rotate-90
[10:08:04] [PASSED] rotate-180
[10:08:04] [PASSED] rotate-270
[10:08:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:08:04] ==================== [PASSED] drm_rect =====================
[10:08:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:08:04] ============ drm_test_sysfb_build_fourcc_list  =============
[10:08:04] [PASSED] no native formats
[10:08:04] [PASSED] XRGB8888 as native format
[10:08:04] [PASSED] remove duplicates
[10:08:04] [PASSED] convert alpha formats
[10:08:04] [PASSED] random formats
[10:08:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:08:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:08:04] ================== drm_fixp (2 subtests) ===================
[10:08:04] [PASSED] drm_test_int2fixp
[10:08:04] [PASSED] drm_test_sm2fixp
[10:08:04] ==================== [PASSED] drm_fixp =====================
[10:08:04] ============================================================
[10:08:04] Testing complete. Ran 621 tests: passed: 621
[10:08:04] Elapsed time: 26.332s total, 1.683s configuring, 24.524s building, 0.124s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:08:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:08:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:08:15] Starting KUnit Kernel (1/1)...
[10:08:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:08:15] ================= ttm_device (5 subtests) ==================
[10:08:15] [PASSED] ttm_device_init_basic
[10:08:15] [PASSED] ttm_device_init_multiple
[10:08:15] [PASSED] ttm_device_fini_basic
[10:08:15] [PASSED] ttm_device_init_no_vma_man
[10:08:15] ================== ttm_device_init_pools  ==================
[10:08:15] [PASSED] No DMA allocations, no DMA32 required
[10:08:15] [PASSED] DMA allocations, DMA32 required
[10:08:15] [PASSED] No DMA allocations, DMA32 required
[10:08:15] [PASSED] DMA allocations, no DMA32 required
[10:08:15] ============== [PASSED] ttm_device_init_pools ==============
[10:08:15] =================== [PASSED] ttm_device ====================
[10:08:15] ================== ttm_pool (8 subtests) ===================
[10:08:15] ================== ttm_pool_alloc_basic  ===================
[10:08:15] [PASSED] One page
[10:08:15] [PASSED] More than one page
[10:08:15] [PASSED] Above the allocation limit
[10:08:15] [PASSED] One page, with coherent DMA mappings enabled
[10:08:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:08:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:08:15] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:08:15] [PASSED] One page
[10:08:15] [PASSED] More than one page
[10:08:15] [PASSED] Above the allocation limit
[10:08:15] [PASSED] One page, with coherent DMA mappings enabled
[10:08:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:08:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:08:15] [PASSED] ttm_pool_alloc_order_caching_match
[10:08:15] [PASSED] ttm_pool_alloc_caching_mismatch
[10:08:15] [PASSED] ttm_pool_alloc_order_mismatch
[10:08:15] [PASSED] ttm_pool_free_dma_alloc
[10:08:15] [PASSED] ttm_pool_free_no_dma_alloc
[10:08:15] [PASSED] ttm_pool_fini_basic
[10:08:15] ==================== [PASSED] ttm_pool =====================
[10:08:15] ================ ttm_resource (8 subtests) =================
[10:08:15] ================= ttm_resource_init_basic  =================
[10:08:15] [PASSED] Init resource in TTM_PL_SYSTEM
[10:08:15] [PASSED] Init resource in TTM_PL_VRAM
[10:08:15] [PASSED] Init resource in a private placement
[10:08:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:08:15] ============= [PASSED] ttm_resource_init_basic =============
[10:08:15] [PASSED] ttm_resource_init_pinned
[10:08:15] [PASSED] ttm_resource_fini_basic
[10:08:15] [PASSED] ttm_resource_manager_init_basic
[10:08:15] [PASSED] ttm_resource_manager_usage_basic
[10:08:15] [PASSED] ttm_resource_manager_set_used_basic
[10:08:15] [PASSED] ttm_sys_man_alloc_basic
[10:08:15] [PASSED] ttm_sys_man_free_basic
[10:08:15] ================== [PASSED] ttm_resource ===================
[10:08:15] =================== ttm_tt (15 subtests) ===================
[10:08:15] ==================== ttm_tt_init_basic  ====================
[10:08:15] [PASSED] Page-aligned size
[10:08:15] [PASSED] Extra pages requested
[10:08:15] ================ [PASSED] ttm_tt_init_basic ================
[10:08:15] [PASSED] ttm_tt_init_misaligned
[10:08:15] [PASSED] ttm_tt_fini_basic
[10:08:15] [PASSED] ttm_tt_fini_sg
[10:08:15] [PASSED] ttm_tt_fini_shmem
[10:08:15] [PASSED] ttm_tt_create_basic
[10:08:15] [PASSED] ttm_tt_create_invalid_bo_type
[10:08:15] [PASSED] ttm_tt_create_ttm_exists
[10:08:15] [PASSED] ttm_tt_create_failed
[10:08:15] [PASSED] ttm_tt_destroy_basic
[10:08:15] [PASSED] ttm_tt_populate_null_ttm
[10:08:15] [PASSED] ttm_tt_populate_populated_ttm
[10:08:15] [PASSED] ttm_tt_unpopulate_basic
[10:08:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:08:15] [PASSED] ttm_tt_swapin_basic
[10:08:15] ===================== [PASSED] ttm_tt ======================
[10:08:15] =================== ttm_bo (14 subtests) ===================
[10:08:15] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:08:15] [PASSED] Cannot be interrupted and sleeps
[10:08:15] [PASSED] Cannot be interrupted, locks straight away
[10:08:15] [PASSED] Can be interrupted, sleeps
[10:08:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:08:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:08:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:08:15] [PASSED] ttm_bo_reserve_double_resv
[10:08:15] [PASSED] ttm_bo_reserve_interrupted
[10:08:15] [PASSED] ttm_bo_reserve_deadlock
[10:08:15] [PASSED] ttm_bo_unreserve_basic
[10:08:15] [PASSED] ttm_bo_unreserve_pinned
[10:08:15] [PASSED] ttm_bo_unreserve_bulk
[10:08:15] [PASSED] ttm_bo_fini_basic
[10:08:15] [PASSED] ttm_bo_fini_shared_resv
[10:08:15] [PASSED] ttm_bo_pin_basic
[10:08:15] [PASSED] ttm_bo_pin_unpin_resource
[10:08:15] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:08:15] ===================== [PASSED] ttm_bo ======================
[10:08:15] ============== ttm_bo_validate (22 subtests) ===============
[10:08:15] ============== ttm_bo_init_reserved_sys_man  ===============
[10:08:15] [PASSED] Buffer object for userspace
[10:08:15] [PASSED] Kernel buffer object
[10:08:15] [PASSED] Shared buffer object
[10:08:15] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:08:15] ============== ttm_bo_init_reserved_mock_man  ==============
[10:08:15] [PASSED] Buffer object for userspace
[10:08:15] [PASSED] Kernel buffer object
[10:08:15] [PASSED] Shared buffer object
[10:08:15] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:08:15] [PASSED] ttm_bo_init_reserved_resv
[10:08:15] ================== ttm_bo_validate_basic  ==================
[10:08:15] [PASSED] Buffer object for userspace
[10:08:15] [PASSED] Kernel buffer object
[10:08:15] [PASSED] Shared buffer object
[10:08:15] ============== [PASSED] ttm_bo_validate_basic ==============
[10:08:15] [PASSED] ttm_bo_validate_invalid_placement
[10:08:15] ============= ttm_bo_validate_same_placement  ==============
[10:08:15] [PASSED] System manager
[10:08:15] [PASSED] VRAM manager
[10:08:15] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:08:15] [PASSED] ttm_bo_validate_failed_alloc
[10:08:15] [PASSED] ttm_bo_validate_pinned
[10:08:15] [PASSED] ttm_bo_validate_busy_placement
[10:08:15] ================ ttm_bo_validate_multihop  =================
[10:08:15] [PASSED] Buffer object for userspace
[10:08:15] [PASSED] Kernel buffer object
[10:08:15] [PASSED] Shared buffer object
[10:08:15] ============ [PASSED] ttm_bo_validate_multihop =============
[10:08:15] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:08:15] [PASSED] Buffer object in system domain, no page vector
[10:08:15] [PASSED] Buffer object in system domain with an existing page vector
[10:08:15] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:08:15] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:08:15] [PASSED] Buffer object for userspace
[10:08:15] [PASSED] Kernel buffer object
[10:08:15] [PASSED] Shared buffer object
[10:08:15] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:08:15] [PASSED] ttm_bo_validate_move_fence_signaled
[10:08:15] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:08:15] [PASSED] Waits for GPU
[10:08:15] [PASSED] Tries to lock straight away
[10:08:15] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:08:15] [PASSED] ttm_bo_validate_swapout
[10:08:15] [PASSED] ttm_bo_validate_happy_evict
[10:08:15] [PASSED] ttm_bo_validate_all_pinned_evict
[10:08:15] [PASSED] ttm_bo_validate_allowed_only_evict
[10:08:15] [PASSED] ttm_bo_validate_deleted_evict
[10:08:15] [PASSED] ttm_bo_validate_busy_domain_evict
[10:08:15] [PASSED] ttm_bo_validate_evict_gutting
[10:08:15] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:08:15] ================= [PASSED] ttm_bo_validate =================
[10:08:15] ============================================================
[10:08:15] Testing complete. Ran 102 tests: passed: 102
[10:08:15] Elapsed time: 11.370s total, 1.701s configuring, 9.453s building, 0.180s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 18+ messages in thread

* ✓ Xe.CI.BAT: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (12 preceding siblings ...)
  2026-04-10 10:08 ` ✓ CI.KUnit: success " Patchwork
@ 2026-04-10 10:53 ` Patchwork
  2026-04-10 17:42 ` ✗ Xe.CI.FULL: failure " Patchwork
  14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-04-10 10:53 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 2393 bytes --]

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
URL   : https://patchwork.freedesktop.org/series/164123/
State : success

== Summary ==

CI Bug Log - changes from xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e_BAT -> xe-pw-164123v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-164123v3_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [DMESG-WARN][3] ([Intel XE#7483]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  * igt@xe_pat@pat-index-xe2@render:
    - bat-ptl-vm:         [DMESG-WARN][5] ([Intel XE#7110]) -> [PASS][6] +1 other test pass
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/bat-ptl-vm/igt@xe_pat@pat-index-xe2@render.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/bat-ptl-vm/igt@xe_pat@pat-index-xe2@render.html

  
  [Intel XE#7110]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7110
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483


Build changes
-------------

  * Linux: xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e -> xe-pw-164123v3

  IGT_8852: 8852
  xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e: c73a9719bdd06f85d527faab6fec3dca75f8dd1e
  xe-pw-164123v3: 164123v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/index.html

[-- Attachment #2: Type: text/html, Size: 3090 bytes --]

^ permalink raw reply	[flat|nested] 18+ messages in thread

* ✗ Xe.CI.FULL: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
  2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
                   ` (13 preceding siblings ...)
  2026-04-10 10:53 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-04-10 17:42 ` Patchwork
  14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-04-10 17:42 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 26551 bytes --]

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3)
URL   : https://patchwork.freedesktop.org/series/164123/
State : failure

== Summary ==

CI Bug Log - changes from xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e_FULL -> xe-pw-164123v3_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-164123v3_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-164123v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-164123v3_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-bmg:          [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-7/igt@kms_cursor_crc@cursor-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_cursor_legacy@forked-move@all-pipes:
    - shard-bmg:          [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-5/igt@kms_cursor_legacy@forked-move@all-pipes.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@kms_cursor_legacy@forked-move@all-pipes.html

  
Known issues
------------

  Here are the changes found in xe-pw-164123v3_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-bmg:          NOTRUN -> [FAIL][5] ([Intel XE#7445])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@intel_hwmon@hwmon-write.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2328] / [Intel XE#7367])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#7679])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2887]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html

  * igt@kms_chamelium_color@degamma:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2325] / [Intel XE#7358])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_chamelium_color@degamma.html

  * igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][11] ([Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-random-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2320])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_cursor_crc@cursor-random-128x42.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2321] / [Intel XE#7355])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@forked-move:
    - shard-bmg:          [PASS][14] -> [ABORT][15] ([Intel XE#5545] / [Intel XE#7200]) +1 other test abort
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-5/igt@kms_cursor_legacy@forked-move.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@kms_cursor_legacy@forked-move.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2286] / [Intel XE#6035])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2374] / [Intel XE#6128])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ac-dp2-hdmi-a3:
    - shard-bmg:          [PASS][18] -> [DMESG-FAIL][19] ([Intel XE#7725]) +1 other test dmesg-fail
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-6/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ac-dp2-hdmi-a3.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-6/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ac-dp2-hdmi-a3.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2311]) +5 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#4141]) +3 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#7061] / [Intel XE#7356])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2313]) +3 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#4329] / [Intel XE#6912] / [Intel XE#7375])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#7376] / [Intel XE#870])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#1489])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2234] / [Intel XE#2850])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#3904] / [Intel XE#7342])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2168] / [Intel XE#7444])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@kms_vrr@lobf.html

  * igt@xe_eudebug@basic-vms:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7636]) +2 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_eudebug@basic-vms.html

  * igt@xe_evict@evict-small-multi-queue-priority-cm:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7140])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_evict@evict-small-multi-queue-priority-cm.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7136]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#6874]) +3 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_exec_multi_queue@two-queues-preempt-mode-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7138])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-userptr.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59]) -> ([PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [DMESG-WARN][73], [PASS][74], [PASS][75], [PASS][76], [DMESG-WARN][77], [SKIP][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85]) ([Intel XE#2457] / [Intel XE#7405] / [Intel XE#7725])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-10/igt@xe_module_load@load.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-7/igt@xe_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-4/igt@xe_module_load@load.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-8/igt@xe_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-5/igt@xe_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-9/igt@xe_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-3/igt@xe_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-2/igt@xe_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-3/igt@xe_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-2/igt@xe_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-6/igt@xe_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-6/igt@xe_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-7/igt@xe_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-8/igt@xe_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-8/igt@xe_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-9/igt@xe_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-10/igt@xe_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-1/igt@xe_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-5/igt@xe_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-9/igt@xe_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-1/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-5/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-2/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-10/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-6/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-8/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-7/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-7/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-9/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-1/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-5/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-10/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-10/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-1/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-9/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-6/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-6/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-4/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-6/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-8/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-5/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-5/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-8/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-4/igt@xe_module_load@load.html

  * igt@xe_multigpu_svm@mgpu-latency-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#6964])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_multigpu_svm@mgpu-latency-prefetch.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#2284] / [Intel XE#7370])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#4733] / [Intel XE#7417])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-3/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [FAIL][89] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][90] +1 other test pass
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2:
    - shard-bmg:          [FAIL][91] ([Intel XE#6078]) -> [PASS][92] +1 other test pass
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-bmg:          [DMESG-WARN][93] ([Intel XE#5354]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-2/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-2/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][95] ([Intel XE#301]) -> [PASS][96] +1 other test pass
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][97] ([Intel XE#1503]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-8/igt@kms_hdr@invalid-hdr.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [FAIL][99] ([Intel XE#4459]) -> [PASS][100] +1 other test pass
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-lnl-1/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-lnl-8/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@kms_vrr@flipline:
    - shard-lnl:          [FAIL][101] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][102] +1 other test pass
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-lnl-8/igt@kms_vrr@flipline.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-lnl-6/igt@kms_vrr@flipline.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [FAIL][103] ([Intel XE#5625]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-lnl-7/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][105] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][106] ([Intel XE#3544])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7200]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7200
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
  [Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7725
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870


Build changes
-------------

  * Linux: xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e -> xe-pw-164123v3

  IGT_8852: 8852
  xe-4881-c73a9719bdd06f85d527faab6fec3dca75f8dd1e: c73a9719bdd06f85d527faab6fec3dca75f8dd1e
  xe-pw-164123v3: 164123v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v3/index.html

[-- Attachment #2: Type: text/html, Size: 28438 bytes --]

^ permalink raw reply	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2026-04-10 17:42 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-09 10:15 [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
2026-04-09 10:51   ` Nautiyal, Ankit K
2026-04-09 10:15 ` [PATCH v2 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
2026-04-09 10:58   ` Nautiyal, Ankit K
2026-04-09 10:15 ` [PATCH v2 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
2026-04-09 10:15 ` [PATCH v2 9/9] drm/i915/dp: " Ville Syrjala
2026-04-09 10:23 ` ✗ CI.KUnit: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev2) Patchwork
2026-04-09 15:40 ` [PATCH v2 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Nicolas Frattaroli
2026-04-10 10:07 ` ✗ CI.checkpatch: warning for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling (rev3) Patchwork
2026-04-10 10:08 ` ✓ CI.KUnit: success " Patchwork
2026-04-10 10:53 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-10 17:42 ` ✗ Xe.CI.FULL: failure " Patchwork

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