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From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, <intel-xe@lists.freedesktop.org>
Subject: Re: ✗ Xe.CI.BAT: failure for drm/xe/wa: Steer RMW of MCR registers while building default LRC
Date: Sat, 7 Feb 2026 23:05:06 +0100	[thread overview]
Message-ID: <819f042c-cbdf-4e09-a26c-ffd1a9046529@intel.com> (raw)
In-Reply-To: <20260206235738.GD458797@mdroper-desk1.amr.corp.intel.com>



On 2/7/2026 12:57 AM, Matt Roper wrote:
> On Fri, Feb 06, 2026 at 11:15:16PM +0000, Patchwork wrote:
>> == Series Details ==
>>
>> Series: drm/xe/wa: Steer RMW of MCR registers while building default LRC
>> URL   : https://patchwork.freedesktop.org/series/161300/
>> State : failure
>>
>> == Summary ==
>>
>> CI Bug Log - changes from xe-4520-ab5b6da7d4879640bce3197597e0bc707bd60ab5_BAT -> xe-pw-161300v1_BAT
>> ====================================================
>>
>> Summary
>> -------
>>
>>   **FAILURE**
> 
> Hmm, it looks like this is problematic in SRIOV VF environments because
> the VF doesn't know how to steer (because it doesn't have access to the
> fuse registers that provide the necessary details).  Lack of steering
> knowledge usually isn't a problem since the VF also doesn't need to do
> any CPU-originated MCR accesses (steered via 0xFD4).  But in this case
> to do a CS-originated RMW operation on an MCR register, the ability to
> steer properly does become important, and the VF just doesn't have a way
> to get the information it needs.
> 
> I'm not sure how to fix that gap.  Michal, any thoughts?

It looks that VFs already know the fuses at the time of mcr_init() just
we didn't let them run any initialization since we didn't need that.

We can let them do that now and with [1] I didn't see any WARNs.

Michal

[1] https://patchwork.freedesktop.org/series/161319/

> 
> 
> Matt
> 
>>
>>   Serious unknown changes coming with xe-pw-161300v1_BAT absolutely need to be
>>   verified manually.
>>   
>>   If you think the reported changes have nothing to do with the changes
>>   introduced in xe-pw-161300v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
>>   to document this new failure mode, which will reduce false positives in CI.
>>
>>   
>>
>> Participating hosts (12 -> 11)
>> ------------------------------
>>
>>   Missing    (1): bat-bmg-3 
>>
>> Possible new issues
>> -------------------
>>
>>   Here are the unknown changes that may have been introduced in xe-pw-161300v1_BAT:
>>
>> ### IGT changes ###
>>
>> #### Possible regressions ####
>>
>>   * igt@sriov_basic@enable-vfs-autoprobe-on:
>>     - bat-bmg-2:          [PASS][1] -> [ABORT][2] +1 other test abort
>>    [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4520-ab5b6da7d4879640bce3197597e0bc707bd60ab5/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
>>    [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161300v1/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
>>
>>   * igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1:
>>     - bat-bmg-1:          [PASS][3] -> [ABORT][4] +1 other test abort
>>    [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4520-ab5b6da7d4879640bce3197597e0bc707bd60ab5/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
>>    [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161300v1/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
>>     - bat-atsm-2:         [PASS][5] -> [ABORT][6] +1 other test abort
>>    [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4520-ab5b6da7d4879640bce3197597e0bc707bd60ab5/bat-atsm-2/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
>>    [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161300v1/bat-atsm-2/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
>>
>>   
>>
>>
>> Build changes
>> -------------
>>
>>   * Linux: xe-4520-ab5b6da7d4879640bce3197597e0bc707bd60ab5 -> xe-pw-161300v1
>>
>>   IGT_8742: 8742
>>   xe-4520-ab5b6da7d4879640bce3197597e0bc707bd60ab5: ab5b6da7d4879640bce3197597e0bc707bd60ab5
>>   xe-pw-161300v1: 161300v1
>>
>> == Logs ==
>>
>> For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161300v1/index.html
> 


  reply	other threads:[~2026-02-07 22:05 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-06 22:30 [PATCH] drm/xe/wa: Steer RMW of MCR registers while building default LRC Matt Roper
2026-02-06 22:37 ` ✓ CI.KUnit: success for " Patchwork
2026-02-06 23:15 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-06 23:57   ` Matt Roper
2026-02-07 22:05     ` Michal Wajdeczko [this message]
2026-02-09 20:35       ` Matt Roper
2026-02-07 19:53 ` ✗ Xe.CI.FULL: " Patchwork
2026-02-09 20:40 ` ✓ CI.KUnit: success for drm/xe/wa: Steer RMW of MCR registers while building default LRC (rev2) Patchwork
2026-02-09 21:19 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-09 21:25 ` ✓ CI.KUnit: success for drm/xe/wa: Steer RMW of MCR registers while building default LRC (rev3) Patchwork
2026-02-09 22:21 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-10  1:13 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-02-19 15:23   ` Matt Roper
2026-02-19 11:30 ` drm/xe/wa: Steer RMW of MCR registers while building default LRC Vivekanandan, Balasubramani

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