* [PATCH 1/8] drm/i915/edram: extract i915_edram.[ch] for edram detection
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
@ 2025-11-13 9:57 ` Jani Nikula
2025-11-13 9:57 ` [PATCH 2/8] drm/i915: split out i915_freq.[ch] Jani Nikula
` (17 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:57 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
While edram detection ostensibly belongs with the rest of the dram stuff
in soc/intel_dram.c, it's only required by i915 core, not
display. Extract it to a separate i915_edram.[ch] file.
This allows us to drop the edram_size_mb member from struct xe_device.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_driver.c | 3 +-
drivers/gpu/drm/i915/i915_edram.c | 44 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_edram.h | 11 +++++++
drivers/gpu/drm/i915/soc/intel_dram.c | 36 ----------------------
drivers/gpu/drm/i915/soc/intel_dram.h | 1 -
drivers/gpu/drm/xe/xe_device_types.h | 6 ----
7 files changed, 58 insertions(+), 44 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_edram.c
create mode 100644 drivers/gpu/drm/i915/i915_edram.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7c89e5e0a277..b620ae316e92 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -27,6 +27,7 @@ i915-y += \
i915_config.o \
i915_driver.o \
i915_drm_client.o \
+ i915_edram.o \
i915_getparam.o \
i915_ioctl.o \
i915_irq.o \
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c97b76771917..f55e65e7dd4d 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -93,6 +93,7 @@
#include "i915_driver.h"
#include "i915_drm_client.h"
#include "i915_drv.h"
+#include "i915_edram.h"
#include "i915_file_private.h"
#include "i915_getparam.h"
#include "i915_hwmon.h"
@@ -492,7 +493,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
}
/* needs to be done before ggtt probe */
- intel_dram_edram_detect(dev_priv);
+ i915_edram_detect(dev_priv);
ret = i915_set_dma_info(dev_priv);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_edram.c b/drivers/gpu/drm/i915/i915_edram.c
new file mode 100644
index 000000000000..5818ec396d1e
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_edram.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_edram.h"
+#include "i915_reg.h"
+
+static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
+{
+ static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
+ static const u8 sets[4] = { 1, 1, 2, 2 };
+
+ return EDRAM_NUM_BANKS(cap) *
+ ways[EDRAM_WAYS_IDX(cap)] *
+ sets[EDRAM_SETS_IDX(cap)];
+}
+
+void i915_edram_detect(struct drm_i915_private *i915)
+{
+ u32 edram_cap = 0;
+
+ if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
+ return;
+
+ edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
+
+ /* NB: We can't write IDICR yet because we don't have gt funcs set up */
+
+ if (!(edram_cap & EDRAM_ENABLED))
+ return;
+
+ /*
+ * The needed capability bits for size calculation are not there with
+ * pre gen9 so return 128MB always.
+ */
+ if (GRAPHICS_VER(i915) < 9)
+ i915->edram_size_mb = 128;
+ else
+ i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
+
+ drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
+}
diff --git a/drivers/gpu/drm/i915/i915_edram.h b/drivers/gpu/drm/i915/i915_edram.h
new file mode 100644
index 000000000000..8319422ace9d
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_edram.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_DRAM_H__
+#define __I915_DRAM_H__
+
+struct drm_i915_private;
+
+void i915_edram_detect(struct drm_i915_private *i915);
+
+#endif /* __I915_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 3e588762709a..2a21d1cf0476 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -785,39 +785,3 @@ const struct dram_info *intel_dram_info(struct drm_device *drm)
return i915->dram_info;
}
-
-static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
-{
- static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
- static const u8 sets[4] = { 1, 1, 2, 2 };
-
- return EDRAM_NUM_BANKS(cap) *
- ways[EDRAM_WAYS_IDX(cap)] *
- sets[EDRAM_SETS_IDX(cap)];
-}
-
-void intel_dram_edram_detect(struct drm_i915_private *i915)
-{
- u32 edram_cap = 0;
-
- if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
- return;
-
- edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
-
- /* NB: We can't write IDICR yet because we don't have gt funcs set up */
-
- if (!(edram_cap & EDRAM_ENABLED))
- return;
-
- /*
- * The needed capability bits for size calculation are not there with
- * pre gen9 so return 128MB always.
- */
- if (GRAPHICS_VER(i915) < 9)
- i915->edram_size_mb = 128;
- else
- i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
-
- drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
-}
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/soc/intel_dram.h
index 8475ee379daa..58aaf2f91afe 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.h
+++ b/drivers/gpu/drm/i915/soc/intel_dram.h
@@ -35,7 +35,6 @@ struct dram_info {
bool has_16gb_dimms;
};
-void intel_dram_edram_detect(struct drm_i915_private *i915);
int intel_dram_detect(struct drm_i915_private *i915);
unsigned int intel_fsb_freq(struct drm_i915_private *i915);
unsigned int intel_mem_freq(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 0b2fa7c56d38..a072c020b84b 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -650,12 +650,6 @@ struct xe_device {
*/
const struct dram_info *dram_info;
- /*
- * edram size in MB.
- * Cannot be determined by PCIID. You must always read a register.
- */
- u32 edram_size_mb;
-
struct intel_uncore {
spinlock_t lock;
} uncore;
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 2/8] drm/i915: split out i915_freq.[ch]
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
2025-11-13 9:57 ` [PATCH 1/8] drm/i915/edram: extract i915_edram.[ch] for edram detection Jani Nikula
@ 2025-11-13 9:57 ` Jani Nikula
2025-11-13 9:58 ` [PATCH 3/8] drm/i915: move intel_dram.[ch] from soc/ to display/ Jani Nikula
` (16 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:57 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
The i915 core only needs three rather specific functions from
soc/intel_dram.[ch]: i9xx_fsb_freq(), ilk_fsb_freq(), and
ilk_mem_freq(). Add new i915_freq.[ch] and duplicate those functions for
i915 to reduce the dependency on soc/ code.
Wile duplication in general is bad, here it's a tradeoff to simplify the
i915, xe and display interactions.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 6 +-
drivers/gpu/drm/i915/i915_freq.c | 111 ++++++++++++++++++
drivers/gpu/drm/i915/i915_freq.h | 13 ++
5 files changed, 130 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_freq.c
create mode 100644 drivers/gpu/drm/i915/i915_freq.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index b620ae316e92..6d72bbb724fa 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -28,6 +28,7 @@ i915-y += \
i915_driver.o \
i915_drm_client.o \
i915_edram.o \
+ i915_freq.o \
i915_getparam.o \
i915_ioctl.o \
i915_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
index c90b35881a26..aecd120972ea 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
@@ -4,12 +4,12 @@
*/
#include "i915_drv.h"
+#include "i915_freq.h"
#include "i915_reg.h"
#include "intel_gt.h"
#include "intel_gt_clock_utils.h"
#include "intel_gt_print.h"
#include "intel_gt_regs.h"
-#include "soc/intel_dram.h"
static u32 read_reference_ts_freq(struct intel_uncore *uncore)
{
@@ -148,7 +148,7 @@ static u32 gen4_read_clock_frequency(struct intel_uncore *uncore)
*
* Testing on actual hardware has shown there is no /16.
*/
- return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000;
+ return DIV_ROUND_CLOSEST(i9xx_fsb_freq(uncore->i915), 4) * 1000;
}
static u32 read_clock_frequency(struct intel_uncore *uncore)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index b01c837ab646..e1c1e6f3cd7b 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -9,9 +9,9 @@
#include "display/intel_display_rps.h"
#include "display/vlv_clock.h"
-#include "soc/intel_dram.h"
#include "i915_drv.h"
+#include "i915_freq.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "i915_wait_util.h"
@@ -284,8 +284,8 @@ static void gen5_rps_init(struct intel_rps *rps)
u32 rgvmodectl;
int c_m, i;
- fsb_freq = intel_fsb_freq(i915);
- mem_freq = intel_mem_freq(i915);
+ fsb_freq = ilk_fsb_freq(i915);
+ mem_freq = ilk_mem_freq(i915);
if (fsb_freq <= 3200000)
c_m = 0;
diff --git a/drivers/gpu/drm/i915/i915_freq.c b/drivers/gpu/drm/i915/i915_freq.c
new file mode 100644
index 000000000000..9bdaea34aef9
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_freq.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_freq.h"
+#include "intel_mchbar_regs.h"
+
+unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+{
+ u32 fsb;
+
+ /*
+ * Note that this only reads the state of the FSB
+ * straps, not the actual FSB frequency. Some BIOSen
+ * let you configure each independently. Ideally we'd
+ * read out the actual FSB frequency but sadly we
+ * don't know which registers have that information,
+ * and all the relevant docs have gone to bit heaven :(
+ */
+ fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
+
+ if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+ switch (fsb) {
+ case CLKCFG_FSB_400:
+ return 400000;
+ case CLKCFG_FSB_533:
+ return 533333;
+ case CLKCFG_FSB_667:
+ return 666667;
+ case CLKCFG_FSB_800:
+ return 800000;
+ case CLKCFG_FSB_1067:
+ return 1066667;
+ case CLKCFG_FSB_1333:
+ return 1333333;
+ default:
+ MISSING_CASE(fsb);
+ return 1333333;
+ }
+ } else {
+ switch (fsb) {
+ case CLKCFG_FSB_400_ALT:
+ return 400000;
+ case CLKCFG_FSB_533:
+ return 533333;
+ case CLKCFG_FSB_667:
+ return 666667;
+ case CLKCFG_FSB_800:
+ return 800000;
+ case CLKCFG_FSB_1067_ALT:
+ return 1066667;
+ case CLKCFG_FSB_1333_ALT:
+ return 1333333;
+ case CLKCFG_FSB_1600_ALT:
+ return 1600000;
+ default:
+ MISSING_CASE(fsb);
+ return 1333333;
+ }
+ }
+}
+
+unsigned int ilk_fsb_freq(struct drm_i915_private *i915)
+{
+ u16 fsb;
+
+ fsb = intel_uncore_read16(&i915->uncore, CSIPLL0) & 0x3ff;
+
+ switch (fsb) {
+ case 0x00c:
+ return 3200000;
+ case 0x00e:
+ return 3733333;
+ case 0x010:
+ return 4266667;
+ case 0x012:
+ return 4800000;
+ case 0x014:
+ return 5333333;
+ case 0x016:
+ return 5866667;
+ case 0x018:
+ return 6400000;
+ default:
+ drm_dbg(&i915->drm, "unknown fsb frequency 0x%04x\n", fsb);
+ return 0;
+ }
+}
+
+unsigned int ilk_mem_freq(struct drm_i915_private *i915)
+{
+ u16 ddrpll;
+
+ ddrpll = intel_uncore_read16(&i915->uncore, DDRMPLL1);
+ switch (ddrpll & 0xff) {
+ case 0xc:
+ return 800000;
+ case 0x10:
+ return 1066667;
+ case 0x14:
+ return 1333333;
+ case 0x18:
+ return 1600000;
+ default:
+ drm_dbg(&i915->drm, "unknown memory frequency 0x%02x\n",
+ ddrpll & 0xff);
+ return 0;
+ }
+}
diff --git a/drivers/gpu/drm/i915/i915_freq.h b/drivers/gpu/drm/i915/i915_freq.h
new file mode 100644
index 000000000000..53b0ecb95440
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_freq.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_FREQ_H__
+#define __I915_FREQ_H__
+
+struct drm_i915_private;
+
+unsigned int i9xx_fsb_freq(struct drm_i915_private *i915);
+unsigned int ilk_fsb_freq(struct drm_i915_private *i915);
+unsigned int ilk_mem_freq(struct drm_i915_private *i915);
+
+#endif /* __I915_FREQ_H__ */
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 3/8] drm/i915: move intel_dram.[ch] from soc/ to display/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
2025-11-13 9:57 ` [PATCH 1/8] drm/i915/edram: extract i915_edram.[ch] for edram detection Jani Nikula
2025-11-13 9:57 ` [PATCH 2/8] drm/i915: split out i915_freq.[ch] Jani Nikula
@ 2025-11-13 9:58 ` Jani Nikula
2025-11-13 9:58 ` [PATCH 4/8] drm/xe: remove MISSING_CASE() from compat i915_utils.h Jani Nikula
` (15 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
The remaining users of intel_dram.[ch] are all in display. Move them
under display.
This allows us to remove the compat soc/intel_dram.h from xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/display/i9xx_wm.c | 3 +--
drivers/gpu/drm/i915/display/intel_bw.c | 3 +--
drivers/gpu/drm/i915/display/intel_cdclk.c | 3 +--
drivers/gpu/drm/i915/display/intel_display_power.c | 3 +--
drivers/gpu/drm/i915/{soc => display}/intel_dram.c | 5 ++---
drivers/gpu/drm/i915/{soc => display}/intel_dram.h | 0
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/xe/Makefile | 2 +-
| 6 ------
drivers/gpu/drm/xe/display/xe_display.c | 2 +-
12 files changed, 11 insertions(+), 22 deletions(-)
rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (99%)
rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 6d72bbb724fa..dddc5ce76462 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -58,7 +58,6 @@ i915-y += \
# core peripheral code
i915-y += \
- soc/intel_dram.o \
soc/intel_gmch.o \
soc/intel_rom.o
@@ -268,6 +267,7 @@ i915-y += \
display/intel_dpll_mgr.o \
display/intel_dpt.o \
display/intel_dpt_common.o \
+ display/intel_dram.o \
display/intel_drrs.o \
display/intel_dsb.o \
display/intel_dsb_buffer.o \
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 01f3803fa09f..27e2d73bc505 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -7,8 +7,6 @@
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "i915_drv.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
@@ -19,6 +17,7 @@
#include "intel_display.h"
#include "intel_display_regs.h"
#include "intel_display_trace.h"
+#include "intel_dram.h"
#include "intel_fb.h"
#include "intel_mchbar_regs.h"
#include "intel_wm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 1f6461be50ef..957c90e62569 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -6,8 +6,6 @@
#include <drm/drm_atomic_state_helper.h>
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_bw.h"
@@ -16,6 +14,7 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pcode.h"
#include "intel_uncore.h"
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 37801c744b05..531819391c8c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -28,8 +28,6 @@
#include <drm/drm_fixed.h>
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "hsw_ips.h"
#include "i915_drv.h"
#include "i915_reg.h"
@@ -42,6 +40,7 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pci_config.h"
#include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 2a4cc1dcc293..df717b66d30a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -8,8 +8,6 @@
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
@@ -26,6 +24,7 @@
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_dmc.h"
+#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pch_refclk.h"
#include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
similarity index 99%
rename from drivers/gpu/drm/i915/soc/intel_dram.c
rename to drivers/gpu/drm/i915/display/intel_dram.c
index 2a21d1cf0476..8729338c6dcc 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -8,11 +8,10 @@
#include <drm/drm_managed.h>
#include <drm/drm_print.h>
-#include "../display/intel_display_core.h" /* FIXME */
-
#include "i915_drv.h"
#include "i915_reg.h"
-#include "i915_utils.h"
+#include "intel_display_core.h"
+#include "intel_display_utils.h"
#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_dram.h
rename to drivers/gpu/drm/i915/display/intel_dram.h
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 54e9e0be019d..a33e0cec8cba 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -8,7 +8,6 @@
#include <drm/drm_blend.h>
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
#include "intel_atomic.h"
@@ -23,6 +22,7 @@
#include "intel_display_rpm.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_dram.h"
#include "intel_fb.h"
#include "intel_fixed.h"
#include "intel_flipq.h"
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index f55e65e7dd4d..356f7fa5cdb8 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -59,6 +59,7 @@
#include "display/intel_dmc.h"
#include "display/intel_dp.h"
#include "display/intel_dpt.h"
+#include "display/intel_dram.h"
#include "display/intel_encoder.h"
#include "display/intel_fbdev.h"
#include "display/intel_gmbus.h"
@@ -86,7 +87,6 @@
#include "pxp/intel_pxp_debugfs.h"
#include "pxp/intel_pxp_pm.h"
-#include "soc/intel_dram.h"
#include "soc/intel_gmch.h"
#include "i915_debugfs.h"
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7b4ca591a4ae..cddd07debc3c 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -224,7 +224,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
# SOC code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
- i915-soc/intel_dram.o \
i915-soc/intel_rom.o
# Display code shared with i915
@@ -275,6 +274,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_dpll.o \
i915-display/intel_dpll_mgr.o \
i915-display/intel_dpt_common.o \
+ i915-display/intel_dram.o \
i915-display/intel_drrs.o \
i915-display/intel_dsb.o \
i915-display/intel_dsi.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
deleted file mode 100644
index 65707e20c557..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_dram.h"
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 8b0afa270216..c29f96da0617 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -17,7 +17,6 @@
#include <drm/intel/display_parent_interface.h>
#include <uapi/drm/xe_drm.h>
-#include "soc/intel_dram.h"
#include "intel_acpi.h"
#include "intel_audio.h"
#include "intel_bw.h"
@@ -29,6 +28,7 @@
#include "intel_dmc.h"
#include "intel_dmc_wl.h"
#include "intel_dp.h"
+#include "intel_dram.h"
#include "intel_encoder.h"
#include "intel_fbdev.h"
#include "intel_hdcp.h"
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 4/8] drm/xe: remove MISSING_CASE() from compat i915_utils.h
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (2 preceding siblings ...)
2025-11-13 9:58 ` [PATCH 3/8] drm/i915: move intel_dram.[ch] from soc/ to display/ Jani Nikula
@ 2025-11-13 9:58 ` Jani Nikula
2025-11-13 9:58 ` [PATCH 5/8] drm/i915/dram: convert to struct intel_display Jani Nikula
` (14 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
There are no longer users for MISSING_CASE() in the compat
i915_utils.h. Remove it to prevent new users from showing up.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
| 6 ------
1 file changed, 6 deletions(-)
--git a/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
index bcd441dc0fce..3639721f0bf8 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
@@ -3,11 +3,5 @@
* Copyright © 2023 Intel Corporation
*/
-/* for soc/ */
-#ifndef MISSING_CASE
-#define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
- __stringify(x), (long)(x))
-#endif
-
/* for a couple of users under i915/display */
#define i915_inject_probe_failure(unused) ((unused) && 0)
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 5/8] drm/i915/dram: convert to struct intel_display
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (3 preceding siblings ...)
2025-11-13 9:58 ` [PATCH 4/8] drm/xe: remove MISSING_CASE() from compat i915_utils.h Jani Nikula
@ 2025-11-13 9:58 ` Jani Nikula
2025-11-13 13:39 ` Ville Syrjälä
2025-11-13 9:58 ` [PATCH 6/8] drm/i915: move dram_info " Jani Nikula
` (13 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
Convert everything except uncore access to struct intel_display.
While at it, convert logging to drm_dbg_kms().
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
.../drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_dram.c | 195 +++++++++---------
drivers/gpu/drm/i915/display/intel_dram.h | 11 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 4 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/xe/display/xe_display.c | 2 +-
9 files changed, 115 insertions(+), 109 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 27e2d73bc505..167277cd8877 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
int i;
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 957c90e62569..d27835ed49c2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
void intel_bw_init_hw(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
if (!HAS_DISPLAY(display))
return;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 531819391c8c..5c90e53b4e46 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
static int i9xx_hrawclk(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
/* hrawclock is 1/4 the FSB frequency */
- return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
+ return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index df717b66d30a..69301aa25cfd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1617,7 +1617,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
static void tgl_bw_buddy_init(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
const struct buddy_page_mask *table;
unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
int config, i;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 8729338c6dcc..5816434cd563 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
#undef DRAM_TYPE_STR
-static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
+static enum intel_dram_type pnv_dram_type(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
}
-static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int pnv_mem_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 tmp;
tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
@@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
return 0;
}
-static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_mem_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u16 ddrpll;
ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
@@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
case 0x18:
return 1600000;
default:
- drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
- ddrpll & 0xff);
+ drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
+ ddrpll & 0xff);
return 0;
}
}
-static unsigned int chv_mem_freq(struct drm_i915_private *i915)
+static unsigned int chv_mem_freq(struct intel_display *display)
{
u32 val;
- vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
- val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
- vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
+ vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
+ val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
+ vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
switch ((val >> 2) & 0x7) {
case 3:
@@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
}
}
-static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
+static unsigned int vlv_mem_freq(struct intel_display *display)
{
u32 val;
- vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
- val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
- vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
+ vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
+ val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
+ vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
switch ((val >> 6) & 3) {
case 0:
@@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
return 0;
}
-unsigned int intel_mem_freq(struct drm_i915_private *i915)
+unsigned int intel_mem_freq(struct intel_display *display)
{
- if (IS_PINEVIEW(i915))
- return pnv_mem_freq(i915);
- else if (GRAPHICS_VER(i915) == 5)
- return ilk_mem_freq(i915);
- else if (IS_CHERRYVIEW(i915))
- return chv_mem_freq(i915);
- else if (IS_VALLEYVIEW(i915))
- return vlv_mem_freq(i915);
+ if (display->platform.pineview)
+ return pnv_mem_freq(display);
+ else if (DISPLAY_VER(display) == 5)
+ return ilk_mem_freq(display);
+ else if (display->platform.cherryview)
+ return chv_mem_freq(display);
+ else if (display->platform.valleyview)
+ return vlv_mem_freq(display);
else
return 0;
}
-static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+static unsigned int i9xx_fsb_freq(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 fsb;
/*
@@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
*/
fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
- if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+ if (display->platform.pineview || display->platform.mobile) {
switch (fsb) {
case CLKCFG_FSB_400:
return 400000;
@@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
}
}
-static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_fsb_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u16 fsb;
fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
@@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
case 0x018:
return 6400000;
default:
- drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
+ drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
return 0;
}
}
-unsigned int intel_fsb_freq(struct drm_i915_private *i915)
+unsigned int intel_fsb_freq(struct intel_display *display)
{
- if (GRAPHICS_VER(i915) == 5)
- return ilk_fsb_freq(i915);
- else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
- return i9xx_fsb_freq(i915);
+ if (DISPLAY_VER(display) == 5)
+ return ilk_fsb_freq(display);
+ else if (IS_DISPLAY_VER(display, 3, 4))
+ return i9xx_fsb_freq(display);
else
return 0;
}
-static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- dram_info->fsb_freq = intel_fsb_freq(i915);
+ dram_info->fsb_freq = intel_fsb_freq(display);
if (dram_info->fsb_freq)
- drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
+ drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
- dram_info->mem_freq = intel_mem_freq(i915);
+ dram_info->mem_freq = intel_mem_freq(display);
if (dram_info->mem_freq)
- drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
+ drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
- if (IS_PINEVIEW(i915))
- dram_info->type = pnv_dram_type(i915);
+ if (display->platform.pineview)
+ dram_info->type = pnv_dram_type(display);
return 0;
}
@@ -339,11 +345,11 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
}
static void
-skl_dram_get_dimm_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, char dimm_name, u16 val)
{
- if (GRAPHICS_VER(i915) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
dimm->size = icl_get_dimm_size(val);
dimm->width = icl_get_dimm_width(val);
dimm->ranks = icl_get_dimm_ranks(val);
@@ -353,24 +359,24 @@ skl_dram_get_dimm_info(struct drm_i915_private *i915,
dimm->ranks = skl_get_dimm_ranks(val);
}
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
str_yes_no(skl_is_16gb_dimm(dimm)));
}
static int
-skl_dram_get_channel_info(struct drm_i915_private *i915,
+skl_dram_get_channel_info(struct intel_display *display,
struct dram_channel_info *ch,
int channel, u32 val)
{
- skl_dram_get_dimm_info(i915, &ch->dimm_l,
+ skl_dram_get_dimm_info(display, &ch->dimm_l,
channel, 'L', val & 0xffff);
- skl_dram_get_dimm_info(i915, &ch->dimm_s,
+ skl_dram_get_dimm_info(display, &ch->dimm_s,
channel, 'S', val >> 16);
if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
- drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
+ drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
return -EINVAL;
}
@@ -384,7 +390,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
skl_is_16gb_dimm(&ch->dimm_s);
- drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
+ drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
return 0;
@@ -400,8 +406,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
}
static int
-skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_channel_info ch0 = {}, ch1 = {};
u32 val;
int ret;
@@ -411,23 +418,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
val = intel_uncore_read(&i915->uncore,
SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
- ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
+ ret = skl_dram_get_channel_info(display, &ch0, 0, val);
if (ret == 0)
dram_info->num_channels++;
val = intel_uncore_read(&i915->uncore,
SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
- ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
+ ret = skl_dram_get_channel_info(display, &ch1, 1, val);
if (ret == 0)
dram_info->num_channels++;
if (dram_info->num_channels == 0) {
- drm_info(&i915->drm, "Number of memory channels is zero\n");
+ drm_info(display->drm, "Number of memory channels is zero\n");
return -EINVAL;
}
if (ch0.ranks == 0 && ch1.ranks == 0) {
- drm_info(&i915->drm, "couldn't get memory rank information\n");
+ drm_info(display->drm, "couldn't get memory rank information\n");
return -EINVAL;
}
@@ -435,18 +442,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
- drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
+ drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
str_yes_no(dram_info->symmetric_memory));
- drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
+ drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
str_yes_no(dram_info->has_16gb_dimms));
return 0;
}
static enum intel_dram_type
-skl_get_dram_type(struct drm_i915_private *i915)
+skl_get_dram_type(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val;
val = intel_uncore_read(&i915->uncore,
@@ -468,13 +476,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
}
static int
-skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
int ret;
- dram_info->type = skl_get_dram_type(i915);
+ dram_info->type = skl_get_dram_type(display);
- ret = skl_dram_get_channels_info(i915, dram_info);
+ ret = skl_dram_get_channels_info(display, dram_info);
if (ret)
return ret;
@@ -559,8 +567,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
}
-static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val;
u8 valid_ranks = 0;
int i;
@@ -581,11 +590,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
bxt_get_dimm_info(&dimm, val);
type = bxt_get_dimm_type(val);
- drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
+ drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
dram_info->type != INTEL_DRAM_UNKNOWN &&
dram_info->type != type);
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
i - BXT_D_CR_DRP0_DUNIT_START,
dimm.size, dimm.width, dimm.ranks);
@@ -598,25 +607,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
}
if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
- drm_info(&i915->drm, "couldn't get memory information\n");
+ drm_info(display->drm, "couldn't get memory information\n");
return -EINVAL;
}
return 0;
}
-static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
+static int icl_pcode_read_mem_global_info(struct intel_display *display,
struct dram_info *dram_info)
{
u32 val = 0;
int ret;
- ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+ ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
if (ret)
return ret;
- if (GRAPHICS_VER(dev_priv) == 12) {
+ if (DISPLAY_VER(display) == 12) {
switch (val & 0xf) {
case 0:
dram_info->type = INTEL_DRAM_DDR4;
@@ -667,25 +676,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
return 0;
}
-static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
int ret;
- ret = skl_dram_get_channels_info(i915, dram_info);
+ ret = skl_dram_get_channels_info(display, dram_info);
if (ret)
return ret;
- return icl_pcode_read_mem_global_info(i915, dram_info);
+ return icl_pcode_read_mem_global_info(display, dram_info);
}
-static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- return icl_pcode_read_mem_global_info(i915, dram_info);
+ return icl_pcode_read_mem_global_info(display, dram_info);
}
-static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
@@ -708,11 +717,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
dram_info->type = INTEL_DRAM_LPDDR3;
break;
case 8:
- drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+ drm_WARN_ON(display->drm, !display->platform.dgfx);
dram_info->type = INTEL_DRAM_GDDR;
break;
case 9:
- drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+ drm_WARN_ON(display->drm, !display->platform.dgfx);
dram_info->type = INTEL_DRAM_GDDR_ECC;
break;
default:
@@ -730,41 +739,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
return 0;
}
-int intel_dram_detect(struct drm_i915_private *i915)
+int intel_dram_detect(struct intel_display *display)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_info *dram_info;
int ret;
- if (IS_DG2(i915) || !intel_display_device_present(display))
+ if (display->platform.dg2 || !HAS_DISPLAY(display))
return 0;
- dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
+ dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
if (!dram_info)
return -ENOMEM;
i915->dram_info = dram_info;
if (DISPLAY_VER(display) >= 14)
- ret = xelpdp_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 12)
- ret = gen12_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 11)
- ret = gen11_get_dram_info(i915, dram_info);
- else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
- ret = bxt_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 9)
- ret = skl_get_dram_info(i915, dram_info);
+ ret = xelpdp_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 12)
+ ret = gen12_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 11)
+ ret = gen11_get_dram_info(display, dram_info);
+ else if (display->platform.broxton || display->platform.geminilake)
+ ret = bxt_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 9)
+ ret = skl_get_dram_info(display, dram_info);
else
- ret = i915_get_dram_info(i915, dram_info);
+ ret = i915_get_dram_info(display, dram_info);
- drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
+ drm_dbg_kms(display->drm, "DRAM type: %s\n",
intel_dram_type_str(dram_info->type));
- drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
+ drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
- drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
- drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
+ drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
+ drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
/* TODO: Do we want to abort probe on dram detection failures? */
if (ret)
@@ -778,9 +787,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
* checks, and prefer not dereferencing on platforms that shouldn't look at dram
* info, to catch accidental and incorrect dram info checks.
*/
-const struct dram_info *intel_dram_info(struct drm_device *drm)
+const struct dram_info *intel_dram_info(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(drm);
+ struct drm_i915_private *i915 = to_i915(display->drm);
return i915->dram_info;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
index 58aaf2f91afe..5800b7b4e614 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.h
+++ b/drivers/gpu/drm/i915/display/intel_dram.h
@@ -8,8 +8,7 @@
#include <linux/types.h>
-struct drm_i915_private;
-struct drm_device;
+struct intel_display;
struct dram_info {
enum intel_dram_type {
@@ -35,10 +34,10 @@ struct dram_info {
bool has_16gb_dimms;
};
-int intel_dram_detect(struct drm_i915_private *i915);
-unsigned int intel_fsb_freq(struct drm_i915_private *i915);
-unsigned int intel_mem_freq(struct drm_i915_private *i915);
-const struct dram_info *intel_dram_info(struct drm_device *drm);
+int intel_dram_detect(struct intel_display *display);
+unsigned int intel_fsb_freq(struct intel_display *display);
+unsigned int intel_mem_freq(struct intel_display *display);
+const struct dram_info *intel_dram_info(struct intel_display *display);
const char *intel_dram_type_str(enum intel_dram_type type);
#endif /* __INTEL_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a33e0cec8cba..7964cfffdaae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
if (display->platform.kabylake ||
display->platform.coffeelake ||
display->platform.cometlake) {
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
return dram_info->symmetric_memory;
}
@@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
static bool need_16gb_dimm_wa(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
return (display->platform.skylake || display->platform.kabylake ||
display->platform.coffeelake || display->platform.cometlake ||
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 356f7fa5cdb8..1dc6ba4cf5a9 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -573,7 +573,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
* Fill the dram structure to get the system dram info. This will be
* used for memory latency calculation.
*/
- ret = intel_dram_detect(dev_priv);
+ ret = intel_dram_detect(display);
if (ret)
goto err_opregion;
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index c29f96da0617..1127a699cded 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
* Fill the dram structure to get the system dram info. This will be
* used for memory latency calculation.
*/
- err = intel_dram_detect(xe);
+ err = intel_dram_detect(display);
if (err)
goto err_opregion;
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 5/8] drm/i915/dram: convert to struct intel_display
2025-11-13 9:58 ` [PATCH 5/8] drm/i915/dram: convert to struct intel_display Jani Nikula
@ 2025-11-13 13:39 ` Ville Syrjälä
2025-11-13 13:45 ` Jani Nikula
0 siblings, 1 reply; 28+ messages in thread
From: Ville Syrjälä @ 2025-11-13 13:39 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, uma.shankar
On Thu, Nov 13, 2025 at 11:58:02AM +0200, Jani Nikula wrote:
> Convert everything except uncore access to struct intel_display.
>
> While at it, convert logging to drm_dbg_kms().
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
> .../drm/i915/display/intel_display_power.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dram.c | 195 +++++++++---------
> drivers/gpu/drm/i915/display/intel_dram.h | 11 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 4 +-
> drivers/gpu/drm/i915/i915_driver.c | 2 +-
> drivers/gpu/drm/xe/display/xe_display.c | 2 +-
> 9 files changed, 115 insertions(+), 109 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 27e2d73bc505..167277cd8877 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
>
> static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
> bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
> int i;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 957c90e62569..d27835ed49c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
>
> void intel_bw_init_hw(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
>
> if (!HAS_DISPLAY(display))
> return;
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 531819391c8c..5c90e53b4e46 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
>
> static int i9xx_hrawclk(struct intel_display *display)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> -
> /* hrawclock is 1/4 the FSB frequency */
> - return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
> + return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index df717b66d30a..69301aa25cfd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1617,7 +1617,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
>
> static void tgl_bw_buddy_init(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
> const struct buddy_page_mask *table;
> unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
> int config, i;
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> index 8729338c6dcc..5816434cd563 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.c
> +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> @@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
>
> #undef DRAM_TYPE_STR
>
> -static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
> +static enum intel_dram_type pnv_dram_type(struct intel_display *display)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> +
> return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
> INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
> }
>
> -static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> +static unsigned int pnv_mem_freq(struct intel_display *display)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 tmp;
>
> tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
> @@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> return 0;
> }
>
> -static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> +static unsigned int ilk_mem_freq(struct intel_display *display)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u16 ddrpll;
>
> ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
> @@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> case 0x18:
> return 1600000;
> default:
> - drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
> - ddrpll & 0xff);
> + drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
> + ddrpll & 0xff);
> return 0;
> }
> }
>
> -static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> +static unsigned int chv_mem_freq(struct intel_display *display)
> {
> u32 val;
>
> - vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> - val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> - vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> + vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
> + val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> + vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
>
> switch ((val >> 2) & 0x7) {
> case 3:
> @@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> }
> }
>
> -static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> +static unsigned int vlv_mem_freq(struct intel_display *display)
> {
> u32 val;
>
> - vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> - val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> - vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> + vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> + val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> + vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
>
> switch ((val >> 6) & 3) {
> case 0:
> @@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> return 0;
> }
>
> -unsigned int intel_mem_freq(struct drm_i915_private *i915)
> +unsigned int intel_mem_freq(struct intel_display *display)
> {
> - if (IS_PINEVIEW(i915))
> - return pnv_mem_freq(i915);
> - else if (GRAPHICS_VER(i915) == 5)
> - return ilk_mem_freq(i915);
> - else if (IS_CHERRYVIEW(i915))
> - return chv_mem_freq(i915);
> - else if (IS_VALLEYVIEW(i915))
> - return vlv_mem_freq(i915);
> + if (display->platform.pineview)
> + return pnv_mem_freq(display);
> + else if (DISPLAY_VER(display) == 5)
> + return ilk_mem_freq(display);
> + else if (display->platform.cherryview)
> + return chv_mem_freq(display);
> + else if (display->platform.valleyview)
> + return vlv_mem_freq(display);
> else
> return 0;
> }
>
> -static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> +static unsigned int i9xx_fsb_freq(struct intel_display *display)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 fsb;
>
> /*
> @@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> */
> fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
>
> - if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
> + if (display->platform.pineview || display->platform.mobile) {
> switch (fsb) {
> case CLKCFG_FSB_400:
> return 400000;
> @@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> }
> }
>
> -static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> +static unsigned int ilk_fsb_freq(struct intel_display *display)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u16 fsb;
>
> fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
> @@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> case 0x018:
> return 6400000;
> default:
> - drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
> + drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
> return 0;
> }
> }
>
> -unsigned int intel_fsb_freq(struct drm_i915_private *i915)
> +unsigned int intel_fsb_freq(struct intel_display *display)
> {
> - if (GRAPHICS_VER(i915) == 5)
> - return ilk_fsb_freq(i915);
> - else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
> - return i9xx_fsb_freq(i915);
> + if (DISPLAY_VER(display) == 5)
> + return ilk_fsb_freq(display);
> + else if (IS_DISPLAY_VER(display, 3, 4))
> + return i9xx_fsb_freq(display);
> else
> return 0;
> }
>
> -static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> - dram_info->fsb_freq = intel_fsb_freq(i915);
> + dram_info->fsb_freq = intel_fsb_freq(display);
> if (dram_info->fsb_freq)
> - drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> + drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
>
> - dram_info->mem_freq = intel_mem_freq(i915);
> + dram_info->mem_freq = intel_mem_freq(display);
> if (dram_info->mem_freq)
> - drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> + drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
>
> - if (IS_PINEVIEW(i915))
> - dram_info->type = pnv_dram_type(i915);
> + if (display->platform.pineview)
> + dram_info->type = pnv_dram_type(display);
>
> return 0;
> }
> @@ -339,11 +345,11 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
> }
>
> static void
> -skl_dram_get_dimm_info(struct drm_i915_private *i915,
> +skl_dram_get_dimm_info(struct intel_display *display,
> struct dram_dimm_info *dimm,
> int channel, char dimm_name, u16 val)
> {
> - if (GRAPHICS_VER(i915) >= 11) {
> + if (DISPLAY_VER(display) >= 11) {
> dimm->size = icl_get_dimm_size(val);
> dimm->width = icl_get_dimm_width(val);
> dimm->ranks = icl_get_dimm_ranks(val);
> @@ -353,24 +359,24 @@ skl_dram_get_dimm_info(struct drm_i915_private *i915,
> dimm->ranks = skl_get_dimm_ranks(val);
> }
>
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
> channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
> str_yes_no(skl_is_16gb_dimm(dimm)));
> }
>
> static int
> -skl_dram_get_channel_info(struct drm_i915_private *i915,
> +skl_dram_get_channel_info(struct intel_display *display,
> struct dram_channel_info *ch,
> int channel, u32 val)
> {
> - skl_dram_get_dimm_info(i915, &ch->dimm_l,
> + skl_dram_get_dimm_info(display, &ch->dimm_l,
> channel, 'L', val & 0xffff);
> - skl_dram_get_dimm_info(i915, &ch->dimm_s,
> + skl_dram_get_dimm_info(display, &ch->dimm_s,
> channel, 'S', val >> 16);
>
> if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
> - drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
> + drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
> return -EINVAL;
> }
>
> @@ -384,7 +390,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
> ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
> skl_is_16gb_dimm(&ch->dimm_s);
>
> - drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> + drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
>
> return 0;
> @@ -400,8 +406,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
> }
>
> static int
> -skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> struct dram_channel_info ch0 = {}, ch1 = {};
> u32 val;
> int ret;
> @@ -411,23 +418,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>
> val = intel_uncore_read(&i915->uncore,
> SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> - ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
> + ret = skl_dram_get_channel_info(display, &ch0, 0, val);
> if (ret == 0)
> dram_info->num_channels++;
>
> val = intel_uncore_read(&i915->uncore,
> SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> - ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
> + ret = skl_dram_get_channel_info(display, &ch1, 1, val);
> if (ret == 0)
> dram_info->num_channels++;
>
> if (dram_info->num_channels == 0) {
> - drm_info(&i915->drm, "Number of memory channels is zero\n");
> + drm_info(display->drm, "Number of memory channels is zero\n");
> return -EINVAL;
> }
>
> if (ch0.ranks == 0 && ch1.ranks == 0) {
> - drm_info(&i915->drm, "couldn't get memory rank information\n");
> + drm_info(display->drm, "couldn't get memory rank information\n");
> return -EINVAL;
> }
>
> @@ -435,18 +442,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>
> dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
>
> - drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
> + drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
> str_yes_no(dram_info->symmetric_memory));
>
> - drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
> + drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
> str_yes_no(dram_info->has_16gb_dimms));
>
> return 0;
> }
>
> static enum intel_dram_type
> -skl_get_dram_type(struct drm_i915_private *i915)
> +skl_get_dram_type(struct intel_display *display)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 val;
>
> val = intel_uncore_read(&i915->uncore,
> @@ -468,13 +476,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
> }
>
> static int
> -skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> int ret;
>
> - dram_info->type = skl_get_dram_type(i915);
> + dram_info->type = skl_get_dram_type(display);
>
> - ret = skl_dram_get_channels_info(i915, dram_info);
> + ret = skl_dram_get_channels_info(display, dram_info);
> if (ret)
> return ret;
>
> @@ -559,8 +567,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
> dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
> }
>
> -static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 val;
> u8 valid_ranks = 0;
> int i;
> @@ -581,11 +590,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> bxt_get_dimm_info(&dimm, val);
> type = bxt_get_dimm_type(val);
>
> - drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
> + drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
> dram_info->type != INTEL_DRAM_UNKNOWN &&
> dram_info->type != type);
>
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
> i - BXT_D_CR_DRP0_DUNIT_START,
> dimm.size, dimm.width, dimm.ranks);
> @@ -598,25 +607,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> }
>
> if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
> - drm_info(&i915->drm, "couldn't get memory information\n");
> + drm_info(display->drm, "couldn't get memory information\n");
> return -EINVAL;
> }
>
> return 0;
> }
>
> -static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> +static int icl_pcode_read_mem_global_info(struct intel_display *display,
> struct dram_info *dram_info)
> {
> u32 val = 0;
> int ret;
>
> - ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> + ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
> if (ret)
> return ret;
>
> - if (GRAPHICS_VER(dev_priv) == 12) {
> + if (DISPLAY_VER(display) == 12) {
> switch (val & 0xf) {
> case 0:
> dram_info->type = INTEL_DRAM_DDR4;
> @@ -667,25 +676,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> return 0;
> }
>
> -static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> int ret;
>
> - ret = skl_dram_get_channels_info(i915, dram_info);
> + ret = skl_dram_get_channels_info(display, dram_info);
> if (ret)
> return ret;
>
> - return icl_pcode_read_mem_global_info(i915, dram_info);
> + return icl_pcode_read_mem_global_info(display, dram_info);
> }
>
> -static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> - return icl_pcode_read_mem_global_info(i915, dram_info);
> + return icl_pcode_read_mem_global_info(display, dram_info);
> }
>
> -static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> - struct intel_display *display = i915->display;
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
>
> switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
> @@ -708,11 +717,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> dram_info->type = INTEL_DRAM_LPDDR3;
> break;
> case 8:
> - drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> + drm_WARN_ON(display->drm, !display->platform.dgfx);
> dram_info->type = INTEL_DRAM_GDDR;
> break;
> case 9:
> - drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> + drm_WARN_ON(display->drm, !display->platform.dgfx);
> dram_info->type = INTEL_DRAM_GDDR_ECC;
> break;
> default:
> @@ -730,41 +739,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> return 0;
> }
>
> -int intel_dram_detect(struct drm_i915_private *i915)
> +int intel_dram_detect(struct intel_display *display)
> {
> - struct intel_display *display = i915->display;
> + struct drm_i915_private *i915 = to_i915(display->drm);
> struct dram_info *dram_info;
> int ret;
>
> - if (IS_DG2(i915) || !intel_display_device_present(display))
> + if (display->platform.dg2 || !HAS_DISPLAY(display))
> return 0;
>
> - dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
> + dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
> if (!dram_info)
> return -ENOMEM;
>
> i915->dram_info = dram_info;
>
> if (DISPLAY_VER(display) >= 14)
> - ret = xelpdp_get_dram_info(i915, dram_info);
> - else if (GRAPHICS_VER(i915) >= 12)
> - ret = gen12_get_dram_info(i915, dram_info);
> - else if (GRAPHICS_VER(i915) >= 11)
> - ret = gen11_get_dram_info(i915, dram_info);
> - else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
> - ret = bxt_get_dram_info(i915, dram_info);
> - else if (GRAPHICS_VER(i915) >= 9)
> - ret = skl_get_dram_info(i915, dram_info);
> + ret = xelpdp_get_dram_info(display, dram_info);
> + else if (DISPLAY_VER(display) >= 12)
> + ret = gen12_get_dram_info(display, dram_info);
I was wondering if we have any situations here where the display
vs. graphics ver differs, but can't immediately think of anything
that would go wrong here. So seems fine.
I think we should land https://patchwork.freedesktop.org/series/156793/
before this one though, just in case we late discover that we need
a stable backport of it.
> + else if (DISPLAY_VER(display) >= 11)
> + ret = gen11_get_dram_info(display, dram_info);
> + else if (display->platform.broxton || display->platform.geminilake)
> + ret = bxt_get_dram_info(display, dram_info);
> + else if (DISPLAY_VER(display) >= 9)
> + ret = skl_get_dram_info(display, dram_info);
> else
> - ret = i915_get_dram_info(i915, dram_info);
> + ret = i915_get_dram_info(display, dram_info);
>
> - drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
> + drm_dbg_kms(display->drm, "DRAM type: %s\n",
> intel_dram_type_str(dram_info->type));
>
> - drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
> + drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
>
> - drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> - drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> + drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> + drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
>
> /* TODO: Do we want to abort probe on dram detection failures? */
> if (ret)
> @@ -778,9 +787,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
> * checks, and prefer not dereferencing on platforms that shouldn't look at dram
> * info, to catch accidental and incorrect dram info checks.
> */
> -const struct dram_info *intel_dram_info(struct drm_device *drm)
> +const struct dram_info *intel_dram_info(struct intel_display *display)
> {
> - struct drm_i915_private *i915 = to_i915(drm);
> + struct drm_i915_private *i915 = to_i915(display->drm);
>
> return i915->dram_info;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
> index 58aaf2f91afe..5800b7b4e614 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.h
> +++ b/drivers/gpu/drm/i915/display/intel_dram.h
> @@ -8,8 +8,7 @@
>
> #include <linux/types.h>
>
> -struct drm_i915_private;
> -struct drm_device;
> +struct intel_display;
>
> struct dram_info {
> enum intel_dram_type {
> @@ -35,10 +34,10 @@ struct dram_info {
> bool has_16gb_dimms;
> };
>
> -int intel_dram_detect(struct drm_i915_private *i915);
> -unsigned int intel_fsb_freq(struct drm_i915_private *i915);
> -unsigned int intel_mem_freq(struct drm_i915_private *i915);
> -const struct dram_info *intel_dram_info(struct drm_device *drm);
> +int intel_dram_detect(struct intel_display *display);
> +unsigned int intel_fsb_freq(struct intel_display *display);
> +unsigned int intel_mem_freq(struct intel_display *display);
> +const struct dram_info *intel_dram_info(struct intel_display *display);
> const char *intel_dram_type_str(enum intel_dram_type type);
>
> #endif /* __INTEL_DRAM_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index a33e0cec8cba..7964cfffdaae 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
> if (display->platform.kabylake ||
> display->platform.coffeelake ||
> display->platform.cometlake) {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
>
> return dram_info->symmetric_memory;
> }
> @@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
>
> static bool need_16gb_dimm_wa(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
>
> return (display->platform.skylake || display->platform.kabylake ||
> display->platform.coffeelake || display->platform.cometlake ||
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 356f7fa5cdb8..1dc6ba4cf5a9 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -573,7 +573,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
> * Fill the dram structure to get the system dram info. This will be
> * used for memory latency calculation.
> */
> - ret = intel_dram_detect(dev_priv);
> + ret = intel_dram_detect(display);
> if (ret)
> goto err_opregion;
>
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index c29f96da0617..1127a699cded 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
> * Fill the dram structure to get the system dram info. This will be
> * used for memory latency calculation.
> */
> - err = intel_dram_detect(xe);
> + err = intel_dram_detect(display);
> if (err)
> goto err_opregion;
>
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 6/8] drm/i915: move dram_info to struct intel_display
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (4 preceding siblings ...)
2025-11-13 9:58 ` [PATCH 5/8] drm/i915/dram: convert to struct intel_display Jani Nikula
@ 2025-11-13 9:58 ` Jani Nikula
2025-11-13 9:58 ` [PATCH 7/8] drm/i915: move intel_rom.[ch] from soc/ to display/ Jani Nikula
` (12 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
With all of dram code under display, also move dram_info to struct
intel_display.
This further cleans up struct xe_device from display related members.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++++
drivers/gpu/drm/i915/display/intel_dram.c | 7 ++-----
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/xe/xe_device_types.h | 2 --
4 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9b8414b77c15..9b36654b593d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -394,6 +394,10 @@ struct intel_display {
u32 mmio_base;
} dsi;
+ struct {
+ const struct dram_info *info;
+ } dram;
+
struct {
/* list of fbdev register on this device */
struct intel_fbdev *fbdev;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 5816434cd563..f3acd623a204 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -741,7 +741,6 @@ static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info
int intel_dram_detect(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_info *dram_info;
int ret;
@@ -752,7 +751,7 @@ int intel_dram_detect(struct intel_display *display)
if (!dram_info)
return -ENOMEM;
- i915->dram_info = dram_info;
+ display->dram.info = dram_info;
if (DISPLAY_VER(display) >= 14)
ret = xelpdp_get_dram_info(display, dram_info);
@@ -789,7 +788,5 @@ int intel_dram_detect(struct intel_display *display)
*/
const struct dram_info *intel_dram_info(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
- return i915->dram_info;
+ return display->dram.info;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5381a934a671..96af7776bee5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -60,7 +60,6 @@
#include "intel_step.h"
#include "intel_uncore.h"
-struct dram_info;
struct drm_i915_clock_gating_funcs;
struct intel_display;
struct intel_pxp;
@@ -279,8 +278,6 @@ struct drm_i915_private {
u32 suspend_count;
struct vlv_s0ix_state *vlv_s0ix_state;
- const struct dram_info *dram_info;
-
struct intel_runtime_pm runtime_pm;
struct i915_perf perf;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a072c020b84b..6ce3247d1bd8 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -35,7 +35,6 @@
#define TEST_VM_OPS_ERROR
#endif
-struct dram_info;
struct intel_display;
struct intel_dg_nvm_dev;
struct xe_ggtt;
@@ -648,7 +647,6 @@ struct xe_device {
* drm_i915_private during build. After cleanup these should go away,
* migrating to the right sub-structs
*/
- const struct dram_info *dram_info;
struct intel_uncore {
spinlock_t lock;
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 7/8] drm/i915: move intel_rom.[ch] from soc/ to display/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (5 preceding siblings ...)
2025-11-13 9:58 ` [PATCH 6/8] drm/i915: move dram_info " Jani Nikula
@ 2025-11-13 9:58 ` Jani Nikula
2025-11-13 9:58 ` [PATCH 8/8] drm/xe: remove remaining platform checks from compat i915_drv.h Jani Nikula
` (11 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
The sole user of intel_rom.[ch] has always been in display. Move them
under display.
This allows us to remove the compat soc/intel_rom.h from xe, as well as
the Makefile rules to build anything from soc/.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 4 ++--
drivers/gpu/drm/i915/display/intel_bios.c | 3 +--
drivers/gpu/drm/i915/{soc => display}/intel_rom.c | 0
drivers/gpu/drm/i915/{soc => display}/intel_rom.h | 0
drivers/gpu/drm/xe/Makefile | 10 +---------
| 6 ------
6 files changed, 4 insertions(+), 19 deletions(-)
rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index dddc5ce76462..c7ef64b8f99a 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -58,8 +58,7 @@ i915-y += \
# core peripheral code
i915-y += \
- soc/intel_gmch.o \
- soc/intel_rom.o
+ soc/intel_gmch.o
# core library code
i915-y += \
@@ -302,6 +301,7 @@ i915-y += \
display/intel_pmdemand.o \
display/intel_psr.o \
display/intel_quirks.o \
+ display/intel_rom.o \
display/intel_sbi.o \
display/intel_sprite.o \
display/intel_sprite_uapi.o \
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4b41068e9e35..a639c5eb3245 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -34,14 +34,13 @@
#include <drm/drm_fixed.h>
#include <drm/drm_print.h>
-#include "soc/intel_rom.h"
-
#include "intel_display.h"
#include "intel_display_core.h"
#include "intel_display_rpm.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_gmbus.h"
+#include "intel_rom.h"
#define _INTEL_BIOS_PRIVATE
#include "intel_vbt_defs.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_rom.c b/drivers/gpu/drm/i915/display/intel_rom.c
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_rom.c
rename to drivers/gpu/drm/i915/display/intel_rom.c
diff --git a/drivers/gpu/drm/i915/soc/intel_rom.h b/drivers/gpu/drm/i915/display/intel_rom.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_rom.h
rename to drivers/gpu/drm/i915/display/intel_rom.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index cddd07debc3c..7d0d4c780145 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -194,11 +194,6 @@ subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
-I$(srctree)/drivers/gpu/drm/i915/display/ \
-Ddrm_i915_private=xe_device
-# Rule to build SOC code shared with i915
-$(obj)/i915-soc/%.o: $(srctree)/drivers/gpu/drm/i915/soc/%.c FORCE
- $(call cmd,force_checksrc)
- $(call if_changed_rule,cc_o_c)
-
# Rule to build display code shared with i915
$(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
$(call cmd,force_checksrc)
@@ -222,10 +217,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_stolen.o \
display/xe_tdf.o
-# SOC code shared with i915
-xe-$(CONFIG_DRM_XE_DISPLAY) += \
- i915-soc/intel_rom.o
-
# Display code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/icl_dsi.o \
@@ -310,6 +301,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_psr.o \
i915-display/intel_qp_tables.o \
i915-display/intel_quirks.o \
+ i915-display/intel_rom.o \
i915-display/intel_snps_hdmi_pll.o \
i915-display/intel_snps_phy.o \
i915-display/intel_tc.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
deleted file mode 100644
index 05cbfb697b2b..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2024 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_rom.h"
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 8/8] drm/xe: remove remaining platform checks from compat i915_drv.h
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (6 preceding siblings ...)
2025-11-13 9:58 ` [PATCH 7/8] drm/i915: move intel_rom.[ch] from soc/ to display/ Jani Nikula
@ 2025-11-13 9:58 ` Jani Nikula
2025-11-13 10:06 ` ✗ CI.checkpatch: warning for drm/i915: start dissolving soc/ Patchwork
` (10 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 9:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala, uma.shankar
With xe no longer building anything from soc/, we can remove the compat
platform checks from i915_drv.h, reducing the file to just the to_i915()
pointer conversion helper.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
| 15 ---------------
1 file changed, 15 deletions(-)
--git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 3e79a74ff7de..04d1925f9a19 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -19,19 +19,4 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
return container_of(dev, struct drm_i915_private, drm);
}
-/* compat platform checks only for soc/ usage */
-#define IS_PLATFORM(xe, x) ((xe)->info.platform == x)
-#define IS_I915G(dev_priv) (dev_priv && 0)
-#define IS_I915GM(dev_priv) (dev_priv && 0)
-#define IS_PINEVIEW(dev_priv) (dev_priv && 0)
-#define IS_VALLEYVIEW(dev_priv) (dev_priv && 0)
-#define IS_CHERRYVIEW(dev_priv) (dev_priv && 0)
-#define IS_HASWELL(dev_priv) (dev_priv && 0)
-#define IS_BROADWELL(dev_priv) (dev_priv && 0)
-#define IS_BROXTON(dev_priv) (dev_priv && 0)
-#define IS_GEMINILAKE(dev_priv) (dev_priv && 0)
-#define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, XE_DG2)
-
-#define IS_MOBILE(xe) (xe && 0)
-
#endif
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* ✗ CI.checkpatch: warning for drm/i915: start dissolving soc/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (7 preceding siblings ...)
2025-11-13 9:58 ` [PATCH 8/8] drm/xe: remove remaining platform checks from compat i915_drv.h Jani Nikula
@ 2025-11-13 10:06 ` Patchwork
2025-11-13 10:08 ` ✓ CI.KUnit: success " Patchwork
` (9 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2025-11-13 10:06 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: start dissolving soc/
URL : https://patchwork.freedesktop.org/series/157488/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
d9120d4d84745cf011b4b3efb338747e69179dfb
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ddd84eee03b944375f97572c104f377e48e488cb
Author: Jani Nikula <jani.nikula@intel.com>
Date: Thu Nov 13 11:58:05 2025 +0200
drm/xe: remove remaining platform checks from compat i915_drv.h
With xe no longer building anything from soc/, we can remove the compat
platform checks from i915_drv.h, reducing the file to just the to_i915()
pointer conversion helper.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch fb991a463f083eaadee5e0de96929117bc9016d4 drm-intel
b62495777e49 drm/i915/edram: extract i915_edram.[ch] for edram detection
-:48: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 99 lines checked
78e1573e3fc8 drm/i915: split out i915_freq.[ch]
-:82: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#82:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 172 lines checked
d967cc46e000 drm/i915: move intel_dram.[ch] from soc/ to display/
-:119: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#119:
rename from drivers/gpu/drm/i915/soc/intel_dram.c
total: 0 errors, 1 warnings, 0 checks, 143 lines checked
ac40c554d493 drm/xe: remove MISSING_CASE() from compat i915_utils.h
434d64b9cc71 drm/i915/dram: convert to struct intel_display
eb0174c6e251 drm/i915: move dram_info to struct intel_display
35faae568bcf drm/i915: move intel_rom.[ch] from soc/ to display/
-:58: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#58:
rename from drivers/gpu/drm/i915/soc/intel_rom.c
total: 0 errors, 1 warnings, 0 checks, 59 lines checked
ddd84eee03b9 drm/xe: remove remaining platform checks from compat i915_drv.h
^ permalink raw reply [flat|nested] 28+ messages in thread* ✓ CI.KUnit: success for drm/i915: start dissolving soc/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (8 preceding siblings ...)
2025-11-13 10:06 ` ✗ CI.checkpatch: warning for drm/i915: start dissolving soc/ Patchwork
@ 2025-11-13 10:08 ` Patchwork
2025-11-13 10:30 ` ✗ CI.checksparse: warning " Patchwork
` (8 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2025-11-13 10:08 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: start dissolving soc/
URL : https://patchwork.freedesktop.org/series/157488/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:06:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:06:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:07:11] Starting KUnit Kernel (1/1)...
[10:07:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:07:11] ================== guc_buf (11 subtests) ===================
[10:07:11] [PASSED] test_smallest
[10:07:11] [PASSED] test_largest
[10:07:11] [PASSED] test_granular
[10:07:11] [PASSED] test_unique
[10:07:11] [PASSED] test_overlap
[10:07:11] [PASSED] test_reusable
[10:07:11] [PASSED] test_too_big
[10:07:11] [PASSED] test_flush
[10:07:11] [PASSED] test_lookup
[10:07:11] [PASSED] test_data
[10:07:11] [PASSED] test_class
[10:07:11] ===================== [PASSED] guc_buf =====================
[10:07:11] =================== guc_dbm (7 subtests) ===================
[10:07:11] [PASSED] test_empty
[10:07:11] [PASSED] test_default
[10:07:11] ======================== test_size ========================
[10:07:11] [PASSED] 4
[10:07:11] [PASSED] 8
[10:07:11] [PASSED] 32
[10:07:11] [PASSED] 256
[10:07:11] ==================== [PASSED] test_size ====================
[10:07:11] ======================= test_reuse ========================
[10:07:11] [PASSED] 4
[10:07:11] [PASSED] 8
[10:07:11] [PASSED] 32
[10:07:11] [PASSED] 256
[10:07:11] =================== [PASSED] test_reuse ====================
[10:07:11] =================== test_range_overlap ====================
[10:07:11] [PASSED] 4
[10:07:11] [PASSED] 8
[10:07:11] [PASSED] 32
[10:07:11] [PASSED] 256
[10:07:11] =============== [PASSED] test_range_overlap ================
[10:07:11] =================== test_range_compact ====================
[10:07:11] [PASSED] 4
[10:07:11] [PASSED] 8
[10:07:11] [PASSED] 32
[10:07:11] [PASSED] 256
[10:07:11] =============== [PASSED] test_range_compact ================
[10:07:11] ==================== test_range_spare =====================
[10:07:11] [PASSED] 4
[10:07:11] [PASSED] 8
[10:07:11] [PASSED] 32
[10:07:11] [PASSED] 256
[10:07:11] ================ [PASSED] test_range_spare =================
[10:07:11] ===================== [PASSED] guc_dbm =====================
[10:07:11] =================== guc_idm (6 subtests) ===================
[10:07:11] [PASSED] bad_init
[10:07:11] [PASSED] no_init
[10:07:11] [PASSED] init_fini
[10:07:11] [PASSED] check_used
[10:07:11] [PASSED] check_quota
[10:07:11] [PASSED] check_all
[10:07:11] ===================== [PASSED] guc_idm =====================
[10:07:11] ================== no_relay (3 subtests) ===================
[10:07:11] [PASSED] xe_drops_guc2pf_if_not_ready
[10:07:11] [PASSED] xe_drops_guc2vf_if_not_ready
[10:07:11] [PASSED] xe_rejects_send_if_not_ready
[10:07:11] ==================== [PASSED] no_relay =====================
[10:07:11] ================== pf_relay (14 subtests) ==================
[10:07:11] [PASSED] pf_rejects_guc2pf_too_short
[10:07:11] [PASSED] pf_rejects_guc2pf_too_long
[10:07:11] [PASSED] pf_rejects_guc2pf_no_payload
[10:07:11] [PASSED] pf_fails_no_payload
[10:07:11] [PASSED] pf_fails_bad_origin
[10:07:11] [PASSED] pf_fails_bad_type
[10:07:11] [PASSED] pf_txn_reports_error
[10:07:11] [PASSED] pf_txn_sends_pf2guc
[10:07:11] [PASSED] pf_sends_pf2guc
[10:07:11] [SKIPPED] pf_loopback_nop
[10:07:11] [SKIPPED] pf_loopback_echo
[10:07:11] [SKIPPED] pf_loopback_fail
[10:07:11] [SKIPPED] pf_loopback_busy
[10:07:11] [SKIPPED] pf_loopback_retry
[10:07:11] ==================== [PASSED] pf_relay =====================
[10:07:11] ================== vf_relay (3 subtests) ===================
[10:07:11] [PASSED] vf_rejects_guc2vf_too_short
[10:07:11] [PASSED] vf_rejects_guc2vf_too_long
[10:07:11] [PASSED] vf_rejects_guc2vf_no_payload
[10:07:11] ==================== [PASSED] vf_relay =====================
[10:07:11] ================ pf_gt_config (4 subtests) =================
[10:07:11] [PASSED] fair_contexts_1vf
[10:07:11] [PASSED] fair_doorbells_1vf
[10:07:11] ====================== fair_contexts ======================
[10:07:11] [PASSED] 1 VF
[10:07:11] [PASSED] 2 VFs
[10:07:11] [PASSED] 3 VFs
[10:07:11] [PASSED] 4 VFs
[10:07:11] [PASSED] 5 VFs
[10:07:11] [PASSED] 6 VFs
[10:07:11] [PASSED] 7 VFs
[10:07:11] [PASSED] 8 VFs
[10:07:11] [PASSED] 9 VFs
[10:07:11] [PASSED] 10 VFs
[10:07:11] [PASSED] 11 VFs
[10:07:11] [PASSED] 12 VFs
[10:07:11] [PASSED] 13 VFs
[10:07:11] [PASSED] 14 VFs
[10:07:11] [PASSED] 15 VFs
[10:07:11] [PASSED] 16 VFs
[10:07:11] [PASSED] 17 VFs
[10:07:11] [PASSED] 18 VFs
[10:07:11] [PASSED] 19 VFs
[10:07:11] [PASSED] 20 VFs
[10:07:11] [PASSED] 21 VFs
[10:07:11] [PASSED] 22 VFs
[10:07:11] [PASSED] 23 VFs
[10:07:11] [PASSED] 24 VFs
[10:07:11] [PASSED] 25 VFs
[10:07:11] [PASSED] 26 VFs
[10:07:11] [PASSED] 27 VFs
[10:07:11] [PASSED] 28 VFs
[10:07:11] [PASSED] 29 VFs
[10:07:11] [PASSED] 30 VFs
[10:07:11] [PASSED] 31 VFs
[10:07:11] [PASSED] 32 VFs
[10:07:11] [PASSED] 33 VFs
[10:07:11] [PASSED] 34 VFs
[10:07:11] [PASSED] 35 VFs
[10:07:11] [PASSED] 36 VFs
[10:07:11] [PASSED] 37 VFs
[10:07:11] [PASSED] 38 VFs
[10:07:11] [PASSED] 39 VFs
[10:07:11] [PASSED] 40 VFs
[10:07:11] [PASSED] 41 VFs
[10:07:11] [PASSED] 42 VFs
[10:07:11] [PASSED] 43 VFs
[10:07:11] [PASSED] 44 VFs
[10:07:11] [PASSED] 45 VFs
[10:07:11] [PASSED] 46 VFs
[10:07:11] [PASSED] 47 VFs
[10:07:11] [PASSED] 48 VFs
[10:07:11] [PASSED] 49 VFs
[10:07:11] [PASSED] 50 VFs
[10:07:11] [PASSED] 51 VFs
[10:07:11] [PASSED] 52 VFs
[10:07:11] [PASSED] 53 VFs
[10:07:11] [PASSED] 54 VFs
[10:07:11] [PASSED] 55 VFs
[10:07:11] [PASSED] 56 VFs
[10:07:11] [PASSED] 57 VFs
[10:07:11] [PASSED] 58 VFs
[10:07:11] [PASSED] 59 VFs
[10:07:11] [PASSED] 60 VFs
[10:07:11] [PASSED] 61 VFs
[10:07:11] [PASSED] 62 VFs
[10:07:11] [PASSED] 63 VFs
[10:07:11] ================== [PASSED] fair_contexts ==================
[10:07:11] ===================== fair_doorbells ======================
[10:07:11] [PASSED] 1 VF
[10:07:11] [PASSED] 2 VFs
[10:07:11] [PASSED] 3 VFs
[10:07:11] [PASSED] 4 VFs
[10:07:11] [PASSED] 5 VFs
[10:07:11] [PASSED] 6 VFs
[10:07:11] [PASSED] 7 VFs
[10:07:11] [PASSED] 8 VFs
[10:07:11] [PASSED] 9 VFs
[10:07:11] [PASSED] 10 VFs
[10:07:11] [PASSED] 11 VFs
[10:07:11] [PASSED] 12 VFs
[10:07:11] [PASSED] 13 VFs
[10:07:11] [PASSED] 14 VFs
[10:07:11] [PASSED] 15 VFs
[10:07:11] [PASSED] 16 VFs
[10:07:11] [PASSED] 17 VFs
[10:07:11] [PASSED] 18 VFs
[10:07:11] [PASSED] 19 VFs
[10:07:11] [PASSED] 20 VFs
[10:07:11] [PASSED] 21 VFs
[10:07:11] [PASSED] 22 VFs
[10:07:11] [PASSED] 23 VFs
[10:07:11] [PASSED] 24 VFs
[10:07:11] [PASSED] 25 VFs
[10:07:11] [PASSED] 26 VFs
[10:07:11] [PASSED] 27 VFs
[10:07:11] [PASSED] 28 VFs
[10:07:11] [PASSED] 29 VFs
[10:07:11] [PASSED] 30 VFs
[10:07:11] [PASSED] 31 VFs
[10:07:11] [PASSED] 32 VFs
[10:07:11] [PASSED] 33 VFs
[10:07:11] [PASSED] 34 VFs
[10:07:11] [PASSED] 35 VFs
[10:07:11] [PASSED] 36 VFs
[10:07:11] [PASSED] 37 VFs
[10:07:11] [PASSED] 38 VFs
[10:07:11] [PASSED] 39 VFs
[10:07:11] [PASSED] 40 VFs
[10:07:11] [PASSED] 41 VFs
[10:07:11] [PASSED] 42 VFs
[10:07:11] [PASSED] 43 VFs
[10:07:11] [PASSED] 44 VFs
[10:07:11] [PASSED] 45 VFs
[10:07:11] [PASSED] 46 VFs
[10:07:11] [PASSED] 47 VFs
[10:07:11] [PASSED] 48 VFs
[10:07:11] [PASSED] 49 VFs
[10:07:11] [PASSED] 50 VFs
[10:07:11] [PASSED] 51 VFs
[10:07:11] [PASSED] 52 VFs
[10:07:11] [PASSED] 53 VFs
[10:07:11] [PASSED] 54 VFs
[10:07:11] [PASSED] 55 VFs
[10:07:11] [PASSED] 56 VFs
[10:07:11] [PASSED] 57 VFs
[10:07:11] [PASSED] 58 VFs
[10:07:11] [PASSED] 59 VFs
[10:07:11] [PASSED] 60 VFs
[10:07:11] [PASSED] 61 VFs
[10:07:11] [PASSED] 62 VFs
[10:07:11] [PASSED] 63 VFs
[10:07:11] ================= [PASSED] fair_doorbells ==================
[10:07:11] ================== [PASSED] pf_gt_config ===================
[10:07:11] ===================== lmtt (1 subtest) =====================
[10:07:11] ======================== test_ops =========================
[10:07:11] [PASSED] 2-level
[10:07:11] [PASSED] multi-level
[10:07:11] ==================== [PASSED] test_ops =====================
[10:07:11] ====================== [PASSED] lmtt =======================
[10:07:11] ================= pf_service (11 subtests) =================
[10:07:11] [PASSED] pf_negotiate_any
[10:07:11] [PASSED] pf_negotiate_base_match
[10:07:11] [PASSED] pf_negotiate_base_newer
[10:07:11] [PASSED] pf_negotiate_base_next
[10:07:11] [SKIPPED] pf_negotiate_base_older
[10:07:11] [PASSED] pf_negotiate_base_prev
[10:07:11] [PASSED] pf_negotiate_latest_match
[10:07:11] [PASSED] pf_negotiate_latest_newer
[10:07:11] [PASSED] pf_negotiate_latest_next
[10:07:11] [SKIPPED] pf_negotiate_latest_older
[10:07:11] [SKIPPED] pf_negotiate_latest_prev
[10:07:11] =================== [PASSED] pf_service ====================
[10:07:11] ================= xe_guc_g2g (2 subtests) ==================
[10:07:11] ============== xe_live_guc_g2g_kunit_default ==============
[10:07:11] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:07:11] ============== xe_live_guc_g2g_kunit_allmem ===============
[10:07:11] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:07:11] =================== [SKIPPED] xe_guc_g2g ===================
[10:07:11] =================== xe_mocs (2 subtests) ===================
[10:07:11] ================ xe_live_mocs_kernel_kunit ================
[10:07:11] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:07:11] ================ xe_live_mocs_reset_kunit =================
[10:07:11] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:07:11] ==================== [SKIPPED] xe_mocs =====================
[10:07:11] ================= xe_migrate (2 subtests) ==================
[10:07:11] ================= xe_migrate_sanity_kunit =================
[10:07:11] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:07:11] ================== xe_validate_ccs_kunit ==================
[10:07:11] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:07:11] =================== [SKIPPED] xe_migrate ===================
[10:07:11] ================== xe_dma_buf (1 subtest) ==================
[10:07:11] ==================== xe_dma_buf_kunit =====================
[10:07:11] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:07:11] =================== [SKIPPED] xe_dma_buf ===================
[10:07:11] ================= xe_bo_shrink (1 subtest) =================
[10:07:11] =================== xe_bo_shrink_kunit ====================
[10:07:11] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:07:11] ================== [SKIPPED] xe_bo_shrink ==================
[10:07:11] ==================== xe_bo (2 subtests) ====================
[10:07:11] ================== xe_ccs_migrate_kunit ===================
[10:07:11] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:07:11] ==================== xe_bo_evict_kunit ====================
[10:07:11] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:07:11] ===================== [SKIPPED] xe_bo ======================
[10:07:11] ==================== args (11 subtests) ====================
[10:07:11] [PASSED] count_args_test
[10:07:11] [PASSED] call_args_example
[10:07:11] [PASSED] call_args_test
[10:07:11] [PASSED] drop_first_arg_example
[10:07:11] [PASSED] drop_first_arg_test
[10:07:11] [PASSED] first_arg_example
[10:07:11] [PASSED] first_arg_test
[10:07:11] [PASSED] last_arg_example
[10:07:11] [PASSED] last_arg_test
[10:07:11] [PASSED] pick_arg_example
[10:07:11] [PASSED] sep_comma_example
[10:07:11] ====================== [PASSED] args =======================
[10:07:11] =================== xe_pci (3 subtests) ====================
[10:07:11] ==================== check_graphics_ip ====================
[10:07:11] [PASSED] 12.00 Xe_LP
[10:07:11] [PASSED] 12.10 Xe_LP+
[10:07:11] [PASSED] 12.55 Xe_HPG
[10:07:11] [PASSED] 12.60 Xe_HPC
[10:07:11] [PASSED] 12.70 Xe_LPG
[10:07:11] [PASSED] 12.71 Xe_LPG
[10:07:11] [PASSED] 12.74 Xe_LPG+
[10:07:11] [PASSED] 20.01 Xe2_HPG
[10:07:11] [PASSED] 20.02 Xe2_HPG
[10:07:11] [PASSED] 20.04 Xe2_LPG
[10:07:11] [PASSED] 30.00 Xe3_LPG
[10:07:11] [PASSED] 30.01 Xe3_LPG
[10:07:11] [PASSED] 30.03 Xe3_LPG
[10:07:11] [PASSED] 30.04 Xe3_LPG
[10:07:11] [PASSED] 30.05 Xe3_LPG
[10:07:11] [PASSED] 35.11 Xe3p_XPC
[10:07:11] ================ [PASSED] check_graphics_ip ================
[10:07:11] ===================== check_media_ip ======================
[10:07:11] [PASSED] 12.00 Xe_M
[10:07:11] [PASSED] 12.55 Xe_HPM
[10:07:11] [PASSED] 13.00 Xe_LPM+
[10:07:11] [PASSED] 13.01 Xe2_HPM
[10:07:11] [PASSED] 20.00 Xe2_LPM
[10:07:11] [PASSED] 30.00 Xe3_LPM
[10:07:11] [PASSED] 30.02 Xe3_LPM
[10:07:11] [PASSED] 35.00 Xe3p_LPM
[10:07:11] [PASSED] 35.03 Xe3p_HPM
[10:07:11] ================= [PASSED] check_media_ip ==================
[10:07:11] =================== check_platform_desc ===================
[10:07:11] [PASSED] 0x9A60 (TIGERLAKE)
[10:07:11] [PASSED] 0x9A68 (TIGERLAKE)
[10:07:11] [PASSED] 0x9A70 (TIGERLAKE)
[10:07:11] [PASSED] 0x9A40 (TIGERLAKE)
[10:07:11] [PASSED] 0x9A49 (TIGERLAKE)
[10:07:11] [PASSED] 0x9A59 (TIGERLAKE)
[10:07:11] [PASSED] 0x9A78 (TIGERLAKE)
[10:07:11] [PASSED] 0x9AC0 (TIGERLAKE)
[10:07:11] [PASSED] 0x9AC9 (TIGERLAKE)
[10:07:11] [PASSED] 0x9AD9 (TIGERLAKE)
[10:07:11] [PASSED] 0x9AF8 (TIGERLAKE)
[10:07:11] [PASSED] 0x4C80 (ROCKETLAKE)
[10:07:11] [PASSED] 0x4C8A (ROCKETLAKE)
[10:07:11] [PASSED] 0x4C8B (ROCKETLAKE)
[10:07:11] [PASSED] 0x4C8C (ROCKETLAKE)
[10:07:11] [PASSED] 0x4C90 (ROCKETLAKE)
[10:07:11] [PASSED] 0x4C9A (ROCKETLAKE)
[10:07:11] [PASSED] 0x4680 (ALDERLAKE_S)
[10:07:11] [PASSED] 0x4682 (ALDERLAKE_S)
[10:07:11] [PASSED] 0x4688 (ALDERLAKE_S)
[10:07:11] [PASSED] 0x468A (ALDERLAKE_S)
[10:07:11] [PASSED] 0x468B (ALDERLAKE_S)
[10:07:11] [PASSED] 0x4690 (ALDERLAKE_S)
[10:07:11] [PASSED] 0x4692 (ALDERLAKE_S)
[10:07:11] [PASSED] 0x4693 (ALDERLAKE_S)
[10:07:11] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46AA (ALDERLAKE_P)
[10:07:11] [PASSED] 0x462A (ALDERLAKE_P)
[10:07:11] [PASSED] 0x4626 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x4628 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:07:11] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:07:11] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:07:11] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:07:11] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:07:11] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:07:11] [PASSED] 0xA721 (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA720 (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:07:11] [PASSED] 0xA780 (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA781 (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA782 (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA783 (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA788 (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA789 (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA78A (ALDERLAKE_S)
[10:07:11] [PASSED] 0xA78B (ALDERLAKE_S)
[10:07:11] [PASSED] 0x4905 (DG1)
[10:07:11] [PASSED] 0x4906 (DG1)
[10:07:11] [PASSED] 0x4907 (DG1)
[10:07:11] [PASSED] 0x4908 (DG1)
[10:07:11] [PASSED] 0x4909 (DG1)
[10:07:11] [PASSED] 0x56C0 (DG2)
[10:07:11] [PASSED] 0x56C2 (DG2)
[10:07:11] [PASSED] 0x56C1 (DG2)
[10:07:11] [PASSED] 0x7D51 (METEORLAKE)
[10:07:11] [PASSED] 0x7DD1 (METEORLAKE)
[10:07:11] [PASSED] 0x7D41 (METEORLAKE)
[10:07:11] [PASSED] 0x7D67 (METEORLAKE)
[10:07:11] [PASSED] 0xB640 (METEORLAKE)
[10:07:11] [PASSED] 0x56A0 (DG2)
[10:07:11] [PASSED] 0x56A1 (DG2)
[10:07:11] [PASSED] 0x56A2 (DG2)
[10:07:11] [PASSED] 0x56BE (DG2)
[10:07:11] [PASSED] 0x56BF (DG2)
[10:07:11] [PASSED] 0x5690 (DG2)
stty: 'standard input': Inappropriate ioctl for device
[10:07:11] [PASSED] 0x5691 (DG2)
[10:07:11] [PASSED] 0x5692 (DG2)
[10:07:11] [PASSED] 0x56A5 (DG2)
[10:07:11] [PASSED] 0x56A6 (DG2)
[10:07:11] [PASSED] 0x56B0 (DG2)
[10:07:11] [PASSED] 0x56B1 (DG2)
[10:07:11] [PASSED] 0x56BA (DG2)
[10:07:11] [PASSED] 0x56BB (DG2)
[10:07:11] [PASSED] 0x56BC (DG2)
[10:07:11] [PASSED] 0x56BD (DG2)
[10:07:11] [PASSED] 0x5693 (DG2)
[10:07:11] [PASSED] 0x5694 (DG2)
[10:07:11] [PASSED] 0x5695 (DG2)
[10:07:11] [PASSED] 0x56A3 (DG2)
[10:07:11] [PASSED] 0x56A4 (DG2)
[10:07:11] [PASSED] 0x56B2 (DG2)
[10:07:11] [PASSED] 0x56B3 (DG2)
[10:07:11] [PASSED] 0x5696 (DG2)
[10:07:11] [PASSED] 0x5697 (DG2)
[10:07:11] [PASSED] 0xB69 (PVC)
[10:07:11] [PASSED] 0xB6E (PVC)
[10:07:11] [PASSED] 0xBD4 (PVC)
[10:07:11] [PASSED] 0xBD5 (PVC)
[10:07:11] [PASSED] 0xBD6 (PVC)
[10:07:11] [PASSED] 0xBD7 (PVC)
[10:07:11] [PASSED] 0xBD8 (PVC)
[10:07:11] [PASSED] 0xBD9 (PVC)
[10:07:11] [PASSED] 0xBDA (PVC)
[10:07:11] [PASSED] 0xBDB (PVC)
[10:07:11] [PASSED] 0xBE0 (PVC)
[10:07:11] [PASSED] 0xBE1 (PVC)
[10:07:11] [PASSED] 0xBE5 (PVC)
[10:07:11] [PASSED] 0x7D40 (METEORLAKE)
[10:07:11] [PASSED] 0x7D45 (METEORLAKE)
[10:07:11] [PASSED] 0x7D55 (METEORLAKE)
[10:07:11] [PASSED] 0x7D60 (METEORLAKE)
[10:07:11] [PASSED] 0x7DD5 (METEORLAKE)
[10:07:11] [PASSED] 0x6420 (LUNARLAKE)
[10:07:11] [PASSED] 0x64A0 (LUNARLAKE)
[10:07:11] [PASSED] 0x64B0 (LUNARLAKE)
[10:07:11] [PASSED] 0xE202 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE209 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE20B (BATTLEMAGE)
[10:07:11] [PASSED] 0xE20C (BATTLEMAGE)
[10:07:11] [PASSED] 0xE20D (BATTLEMAGE)
[10:07:11] [PASSED] 0xE210 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE211 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE212 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE216 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE220 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE221 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE222 (BATTLEMAGE)
[10:07:11] [PASSED] 0xE223 (BATTLEMAGE)
[10:07:11] [PASSED] 0xB080 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB081 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB082 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB083 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB084 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB085 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB086 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB087 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB08F (PANTHERLAKE)
[10:07:11] [PASSED] 0xB090 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:07:11] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:07:11] [PASSED] 0xD740 (NOVALAKE_S)
[10:07:11] [PASSED] 0xD741 (NOVALAKE_S)
[10:07:11] [PASSED] 0xD742 (NOVALAKE_S)
[10:07:11] [PASSED] 0xD743 (NOVALAKE_S)
[10:07:11] [PASSED] 0xD744 (NOVALAKE_S)
[10:07:11] [PASSED] 0xD745 (NOVALAKE_S)
[10:07:11] [PASSED] 0x674C (CRESCENTISLAND)
[10:07:11] [PASSED] 0xFD80 (PANTHERLAKE)
[10:07:11] [PASSED] 0xFD81 (PANTHERLAKE)
[10:07:11] =============== [PASSED] check_platform_desc ===============
[10:07:11] ===================== [PASSED] xe_pci ======================
[10:07:11] =================== xe_rtp (2 subtests) ====================
[10:07:11] =============== xe_rtp_process_to_sr_tests ================
[10:07:11] [PASSED] coalesce-same-reg
[10:07:11] [PASSED] no-match-no-add
[10:07:11] [PASSED] match-or
[10:07:11] [PASSED] match-or-xfail
[10:07:11] [PASSED] no-match-no-add-multiple-rules
[10:07:11] [PASSED] two-regs-two-entries
[10:07:11] [PASSED] clr-one-set-other
[10:07:11] [PASSED] set-field
[10:07:11] [PASSED] conflict-duplicate
[10:07:11] [PASSED] conflict-not-disjoint
[10:07:11] [PASSED] conflict-reg-type
[10:07:11] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:07:11] ================== xe_rtp_process_tests ===================
[10:07:11] [PASSED] active1
[10:07:11] [PASSED] active2
[10:07:11] [PASSED] active-inactive
[10:07:11] [PASSED] inactive-active
[10:07:11] [PASSED] inactive-1st_or_active-inactive
[10:07:11] [PASSED] inactive-2nd_or_active-inactive
[10:07:11] [PASSED] inactive-last_or_active-inactive
[10:07:11] [PASSED] inactive-no_or_active-inactive
[10:07:11] ============== [PASSED] xe_rtp_process_tests ===============
[10:07:11] ===================== [PASSED] xe_rtp ======================
[10:07:11] ==================== xe_wa (1 subtest) =====================
[10:07:11] ======================== xe_wa_gt =========================
[10:07:11] [PASSED] TIGERLAKE B0
[10:07:11] [PASSED] DG1 A0
[10:07:11] [PASSED] DG1 B0
[10:07:11] [PASSED] ALDERLAKE_S A0
[10:07:11] [PASSED] ALDERLAKE_S B0
[10:07:11] [PASSED] ALDERLAKE_S C0
[10:07:11] [PASSED] ALDERLAKE_S D0
[10:07:11] [PASSED] ALDERLAKE_P A0
[10:07:11] [PASSED] ALDERLAKE_P B0
[10:07:11] [PASSED] ALDERLAKE_P C0
[10:07:11] [PASSED] ALDERLAKE_S RPLS D0
[10:07:11] [PASSED] ALDERLAKE_P RPLU E0
[10:07:11] [PASSED] DG2 G10 C0
[10:07:11] [PASSED] DG2 G11 B1
[10:07:11] [PASSED] DG2 G12 A1
[10:07:11] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:07:11] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:07:11] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:07:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:07:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:07:11] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:07:11] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:07:11] ==================== [PASSED] xe_wa_gt =====================
[10:07:11] ====================== [PASSED] xe_wa ======================
[10:07:11] ============================================================
[10:07:11] Testing complete. Ran 446 tests: passed: 428, skipped: 18
[10:07:11] Elapsed time: 49.973s total, 4.178s configuring, 45.328s building, 0.422s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:07:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:07:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:07:49] Starting KUnit Kernel (1/1)...
[10:07:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:07:49] ============ drm_test_pick_cmdline (2 subtests) ============
[10:07:49] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:07:49] =============== drm_test_pick_cmdline_named ===============
[10:07:49] [PASSED] NTSC
[10:07:49] [PASSED] NTSC-J
[10:07:49] [PASSED] PAL
[10:07:49] [PASSED] PAL-M
[10:07:49] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:07:49] ============== [PASSED] drm_test_pick_cmdline ==============
[10:07:49] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:07:49] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:07:49] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:07:49] =========== drm_validate_clone_mode (2 subtests) ===========
[10:07:49] ============== drm_test_check_in_clone_mode ===============
[10:07:49] [PASSED] in_clone_mode
[10:07:49] [PASSED] not_in_clone_mode
[10:07:49] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:07:49] =============== drm_test_check_valid_clones ===============
[10:07:49] [PASSED] not_in_clone_mode
[10:07:49] [PASSED] valid_clone
[10:07:49] [PASSED] invalid_clone
[10:07:49] =========== [PASSED] drm_test_check_valid_clones ===========
[10:07:49] ============= [PASSED] drm_validate_clone_mode =============
[10:07:49] ============= drm_validate_modeset (1 subtest) =============
[10:07:49] [PASSED] drm_test_check_connector_changed_modeset
[10:07:49] ============== [PASSED] drm_validate_modeset ===============
[10:07:49] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:07:49] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:07:49] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:07:49] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:07:49] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:07:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:07:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:07:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:07:49] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:07:49] ============== drm_bridge_alloc (2 subtests) ===============
[10:07:49] [PASSED] drm_test_drm_bridge_alloc_basic
[10:07:49] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:07:49] ================ [PASSED] drm_bridge_alloc =================
[10:07:49] ================== drm_buddy (8 subtests) ==================
[10:07:49] [PASSED] drm_test_buddy_alloc_limit
[10:07:49] [PASSED] drm_test_buddy_alloc_optimistic
[10:07:49] [PASSED] drm_test_buddy_alloc_pessimistic
[10:07:49] [PASSED] drm_test_buddy_alloc_pathological
[10:07:49] [PASSED] drm_test_buddy_alloc_contiguous
[10:07:49] [PASSED] drm_test_buddy_alloc_clear
[10:07:49] [PASSED] drm_test_buddy_alloc_range_bias
[10:07:49] [PASSED] drm_test_buddy_fragmentation_performance
[10:07:49] ==================== [PASSED] drm_buddy ====================
[10:07:49] ============= drm_cmdline_parser (40 subtests) =============
[10:07:49] [PASSED] drm_test_cmdline_force_d_only
[10:07:49] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:07:49] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:07:49] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:07:49] [PASSED] drm_test_cmdline_force_e_only
[10:07:49] [PASSED] drm_test_cmdline_res
[10:07:49] [PASSED] drm_test_cmdline_res_vesa
[10:07:49] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:07:49] [PASSED] drm_test_cmdline_res_rblank
[10:07:49] [PASSED] drm_test_cmdline_res_bpp
[10:07:49] [PASSED] drm_test_cmdline_res_refresh
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:07:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:07:49] [PASSED] drm_test_cmdline_res_margins_force_on
[10:07:49] [PASSED] drm_test_cmdline_res_vesa_margins
[10:07:49] [PASSED] drm_test_cmdline_name
[10:07:49] [PASSED] drm_test_cmdline_name_bpp
[10:07:49] [PASSED] drm_test_cmdline_name_option
[10:07:49] [PASSED] drm_test_cmdline_name_bpp_option
[10:07:49] [PASSED] drm_test_cmdline_rotate_0
[10:07:49] [PASSED] drm_test_cmdline_rotate_90
[10:07:49] [PASSED] drm_test_cmdline_rotate_180
[10:07:49] [PASSED] drm_test_cmdline_rotate_270
[10:07:49] [PASSED] drm_test_cmdline_hmirror
[10:07:49] [PASSED] drm_test_cmdline_vmirror
[10:07:49] [PASSED] drm_test_cmdline_margin_options
[10:07:49] [PASSED] drm_test_cmdline_multiple_options
[10:07:49] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:07:49] [PASSED] drm_test_cmdline_extra_and_option
[10:07:49] [PASSED] drm_test_cmdline_freestanding_options
[10:07:49] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:07:49] [PASSED] drm_test_cmdline_panel_orientation
[10:07:49] ================ drm_test_cmdline_invalid =================
[10:07:49] [PASSED] margin_only
[10:07:49] [PASSED] interlace_only
[10:07:49] [PASSED] res_missing_x
[10:07:49] [PASSED] res_missing_y
[10:07:49] [PASSED] res_bad_y
[10:07:49] [PASSED] res_missing_y_bpp
[10:07:49] [PASSED] res_bad_bpp
[10:07:49] [PASSED] res_bad_refresh
[10:07:49] [PASSED] res_bpp_refresh_force_on_off
[10:07:49] [PASSED] res_invalid_mode
[10:07:49] [PASSED] res_bpp_wrong_place_mode
[10:07:49] [PASSED] name_bpp_refresh
[10:07:49] [PASSED] name_refresh
[10:07:49] [PASSED] name_refresh_wrong_mode
[10:07:49] [PASSED] name_refresh_invalid_mode
[10:07:49] [PASSED] rotate_multiple
[10:07:49] [PASSED] rotate_invalid_val
[10:07:49] [PASSED] rotate_truncated
[10:07:49] [PASSED] invalid_option
[10:07:49] [PASSED] invalid_tv_option
[10:07:49] [PASSED] truncated_tv_option
[10:07:49] ============ [PASSED] drm_test_cmdline_invalid =============
[10:07:49] =============== drm_test_cmdline_tv_options ===============
[10:07:49] [PASSED] NTSC
[10:07:49] [PASSED] NTSC_443
[10:07:49] [PASSED] NTSC_J
[10:07:49] [PASSED] PAL
[10:07:49] [PASSED] PAL_M
[10:07:49] [PASSED] PAL_N
[10:07:49] [PASSED] SECAM
[10:07:49] [PASSED] MONO_525
[10:07:49] [PASSED] MONO_625
[10:07:49] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:07:49] =============== [PASSED] drm_cmdline_parser ================
[10:07:49] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:07:49] [PASSED] drm_test_connector_hdmi_init_valid
[10:07:49] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:07:49] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:07:49] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:07:49] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:07:49] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:07:49] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:07:49] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:07:49] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:07:49] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:07:49] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:07:49] [PASSED] supported_formats=0x3 yuv420_allowed=1
[10:07:49] [PASSED] supported_formats=0x3 yuv420_allowed=0
[10:07:49] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:07:49] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:07:49] [PASSED] drm_test_connector_hdmi_init_null_product
[10:07:49] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:07:49] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:07:49] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:07:49] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:07:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:07:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:07:49] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:07:49] ========= drm_test_connector_hdmi_init_type_valid =========
[10:07:49] [PASSED] HDMI-A
[10:07:49] [PASSED] HDMI-B
[10:07:49] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:07:49] ======== drm_test_connector_hdmi_init_type_invalid ========
[10:07:49] [PASSED] Unknown
[10:07:49] [PASSED] VGA
[10:07:49] [PASSED] DVI-I
[10:07:49] [PASSED] DVI-D
[10:07:49] [PASSED] DVI-A
[10:07:49] [PASSED] Composite
[10:07:49] [PASSED] SVIDEO
[10:07:49] [PASSED] LVDS
[10:07:49] [PASSED] Component
[10:07:49] [PASSED] DIN
[10:07:49] [PASSED] DP
[10:07:49] [PASSED] TV
[10:07:49] [PASSED] eDP
[10:07:49] [PASSED] Virtual
[10:07:49] [PASSED] DSI
[10:07:49] [PASSED] DPI
[10:07:49] [PASSED] Writeback
[10:07:49] [PASSED] SPI
[10:07:49] [PASSED] USB
[10:07:49] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:07:49] ============ [PASSED] drmm_connector_hdmi_init =============
[10:07:49] ============= drmm_connector_init (3 subtests) =============
[10:07:49] [PASSED] drm_test_drmm_connector_init
[10:07:49] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:07:49] ========= drm_test_drmm_connector_init_type_valid =========
[10:07:49] [PASSED] Unknown
[10:07:49] [PASSED] VGA
[10:07:49] [PASSED] DVI-I
[10:07:49] [PASSED] DVI-D
[10:07:49] [PASSED] DVI-A
[10:07:49] [PASSED] Composite
[10:07:49] [PASSED] SVIDEO
[10:07:49] [PASSED] LVDS
[10:07:49] [PASSED] Component
[10:07:49] [PASSED] DIN
[10:07:49] [PASSED] DP
[10:07:49] [PASSED] HDMI-A
[10:07:49] [PASSED] HDMI-B
[10:07:49] [PASSED] TV
[10:07:49] [PASSED] eDP
[10:07:49] [PASSED] Virtual
[10:07:49] [PASSED] DSI
[10:07:49] [PASSED] DPI
[10:07:49] [PASSED] Writeback
[10:07:49] [PASSED] SPI
[10:07:49] [PASSED] USB
[10:07:49] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:07:49] =============== [PASSED] drmm_connector_init ===============
[10:07:49] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_init
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:07:49] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[10:07:49] [PASSED] Unknown
[10:07:49] [PASSED] VGA
[10:07:49] [PASSED] DVI-I
[10:07:49] [PASSED] DVI-D
[10:07:49] [PASSED] DVI-A
[10:07:49] [PASSED] Composite
[10:07:49] [PASSED] SVIDEO
[10:07:49] [PASSED] LVDS
[10:07:49] [PASSED] Component
[10:07:49] [PASSED] DIN
[10:07:49] [PASSED] DP
[10:07:49] [PASSED] HDMI-A
[10:07:49] [PASSED] HDMI-B
[10:07:49] [PASSED] TV
[10:07:49] [PASSED] eDP
[10:07:49] [PASSED] Virtual
[10:07:49] [PASSED] DSI
[10:07:49] [PASSED] DPI
[10:07:49] [PASSED] Writeback
[10:07:49] [PASSED] SPI
[10:07:49] [PASSED] USB
[10:07:49] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:07:49] ======== drm_test_drm_connector_dynamic_init_name =========
[10:07:49] [PASSED] Unknown
[10:07:49] [PASSED] VGA
[10:07:49] [PASSED] DVI-I
[10:07:49] [PASSED] DVI-D
[10:07:49] [PASSED] DVI-A
[10:07:49] [PASSED] Composite
[10:07:49] [PASSED] SVIDEO
[10:07:49] [PASSED] LVDS
[10:07:49] [PASSED] Component
[10:07:49] [PASSED] DIN
[10:07:49] [PASSED] DP
[10:07:49] [PASSED] HDMI-A
[10:07:49] [PASSED] HDMI-B
[10:07:49] [PASSED] TV
[10:07:49] [PASSED] eDP
[10:07:49] [PASSED] Virtual
[10:07:49] [PASSED] DSI
[10:07:49] [PASSED] DPI
[10:07:49] [PASSED] Writeback
[10:07:49] [PASSED] SPI
[10:07:49] [PASSED] USB
[10:07:49] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:07:49] =========== [PASSED] drm_connector_dynamic_init ============
[10:07:49] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:07:49] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:07:49] ======= drm_connector_dynamic_register (7 subtests) ========
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:07:49] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:07:49] ========= [PASSED] drm_connector_dynamic_register ==========
[10:07:49] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:07:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:07:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:07:49] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:07:49] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:07:49] ========== drm_test_get_tv_mode_from_name_valid ===========
[10:07:49] [PASSED] NTSC
[10:07:49] [PASSED] NTSC-443
[10:07:49] [PASSED] NTSC-J
[10:07:49] [PASSED] PAL
[10:07:49] [PASSED] PAL-M
[10:07:49] [PASSED] PAL-N
[10:07:49] [PASSED] SECAM
[10:07:49] [PASSED] Mono
[10:07:49] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:07:49] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:07:49] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:07:49] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:07:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:07:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:07:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:07:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:07:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:07:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:07:49] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[10:07:49] [PASSED] VIC 96
[10:07:49] [PASSED] VIC 97
[10:07:49] [PASSED] VIC 101
[10:07:49] [PASSED] VIC 102
[10:07:49] [PASSED] VIC 106
[10:07:49] [PASSED] VIC 107
[10:07:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:07:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:07:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:07:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:07:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:07:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:07:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:07:49] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:07:49] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[10:07:49] [PASSED] Automatic
[10:07:49] [PASSED] Full
[10:07:49] [PASSED] Limited 16:235
[10:07:49] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:07:49] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:07:49] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:07:49] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:07:49] === drm_test_drm_hdmi_connector_get_output_format_name ====
[10:07:49] [PASSED] RGB
[10:07:49] [PASSED] YUV 4:2:0
[10:07:49] [PASSED] YUV 4:2:2
[10:07:49] [PASSED] YUV 4:4:4
[10:07:49] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:07:49] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:07:49] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:07:49] ============= drm_damage_helper (21 subtests) ==============
[10:07:49] [PASSED] drm_test_damage_iter_no_damage
[10:07:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:07:49] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:07:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:07:49] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:07:49] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:07:49] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:07:49] [PASSED] drm_test_damage_iter_simple_damage
[10:07:49] [PASSED] drm_test_damage_iter_single_damage
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:07:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:07:49] [PASSED] drm_test_damage_iter_damage
[10:07:49] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:07:49] [PASSED] drm_test_damage_iter_damage_one_outside
[10:07:49] [PASSED] drm_test_damage_iter_damage_src_moved
[10:07:49] [PASSED] drm_test_damage_iter_damage_not_visible
[10:07:49] ================ [PASSED] drm_damage_helper ================
[10:07:49] ============== drm_dp_mst_helper (3 subtests) ==============
[10:07:49] ============== drm_test_dp_mst_calc_pbn_mode ==============
[10:07:49] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:07:49] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:07:49] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:07:49] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:07:49] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:07:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:07:49] ============== drm_test_dp_mst_calc_pbn_div ===============
[10:07:49] [PASSED] Link rate 2000000 lane count 4
[10:07:49] [PASSED] Link rate 2000000 lane count 2
[10:07:49] [PASSED] Link rate 2000000 lane count 1
[10:07:49] [PASSED] Link rate 1350000 lane count 4
[10:07:49] [PASSED] Link rate 1350000 lane count 2
[10:07:49] [PASSED] Link rate 1350000 lane count 1
[10:07:49] [PASSED] Link rate 1000000 lane count 4
[10:07:49] [PASSED] Link rate 1000000 lane count 2
[10:07:49] [PASSED] Link rate 1000000 lane count 1
[10:07:49] [PASSED] Link rate 810000 lane count 4
[10:07:49] [PASSED] Link rate 810000 lane count 2
[10:07:49] [PASSED] Link rate 810000 lane count 1
[10:07:49] [PASSED] Link rate 540000 lane count 4
[10:07:49] [PASSED] Link rate 540000 lane count 2
[10:07:49] [PASSED] Link rate 540000 lane count 1
[10:07:49] [PASSED] Link rate 270000 lane count 4
[10:07:49] [PASSED] Link rate 270000 lane count 2
[10:07:49] [PASSED] Link rate 270000 lane count 1
[10:07:49] [PASSED] Link rate 162000 lane count 4
[10:07:49] [PASSED] Link rate 162000 lane count 2
[10:07:49] [PASSED] Link rate 162000 lane count 1
[10:07:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:07:49] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[10:07:49] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:07:49] [PASSED] DP_POWER_UP_PHY with port number
[10:07:49] [PASSED] DP_POWER_DOWN_PHY with port number
[10:07:49] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:07:49] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:07:49] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:07:49] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:07:49] [PASSED] DP_QUERY_PAYLOAD with port number
[10:07:49] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:07:49] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:07:49] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:07:49] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:07:49] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:07:49] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:07:49] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:07:49] [PASSED] DP_REMOTE_I2C_READ with port number
[10:07:49] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:07:49] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:07:49] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:07:49] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:07:49] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:07:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:07:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:07:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:07:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:07:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:07:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:07:49] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:07:49] ================ [PASSED] drm_dp_mst_helper ================
[10:07:49] ================== drm_exec (7 subtests) ===================
[10:07:49] [PASSED] sanitycheck
[10:07:49] [PASSED] test_lock
[10:07:49] [PASSED] test_lock_unlock
[10:07:49] [PASSED] test_duplicates
[10:07:49] [PASSED] test_prepare
[10:07:49] [PASSED] test_prepare_array
[10:07:49] [PASSED] test_multiple_loops
[10:07:49] ==================== [PASSED] drm_exec =====================
[10:07:49] =========== drm_format_helper_test (17 subtests) ===========
[10:07:49] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:07:49] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:07:49] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:07:49] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:07:49] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:07:49] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:07:49] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:07:49] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:07:49] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:07:49] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:07:49] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:07:49] ============== drm_test_fb_xrgb8888_to_mono ===============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:07:49] ==================== drm_test_fb_swab =====================
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ================ [PASSED] drm_test_fb_swab =================
[10:07:49] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:07:49] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[10:07:49] [PASSED] single_pixel_source_buffer
[10:07:49] [PASSED] single_pixel_clip_rectangle
[10:07:49] [PASSED] well_known_colors
[10:07:49] [PASSED] destination_pitch
[10:07:49] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:07:49] ================= drm_test_fb_clip_offset =================
[10:07:49] [PASSED] pass through
[10:07:49] [PASSED] horizontal offset
[10:07:49] [PASSED] vertical offset
[10:07:49] [PASSED] horizontal and vertical offset
[10:07:49] [PASSED] horizontal offset (custom pitch)
[10:07:49] [PASSED] vertical offset (custom pitch)
[10:07:49] [PASSED] horizontal and vertical offset (custom pitch)
[10:07:49] ============= [PASSED] drm_test_fb_clip_offset =============
[10:07:49] =================== drm_test_fb_memcpy ====================
[10:07:49] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:07:49] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:07:49] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:07:49] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:07:49] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:07:49] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:07:49] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:07:49] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:07:49] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:07:49] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:07:49] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:07:49] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:07:49] =============== [PASSED] drm_test_fb_memcpy ================
[10:07:49] ============= [PASSED] drm_format_helper_test ==============
[10:07:49] ================= drm_format (18 subtests) =================
[10:07:49] [PASSED] drm_test_format_block_width_invalid
[10:07:49] [PASSED] drm_test_format_block_width_one_plane
[10:07:49] [PASSED] drm_test_format_block_width_two_plane
[10:07:49] [PASSED] drm_test_format_block_width_three_plane
[10:07:49] [PASSED] drm_test_format_block_width_tiled
[10:07:49] [PASSED] drm_test_format_block_height_invalid
[10:07:49] [PASSED] drm_test_format_block_height_one_plane
[10:07:49] [PASSED] drm_test_format_block_height_two_plane
[10:07:49] [PASSED] drm_test_format_block_height_three_plane
[10:07:49] [PASSED] drm_test_format_block_height_tiled
[10:07:49] [PASSED] drm_test_format_min_pitch_invalid
[10:07:49] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:07:49] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:07:49] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:07:49] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:07:49] [PASSED] drm_test_format_min_pitch_two_plane
[10:07:49] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:07:49] [PASSED] drm_test_format_min_pitch_tiled
[10:07:49] =================== [PASSED] drm_format ====================
[10:07:49] ============== drm_framebuffer (10 subtests) ===============
[10:07:49] ========== drm_test_framebuffer_check_src_coords ==========
[10:07:49] [PASSED] Success: source fits into fb
[10:07:49] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:07:49] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:07:49] [PASSED] Fail: overflowing fb with source width
[10:07:49] [PASSED] Fail: overflowing fb with source height
[10:07:49] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:07:49] [PASSED] drm_test_framebuffer_cleanup
[10:07:49] =============== drm_test_framebuffer_create ===============
[10:07:49] [PASSED] ABGR8888 normal sizes
[10:07:49] [PASSED] ABGR8888 max sizes
[10:07:49] [PASSED] ABGR8888 pitch greater than min required
[10:07:49] [PASSED] ABGR8888 pitch less than min required
[10:07:49] [PASSED] ABGR8888 Invalid width
[10:07:49] [PASSED] ABGR8888 Invalid buffer handle
[10:07:49] [PASSED] No pixel format
[10:07:49] [PASSED] ABGR8888 Width 0
[10:07:49] [PASSED] ABGR8888 Height 0
[10:07:49] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:07:49] [PASSED] ABGR8888 Large buffer offset
[10:07:49] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:07:49] [PASSED] ABGR8888 Invalid flag
[10:07:49] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:07:49] [PASSED] ABGR8888 Valid buffer modifier
[10:07:49] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:07:49] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] NV12 Normal sizes
[10:07:49] [PASSED] NV12 Max sizes
[10:07:49] [PASSED] NV12 Invalid pitch
[10:07:49] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:07:49] [PASSED] NV12 different modifier per-plane
[10:07:49] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:07:49] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] NV12 Modifier for inexistent plane
[10:07:49] [PASSED] NV12 Handle for inexistent plane
[10:07:49] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:07:49] [PASSED] YVU420 Normal sizes
[10:07:49] [PASSED] YVU420 Max sizes
[10:07:49] [PASSED] YVU420 Invalid pitch
[10:07:49] [PASSED] YVU420 Different pitches
[10:07:49] [PASSED] YVU420 Different buffer offsets/pitches
[10:07:49] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:07:49] [PASSED] YVU420 Valid modifier
[10:07:49] [PASSED] YVU420 Different modifiers per plane
[10:07:49] [PASSED] YVU420 Modifier for inexistent plane
[10:07:49] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:07:49] [PASSED] X0L2 Normal sizes
[10:07:49] [PASSED] X0L2 Max sizes
[10:07:49] [PASSED] X0L2 Invalid pitch
[10:07:49] [PASSED] X0L2 Pitch greater than minimum required
[10:07:49] [PASSED] X0L2 Handle for inexistent plane
[10:07:49] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:07:49] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:07:49] [PASSED] X0L2 Valid modifier
[10:07:49] [PASSED] X0L2 Modifier for inexistent plane
[10:07:49] =========== [PASSED] drm_test_framebuffer_create ===========
[10:07:49] [PASSED] drm_test_framebuffer_free
[10:07:49] [PASSED] drm_test_framebuffer_init
[10:07:49] [PASSED] drm_test_framebuffer_init_bad_format
[10:07:49] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:07:49] [PASSED] drm_test_framebuffer_lookup
[10:07:49] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:07:49] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:07:49] ================= [PASSED] drm_framebuffer =================
[10:07:49] ================ drm_gem_shmem (8 subtests) ================
[10:07:49] [PASSED] drm_gem_shmem_test_obj_create
[10:07:49] [PASSED] drm_gem_shmem_test_obj_create_private
[10:07:49] [PASSED] drm_gem_shmem_test_pin_pages
[10:07:49] [PASSED] drm_gem_shmem_test_vmap
[10:07:49] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:07:49] [PASSED] drm_gem_shmem_test_get_sg_table
[10:07:49] [PASSED] drm_gem_shmem_test_madvise
[10:07:49] [PASSED] drm_gem_shmem_test_purge
[10:07:49] ================== [PASSED] drm_gem_shmem ==================
[10:07:49] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:07:49] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[10:07:49] [PASSED] Automatic
[10:07:49] [PASSED] Full
[10:07:49] [PASSED] Limited 16:235
[10:07:49] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:07:49] [PASSED] drm_test_check_disable_connector
[10:07:49] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:07:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:07:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:07:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:07:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:07:49] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:07:49] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:07:49] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:07:49] [PASSED] drm_test_check_output_bpc_dvi
[10:07:49] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:07:49] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:07:49] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:07:49] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:07:49] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:07:49] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:07:49] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:07:49] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:07:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:07:49] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:07:49] [PASSED] drm_test_check_broadcast_rgb_value
[10:07:49] [PASSED] drm_test_check_bpc_8_value
[10:07:49] [PASSED] drm_test_check_bpc_10_value
[10:07:49] [PASSED] drm_test_check_bpc_12_value
[10:07:49] [PASSED] drm_test_check_format_value
[10:07:49] [PASSED] drm_test_check_tmds_char_value
[10:07:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:07:49] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:07:49] [PASSED] drm_test_check_mode_valid
[10:07:49] [PASSED] drm_test_check_mode_valid_reject
[10:07:49] [PASSED] drm_test_check_mode_valid_reject_rate
[10:07:49] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:07:49] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:07:49] ================= drm_managed (2 subtests) =================
[10:07:49] [PASSED] drm_test_managed_release_action
[10:07:49] [PASSED] drm_test_managed_run_action
[10:07:49] =================== [PASSED] drm_managed ===================
[10:07:49] =================== drm_mm (6 subtests) ====================
[10:07:49] [PASSED] drm_test_mm_init
[10:07:49] [PASSED] drm_test_mm_debug
[10:07:49] [PASSED] drm_test_mm_align32
[10:07:49] [PASSED] drm_test_mm_align64
[10:07:49] [PASSED] drm_test_mm_lowest
[10:07:49] [PASSED] drm_test_mm_highest
[10:07:49] ===================== [PASSED] drm_mm ======================
[10:07:49] ============= drm_modes_analog_tv (5 subtests) =============
[10:07:49] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:07:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:07:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:07:49] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:07:49] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:07:49] =============== [PASSED] drm_modes_analog_tv ===============
[10:07:49] ============== drm_plane_helper (2 subtests) ===============
[10:07:49] =============== drm_test_check_plane_state ================
[10:07:49] [PASSED] clipping_simple
[10:07:49] [PASSED] clipping_rotate_reflect
[10:07:49] [PASSED] positioning_simple
[10:07:49] [PASSED] upscaling
[10:07:49] [PASSED] downscaling
[10:07:49] [PASSED] rounding1
[10:07:49] [PASSED] rounding2
[10:07:49] [PASSED] rounding3
[10:07:49] [PASSED] rounding4
[10:07:49] =========== [PASSED] drm_test_check_plane_state ============
[10:07:49] =========== drm_test_check_invalid_plane_state ============
[10:07:49] [PASSED] positioning_invalid
[10:07:49] [PASSED] upscaling_invalid
[10:07:49] [PASSED] downscaling_invalid
[10:07:49] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:07:49] ================ [PASSED] drm_plane_helper =================
[10:07:49] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:07:49] ====== drm_test_connector_helper_tv_get_modes_check =======
[10:07:49] [PASSED] None
[10:07:49] [PASSED] PAL
[10:07:49] [PASSED] NTSC
[10:07:49] [PASSED] Both, NTSC Default
[10:07:49] [PASSED] Both, PAL Default
[10:07:49] [PASSED] Both, NTSC Default, with PAL on command-line
[10:07:49] [PASSED] Both, PAL Default, with NTSC on command-line
[10:07:49] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:07:49] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:07:49] ================== drm_rect (9 subtests) ===================
[10:07:49] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:07:49] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:07:49] [PASSED] drm_test_rect_clip_scaled_clipped
[10:07:49] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:07:49] ================= drm_test_rect_intersect =================
[10:07:49] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:07:49] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:07:49] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:07:49] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:07:49] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:07:49] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:07:49] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:07:49] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:07:49] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:07:49] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:07:49] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:07:49] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:07:49] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:07:49] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:07:49] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:07:49] ============= [PASSED] drm_test_rect_intersect =============
[10:07:49] ================ drm_test_rect_calc_hscale ================
[10:07:49] [PASSED] normal use
[10:07:49] [PASSED] out of max range
[10:07:49] [PASSED] out of min range
[10:07:49] [PASSED] zero dst
[10:07:49] [PASSED] negative src
[10:07:49] [PASSED] negative dst
[10:07:49] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:07:49] ================ drm_test_rect_calc_vscale ================
[10:07:49] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[10:07:49] [PASSED] out of max range
[10:07:49] [PASSED] out of min range
[10:07:49] [PASSED] zero dst
[10:07:49] [PASSED] negative src
[10:07:49] [PASSED] negative dst
[10:07:49] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:07:49] ================== drm_test_rect_rotate ===================
[10:07:49] [PASSED] reflect-x
[10:07:49] [PASSED] reflect-y
[10:07:49] [PASSED] rotate-0
[10:07:49] [PASSED] rotate-90
[10:07:49] [PASSED] rotate-180
[10:07:49] [PASSED] rotate-270
[10:07:49] ============== [PASSED] drm_test_rect_rotate ===============
[10:07:49] ================ drm_test_rect_rotate_inv =================
[10:07:49] [PASSED] reflect-x
[10:07:49] [PASSED] reflect-y
[10:07:49] [PASSED] rotate-0
[10:07:49] [PASSED] rotate-90
[10:07:49] [PASSED] rotate-180
[10:07:49] [PASSED] rotate-270
[10:07:49] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:07:49] ==================== [PASSED] drm_rect =====================
[10:07:49] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:07:49] ============ drm_test_sysfb_build_fourcc_list =============
[10:07:49] [PASSED] no native formats
[10:07:49] [PASSED] XRGB8888 as native format
[10:07:49] [PASSED] remove duplicates
[10:07:49] [PASSED] convert alpha formats
[10:07:49] [PASSED] random formats
[10:07:49] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:07:49] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:07:49] ============================================================
[10:07:49] Testing complete. Ran 622 tests: passed: 622
[10:07:49] Elapsed time: 37.867s total, 1.739s configuring, 35.404s building, 0.693s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:07:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:07:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:08:10] Starting KUnit Kernel (1/1)...
[10:08:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:08:10] ================= ttm_device (5 subtests) ==================
[10:08:10] [PASSED] ttm_device_init_basic
[10:08:10] [PASSED] ttm_device_init_multiple
[10:08:10] [PASSED] ttm_device_fini_basic
[10:08:10] [PASSED] ttm_device_init_no_vma_man
[10:08:10] ================== ttm_device_init_pools ==================
[10:08:10] [PASSED] No DMA allocations, no DMA32 required
[10:08:10] [PASSED] DMA allocations, DMA32 required
[10:08:10] [PASSED] No DMA allocations, DMA32 required
[10:08:10] [PASSED] DMA allocations, no DMA32 required
[10:08:10] ============== [PASSED] ttm_device_init_pools ==============
[10:08:10] =================== [PASSED] ttm_device ====================
[10:08:10] ================== ttm_pool (8 subtests) ===================
[10:08:10] ================== ttm_pool_alloc_basic ===================
[10:08:10] [PASSED] One page
[10:08:10] [PASSED] More than one page
[10:08:10] [PASSED] Above the allocation limit
[10:08:10] [PASSED] One page, with coherent DMA mappings enabled
[10:08:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:08:10] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:08:10] ============== ttm_pool_alloc_basic_dma_addr ==============
[10:08:10] [PASSED] One page
[10:08:10] [PASSED] More than one page
[10:08:10] [PASSED] Above the allocation limit
[10:08:10] [PASSED] One page, with coherent DMA mappings enabled
[10:08:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:08:10] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:08:10] [PASSED] ttm_pool_alloc_order_caching_match
[10:08:10] [PASSED] ttm_pool_alloc_caching_mismatch
[10:08:10] [PASSED] ttm_pool_alloc_order_mismatch
[10:08:10] [PASSED] ttm_pool_free_dma_alloc
[10:08:10] [PASSED] ttm_pool_free_no_dma_alloc
[10:08:10] [PASSED] ttm_pool_fini_basic
[10:08:10] ==================== [PASSED] ttm_pool =====================
[10:08:10] ================ ttm_resource (8 subtests) =================
[10:08:10] ================= ttm_resource_init_basic =================
[10:08:10] [PASSED] Init resource in TTM_PL_SYSTEM
[10:08:10] [PASSED] Init resource in TTM_PL_VRAM
[10:08:10] [PASSED] Init resource in a private placement
[10:08:10] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:08:10] ============= [PASSED] ttm_resource_init_basic =============
[10:08:10] [PASSED] ttm_resource_init_pinned
[10:08:10] [PASSED] ttm_resource_fini_basic
[10:08:10] [PASSED] ttm_resource_manager_init_basic
[10:08:10] [PASSED] ttm_resource_manager_usage_basic
[10:08:10] [PASSED] ttm_resource_manager_set_used_basic
[10:08:10] [PASSED] ttm_sys_man_alloc_basic
[10:08:10] [PASSED] ttm_sys_man_free_basic
[10:08:10] ================== [PASSED] ttm_resource ===================
[10:08:10] =================== ttm_tt (15 subtests) ===================
[10:08:10] ==================== ttm_tt_init_basic ====================
[10:08:10] [PASSED] Page-aligned size
[10:08:10] [PASSED] Extra pages requested
[10:08:10] ================ [PASSED] ttm_tt_init_basic ================
[10:08:10] [PASSED] ttm_tt_init_misaligned
[10:08:10] [PASSED] ttm_tt_fini_basic
[10:08:10] [PASSED] ttm_tt_fini_sg
[10:08:10] [PASSED] ttm_tt_fini_shmem
[10:08:10] [PASSED] ttm_tt_create_basic
[10:08:10] [PASSED] ttm_tt_create_invalid_bo_type
[10:08:10] [PASSED] ttm_tt_create_ttm_exists
[10:08:10] [PASSED] ttm_tt_create_failed
[10:08:10] [PASSED] ttm_tt_destroy_basic
[10:08:10] [PASSED] ttm_tt_populate_null_ttm
[10:08:10] [PASSED] ttm_tt_populate_populated_ttm
[10:08:10] [PASSED] ttm_tt_unpopulate_basic
[10:08:10] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:08:10] [PASSED] ttm_tt_swapin_basic
[10:08:10] ===================== [PASSED] ttm_tt ======================
[10:08:10] =================== ttm_bo (14 subtests) ===================
[10:08:10] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[10:08:10] [PASSED] Cannot be interrupted and sleeps
[10:08:10] [PASSED] Cannot be interrupted, locks straight away
[10:08:10] [PASSED] Can be interrupted, sleeps
[10:08:10] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:08:10] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:08:10] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:08:10] [PASSED] ttm_bo_reserve_double_resv
[10:08:10] [PASSED] ttm_bo_reserve_interrupted
[10:08:10] [PASSED] ttm_bo_reserve_deadlock
[10:08:10] [PASSED] ttm_bo_unreserve_basic
[10:08:10] [PASSED] ttm_bo_unreserve_pinned
[10:08:10] [PASSED] ttm_bo_unreserve_bulk
[10:08:10] [PASSED] ttm_bo_fini_basic
[10:08:10] [PASSED] ttm_bo_fini_shared_resv
[10:08:10] [PASSED] ttm_bo_pin_basic
[10:08:10] [PASSED] ttm_bo_pin_unpin_resource
[10:08:10] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:08:10] ===================== [PASSED] ttm_bo ======================
[10:08:10] ============== ttm_bo_validate (21 subtests) ===============
[10:08:10] ============== ttm_bo_init_reserved_sys_man ===============
[10:08:10] [PASSED] Buffer object for userspace
[10:08:10] [PASSED] Kernel buffer object
[10:08:10] [PASSED] Shared buffer object
[10:08:10] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:08:10] ============== ttm_bo_init_reserved_mock_man ==============
[10:08:10] [PASSED] Buffer object for userspace
[10:08:10] [PASSED] Kernel buffer object
[10:08:10] [PASSED] Shared buffer object
[10:08:10] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:08:10] [PASSED] ttm_bo_init_reserved_resv
[10:08:10] ================== ttm_bo_validate_basic ==================
[10:08:10] [PASSED] Buffer object for userspace
[10:08:10] [PASSED] Kernel buffer object
[10:08:10] [PASSED] Shared buffer object
[10:08:10] ============== [PASSED] ttm_bo_validate_basic ==============
[10:08:10] [PASSED] ttm_bo_validate_invalid_placement
[10:08:10] ============= ttm_bo_validate_same_placement ==============
[10:08:10] [PASSED] System manager
[10:08:10] [PASSED] VRAM manager
[10:08:10] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:08:10] [PASSED] ttm_bo_validate_failed_alloc
[10:08:10] [PASSED] ttm_bo_validate_pinned
[10:08:10] [PASSED] ttm_bo_validate_busy_placement
[10:08:10] ================ ttm_bo_validate_multihop =================
[10:08:10] [PASSED] Buffer object for userspace
[10:08:10] [PASSED] Kernel buffer object
[10:08:10] [PASSED] Shared buffer object
[10:08:10] ============ [PASSED] ttm_bo_validate_multihop =============
[10:08:10] ========== ttm_bo_validate_no_placement_signaled ==========
[10:08:10] [PASSED] Buffer object in system domain, no page vector
[10:08:10] [PASSED] Buffer object in system domain with an existing page vector
[10:08:10] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:08:10] ======== ttm_bo_validate_no_placement_not_signaled ========
[10:08:10] [PASSED] Buffer object for userspace
[10:08:10] [PASSED] Kernel buffer object
[10:08:10] [PASSED] Shared buffer object
[10:08:10] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:08:10] [PASSED] ttm_bo_validate_move_fence_signaled
[10:08:10] ========= ttm_bo_validate_move_fence_not_signaled =========
[10:08:10] [PASSED] Waits for GPU
[10:08:10] [PASSED] Tries to lock straight away
[10:08:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:08:10] [PASSED] ttm_bo_validate_happy_evict
[10:08:10] [PASSED] ttm_bo_validate_all_pinned_evict
[10:08:10] [PASSED] ttm_bo_validate_allowed_only_evict
[10:08:10] [PASSED] ttm_bo_validate_deleted_evict
[10:08:10] [PASSED] ttm_bo_validate_busy_domain_evict
[10:08:10] [PASSED] ttm_bo_validate_evict_gutting
[10:08:10] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:08:10] ================= [PASSED] ttm_bo_validate =================
[10:08:10] ============================================================
[10:08:10] Testing complete. Ran 101 tests: passed: 101
[10:08:11] Elapsed time: 20.977s total, 3.068s configuring, 17.630s building, 0.234s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* ✗ CI.checksparse: warning for drm/i915: start dissolving soc/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (9 preceding siblings ...)
2025-11-13 10:08 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-13 10:30 ` Patchwork
2025-11-13 11:15 ` ✓ Xe.CI.BAT: success " Patchwork
` (7 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2025-11-13 10:30 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: start dissolving soc/
URL : https://patchwork.freedesktop.org/series/157488/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast fb991a463f083eaadee5e0de96929117bc9016d4
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_sseu.c:600:17: error: too long token expansion
+drivers/gpu/drm/i915/i915_active.c:1062:16: warning: context imbalance in '__i915_active_fence_set' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: expected struct list_head const *list
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: got struct list_head [noderef] __rcu *pos
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/i915_gpu_error.c:692:3: warning: symbol 'guc_hw_reg_state' was not declared. Should it be static?
+drivers/gpu/drm/i915/i915_irq.c:466:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:466:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:474:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:474:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:479:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:479:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:479:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:517:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:517:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:525:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:525:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:530:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:530:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:530:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:574:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:574:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:577:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:577:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:581:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:581:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:588:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:588:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:588:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:588:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_wakeref.c:148:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: start dissolving soc/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (10 preceding siblings ...)
2025-11-13 10:30 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-11-13 11:15 ` Patchwork
2025-11-13 13:29 ` [PATCH 0/8] " Jani Nikula
` (6 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2025-11-13 11:15 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2247 bytes --]
== Series Details ==
Series: drm/i915: start dissolving soc/
URL : https://patchwork.freedesktop.org/series/157488/
State : success
== Summary ==
CI Bug Log - changes from xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0_BAT -> xe-pw-157488v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-157488v1_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [TIMEOUT][1] ([Intel XE#6506]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/bat-dg2-oem2/igt@xe_waitfence@abstime.html
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [FAIL][3] ([Intel XE#6519]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/bat-dg2-oem2/igt@xe_waitfence@engine.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [FAIL][5] ([Intel XE#6520]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
Build changes
-------------
* Linux: xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0 -> xe-pw-157488v1
IGT_8622: 8622
xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0: 2395af7950abb996316c9ee00f68a639fb6eb1c0
xe-pw-157488v1: 157488v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/index.html
[-- Attachment #2: Type: text/html, Size: 2871 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 0/8] drm/i915: start dissolving soc/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (11 preceding siblings ...)
2025-11-13 11:15 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-11-13 13:29 ` Jani Nikula
2025-11-13 13:44 ` Jani Nikula
2025-11-13 13:37 ` [PATCH] drm/i915/gmch: split out i915_gmch.[ch] from soc Jani Nikula
` (5 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:29 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
On Thu, 13 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> soc/ has served a useful purpose, and way back when it was the obvious
> thing to do. However, it has become a bit awkward, sitting somewhere
> between i915, xe and display.
>
> Split the i915 core specific parts out of intel_dram.c, and move
> intel_dram.c and intel_rom.c under display. This allows us to clean up
> the xe build and compat headers very nicely.
>
> intel_gmch.[ch] still remains under soc/, as it requires a bit more
> thought. But this series is a good start.
After a discussion with Ville, I've got this figured out and the patches
ready as well.
BR,
Jani.
>
> BR,
> Jani.
>
> Jani Nikula (8):
> drm/i915/edram: extract i915_edram.[ch] for edram detection
> drm/i915: split out i915_freq.[ch]
> drm/i915: move intel_dram.[ch] from soc/ to display/
> drm/xe: remove MISSING_CASE() from compat i915_utils.h
> drm/i915/dram: convert to struct intel_display
> drm/i915: move dram_info to struct intel_display
> drm/i915: move intel_rom.[ch] from soc/ to display/
> drm/xe: remove remaining platform checks from compat i915_drv.h
>
> drivers/gpu/drm/i915/Makefile | 8 +-
> drivers/gpu/drm/i915/display/i9xx_wm.c | 5 +-
> drivers/gpu/drm/i915/display/intel_bios.c | 3 +-
> drivers/gpu/drm/i915/display/intel_bw.c | 5 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 7 +-
> .../gpu/drm/i915/display/intel_display_core.h | 4 +
> .../drm/i915/display/intel_display_power.c | 5 +-
> .../drm/i915/{soc => display}/intel_dram.c | 239 ++++++++----------
> .../drm/i915/{soc => display}/intel_dram.h | 12 +-
> .../gpu/drm/i915/{soc => display}/intel_rom.c | 0
> .../gpu/drm/i915/{soc => display}/intel_rom.h | 0
> drivers/gpu/drm/i915/display/skl_watermark.c | 6 +-
> .../gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 +-
> drivers/gpu/drm/i915/i915_driver.c | 7 +-
> drivers/gpu/drm/i915/i915_drv.h | 3 -
> drivers/gpu/drm/i915/i915_edram.c | 44 ++++
> drivers/gpu/drm/i915/i915_edram.h | 11 +
> drivers/gpu/drm/i915/i915_freq.c | 111 ++++++++
> drivers/gpu/drm/i915/i915_freq.h | 13 +
> drivers/gpu/drm/xe/Makefile | 12 +-
> .../gpu/drm/xe/compat-i915-headers/i915_drv.h | 15 --
> .../drm/xe/compat-i915-headers/i915_utils.h | 6 -
> .../xe/compat-i915-headers/soc/intel_dram.h | 6 -
> .../xe/compat-i915-headers/soc/intel_rom.h | 6 -
> drivers/gpu/drm/xe/display/xe_display.c | 4 +-
> drivers/gpu/drm/xe/xe_device_types.h | 8 -
> 27 files changed, 322 insertions(+), 228 deletions(-)
> rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (68%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (68%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
> create mode 100644 drivers/gpu/drm/i915/i915_edram.c
> create mode 100644 drivers/gpu/drm/i915/i915_edram.h
> create mode 100644 drivers/gpu/drm/i915/i915_freq.c
> create mode 100644 drivers/gpu/drm/i915/i915_freq.h
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 0/8] drm/i915: start dissolving soc/
2025-11-13 13:29 ` [PATCH 0/8] " Jani Nikula
@ 2025-11-13 13:44 ` Jani Nikula
0 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:44 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
On Thu, 13 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> On Thu, 13 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
>> soc/ has served a useful purpose, and way back when it was the obvious
>> thing to do. However, it has become a bit awkward, sitting somewhere
>> between i915, xe and display.
>>
>> Split the i915 core specific parts out of intel_dram.c, and move
>> intel_dram.c and intel_rom.c under display. This allows us to clean up
>> the xe build and compat headers very nicely.
>>
>> intel_gmch.[ch] still remains under soc/, as it requires a bit more
>> thought. But this series is a good start.
>
> After a discussion with Ville, I've got this figured out and the patches
> ready as well.
Sent the patches in-reply-to the cover letter for review, though it'll
probably confuse CI and b4. :)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH] drm/i915/gmch: split out i915_gmch.[ch] from soc
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (12 preceding siblings ...)
2025-11-13 13:29 ` [PATCH 0/8] " Jani Nikula
@ 2025-11-13 13:37 ` Jani Nikula
2025-11-13 13:37 ` [PATCH] drm/i915: move intel_gmch.[ch] from soc/ to display/ Jani Nikula
` (4 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:37 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
Most of the soc/intel_gmch.[ch] code is i915 core specific. Split it out
to i915_gmch.[ch].
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_driver.c | 11 +-
drivers/gpu/drm/i915/i915_gmch.c | 141 ++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_gmch.h | 13 +++
drivers/gpu/drm/i915/soc/intel_gmch.c | 132 ------------------------
drivers/gpu/drm/i915/soc/intel_gmch.h | 3 -
6 files changed, 160 insertions(+), 141 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_gmch.c
create mode 100644 drivers/gpu/drm/i915/i915_gmch.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c7ef64b8f99a..90588d5bb908 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -30,6 +30,7 @@ i915-y += \
i915_edram.o \
i915_freq.o \
i915_getparam.o \
+ i915_gmch.o \
i915_ioctl.o \
i915_irq.o \
i915_mitigations.o \
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 1dc6ba4cf5a9..1fc7c5e82923 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -87,8 +87,6 @@
#include "pxp/intel_pxp_debugfs.h"
#include "pxp/intel_pxp_pm.h"
-#include "soc/intel_gmch.h"
-
#include "i915_debugfs.h"
#include "i915_driver.h"
#include "i915_drm_client.h"
@@ -96,6 +94,7 @@
#include "i915_edram.h"
#include "i915_file_private.h"
#include "i915_getparam.h"
+#include "i915_gmch.h"
#include "i915_hwmon.h"
#include "i915_ioc32.h"
#include "i915_ioctl.h"
@@ -322,7 +321,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
if (i915_inject_probe_failure(dev_priv))
return -ENODEV;
- ret = intel_gmch_bridge_setup(dev_priv);
+ ret = i915_gmch_bridge_setup(dev_priv);
if (ret < 0)
return ret;
@@ -339,7 +338,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
}
/* Try to make sure MCHBAR is enabled before poking at it */
- intel_gmch_bar_setup(dev_priv);
+ i915_gmch_bar_setup(dev_priv);
intel_device_info_runtime_init(dev_priv);
intel_display_device_info_runtime_init(display);
@@ -355,7 +354,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
return 0;
err_uncore:
- intel_gmch_bar_teardown(dev_priv);
+ i915_gmch_bar_teardown(dev_priv);
return ret;
}
@@ -366,7 +365,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
*/
static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
{
- intel_gmch_bar_teardown(dev_priv);
+ i915_gmch_bar_teardown(dev_priv);
}
/**
diff --git a/drivers/gpu/drm/i915/i915_gmch.c b/drivers/gpu/drm/i915/i915_gmch.c
new file mode 100644
index 000000000000..2d55831b3c58
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gmch.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <linux/pnp.h>
+
+#include <drm/drm_managed.h>
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_gmch.h"
+#include "intel_pci_config.h"
+
+static void i915_gmch_bridge_release(struct drm_device *dev, void *bridge)
+{
+ pci_dev_put(bridge);
+}
+
+int i915_gmch_bridge_setup(struct drm_i915_private *i915)
+{
+ int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus);
+
+ i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
+ if (!i915->gmch.pdev) {
+ drm_err(&i915->drm, "bridge device not found\n");
+ return -EIO;
+ }
+
+ return drmm_add_action_or_reset(&i915->drm, i915_gmch_bridge_release,
+ i915->gmch.pdev);
+}
+
+static int mchbar_reg(struct drm_i915_private *i915)
+{
+ return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
+}
+
+/* Allocate space for the MCH regs if needed, return nonzero on error */
+static int
+intel_alloc_mchbar_resource(struct drm_i915_private *i915)
+{
+ u32 temp_lo, temp_hi = 0;
+ u64 mchbar_addr;
+ int ret;
+
+ if (GRAPHICS_VER(i915) >= 4)
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, &temp_hi);
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo);
+ mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
+
+ /* If ACPI doesn't have it, assume we need to allocate it ourselves */
+ if (IS_ENABLED(CONFIG_PNP) && mchbar_addr &&
+ pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
+ return 0;
+
+ /* Get some space for it */
+ i915->gmch.mch_res.name = "i915 MCHBAR";
+ i915->gmch.mch_res.flags = IORESOURCE_MEM;
+ ret = pci_bus_alloc_resource(i915->gmch.pdev->bus,
+ &i915->gmch.mch_res,
+ MCHBAR_SIZE, MCHBAR_SIZE,
+ PCIBIOS_MIN_MEM,
+ 0, pcibios_align_resource,
+ i915->gmch.pdev);
+ if (ret) {
+ drm_dbg(&i915->drm, "failed bus alloc: %d\n", ret);
+ i915->gmch.mch_res.start = 0;
+ return ret;
+ }
+
+ if (GRAPHICS_VER(i915) >= 4)
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4,
+ upper_32_bits(i915->gmch.mch_res.start));
+
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+ lower_32_bits(i915->gmch.mch_res.start));
+ return 0;
+}
+
+/* Setup MCHBAR if possible, return true if we should disable it again */
+void i915_gmch_bar_setup(struct drm_i915_private *i915)
+{
+ u32 temp;
+ bool enabled;
+
+ if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ return;
+
+ i915->gmch.mchbar_need_disable = false;
+
+ if (IS_I915G(i915) || IS_I915GM(i915)) {
+ pci_read_config_dword(i915->gmch.pdev, DEVEN, &temp);
+ enabled = !!(temp & DEVEN_MCHBAR_EN);
+ } else {
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
+ enabled = temp & 1;
+ }
+
+ /* If it's already enabled, don't have to do anything */
+ if (enabled)
+ return;
+
+ if (intel_alloc_mchbar_resource(i915))
+ return;
+
+ i915->gmch.mchbar_need_disable = true;
+
+ /* Space is allocated or reserved, so enable it. */
+ if (IS_I915G(i915) || IS_I915GM(i915)) {
+ pci_write_config_dword(i915->gmch.pdev, DEVEN,
+ temp | DEVEN_MCHBAR_EN);
+ } else {
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), temp | 1);
+ }
+}
+
+void i915_gmch_bar_teardown(struct drm_i915_private *i915)
+{
+ if (i915->gmch.mchbar_need_disable) {
+ if (IS_I915G(i915) || IS_I915GM(i915)) {
+ u32 deven_val;
+
+ pci_read_config_dword(i915->gmch.pdev, DEVEN,
+ &deven_val);
+ deven_val &= ~DEVEN_MCHBAR_EN;
+ pci_write_config_dword(i915->gmch.pdev, DEVEN,
+ deven_val);
+ } else {
+ u32 mchbar_val;
+
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+ &mchbar_val);
+ mchbar_val &= ~1;
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+ mchbar_val);
+ }
+ }
+
+ if (i915->gmch.mch_res.start)
+ release_resource(&i915->gmch.mch_res);
+}
diff --git a/drivers/gpu/drm/i915/i915_gmch.h b/drivers/gpu/drm/i915/i915_gmch.h
new file mode 100644
index 000000000000..3ae50bef04ea
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gmch.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_GMCH_H__
+#define __I915_GMCH_H__
+
+struct drm_i915_private;
+
+int i915_gmch_bridge_setup(struct drm_i915_private *i915);
+void i915_gmch_bar_setup(struct drm_i915_private *i915);
+void i915_gmch_bar_teardown(struct drm_i915_private *i915);
+
+#endif /* __I915_GMCH_H__ */
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index 271da30c8290..30f489417064 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -4,10 +4,8 @@
*/
#include <linux/pci.h>
-#include <linux/pnp.h>
#include <linux/vgaarb.h>
-#include <drm/drm_managed.h>
#include <drm/drm_print.h>
#include <drm/intel/i915_drm.h>
@@ -17,136 +15,6 @@
#include "intel_gmch.h"
#include "intel_pci_config.h"
-static void intel_gmch_bridge_release(struct drm_device *dev, void *bridge)
-{
- pci_dev_put(bridge);
-}
-
-int intel_gmch_bridge_setup(struct drm_i915_private *i915)
-{
- int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus);
-
- i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
- if (!i915->gmch.pdev) {
- drm_err(&i915->drm, "bridge device not found\n");
- return -EIO;
- }
-
- return drmm_add_action_or_reset(&i915->drm, intel_gmch_bridge_release,
- i915->gmch.pdev);
-}
-
-static int mchbar_reg(struct drm_i915_private *i915)
-{
- return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
-}
-
-/* Allocate space for the MCH regs if needed, return nonzero on error */
-static int
-intel_alloc_mchbar_resource(struct drm_i915_private *i915)
-{
- u32 temp_lo, temp_hi = 0;
- u64 mchbar_addr;
- int ret;
-
- if (GRAPHICS_VER(i915) >= 4)
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, &temp_hi);
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo);
- mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
-
- /* If ACPI doesn't have it, assume we need to allocate it ourselves */
- if (IS_ENABLED(CONFIG_PNP) && mchbar_addr &&
- pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
- return 0;
-
- /* Get some space for it */
- i915->gmch.mch_res.name = "i915 MCHBAR";
- i915->gmch.mch_res.flags = IORESOURCE_MEM;
- ret = pci_bus_alloc_resource(i915->gmch.pdev->bus,
- &i915->gmch.mch_res,
- MCHBAR_SIZE, MCHBAR_SIZE,
- PCIBIOS_MIN_MEM,
- 0, pcibios_align_resource,
- i915->gmch.pdev);
- if (ret) {
- drm_dbg(&i915->drm, "failed bus alloc: %d\n", ret);
- i915->gmch.mch_res.start = 0;
- return ret;
- }
-
- if (GRAPHICS_VER(i915) >= 4)
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4,
- upper_32_bits(i915->gmch.mch_res.start));
-
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
- lower_32_bits(i915->gmch.mch_res.start));
- return 0;
-}
-
-/* Setup MCHBAR if possible, return true if we should disable it again */
-void intel_gmch_bar_setup(struct drm_i915_private *i915)
-{
- u32 temp;
- bool enabled;
-
- if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
- return;
-
- i915->gmch.mchbar_need_disable = false;
-
- if (IS_I915G(i915) || IS_I915GM(i915)) {
- pci_read_config_dword(i915->gmch.pdev, DEVEN, &temp);
- enabled = !!(temp & DEVEN_MCHBAR_EN);
- } else {
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
- enabled = temp & 1;
- }
-
- /* If it's already enabled, don't have to do anything */
- if (enabled)
- return;
-
- if (intel_alloc_mchbar_resource(i915))
- return;
-
- i915->gmch.mchbar_need_disable = true;
-
- /* Space is allocated or reserved, so enable it. */
- if (IS_I915G(i915) || IS_I915GM(i915)) {
- pci_write_config_dword(i915->gmch.pdev, DEVEN,
- temp | DEVEN_MCHBAR_EN);
- } else {
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), temp | 1);
- }
-}
-
-void intel_gmch_bar_teardown(struct drm_i915_private *i915)
-{
- if (i915->gmch.mchbar_need_disable) {
- if (IS_I915G(i915) || IS_I915GM(i915)) {
- u32 deven_val;
-
- pci_read_config_dword(i915->gmch.pdev, DEVEN,
- &deven_val);
- deven_val &= ~DEVEN_MCHBAR_EN;
- pci_write_config_dword(i915->gmch.pdev, DEVEN,
- deven_val);
- } else {
- u32 mchbar_val;
-
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915),
- &mchbar_val);
- mchbar_val &= ~1;
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
- mchbar_val);
- }
- }
-
- if (i915->gmch.mch_res.start)
- release_resource(&i915->gmch.mch_res);
-}
-
int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
{
struct intel_display *display = i915->display;
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
index 23be2d113afd..907e1ae921e0 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -11,9 +11,6 @@
struct pci_dev;
struct drm_i915_private;
-int intel_gmch_bridge_setup(struct drm_i915_private *i915);
-void intel_gmch_bar_setup(struct drm_i915_private *i915);
-void intel_gmch_bar_teardown(struct drm_i915_private *i915);
int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH] drm/i915: move intel_gmch.[ch] from soc/ to display/
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (13 preceding siblings ...)
2025-11-13 13:37 ` [PATCH] drm/i915/gmch: split out i915_gmch.[ch] from soc Jani Nikula
@ 2025-11-13 13:37 ` Jani Nikula
2025-11-13 13:53 ` Ville Syrjälä
2025-11-13 13:37 ` [PATCH] drm/i915/gmch: convert intel_gmch.c to struct intel_display Jani Nikula
` (3 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:37 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
The sole user of the remaining functions in intel_gmch.[ch] is in
display. Move them under display.
This allows us to remove the compat soc/intel_gmch.h from xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 5 +----
drivers/gpu/drm/i915/{soc => display}/intel_gmch.c | 3 +--
drivers/gpu/drm/i915/{soc => display}/intel_gmch.h | 0
drivers/gpu/drm/i915/display/intel_vga.c | 3 +--
| 6 ------
5 files changed, 3 insertions(+), 14 deletions(-)
rename drivers/gpu/drm/i915/{soc => display}/intel_gmch.c (95%)
rename drivers/gpu/drm/i915/{soc => display}/intel_gmch.h (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 90588d5bb908..98822c98d960 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -57,10 +57,6 @@ i915-y += \
vlv_iosf_sb.o \
vlv_suspend.o
-# core peripheral code
-i915-y += \
- soc/intel_gmch.o
-
# core library code
i915-y += \
i915_memcpy.o \
@@ -280,6 +276,7 @@ i915-y += \
display/intel_flipq.o \
display/intel_frontbuffer.o \
display/intel_global_state.o \
+ display/intel_gmch.o \
display/intel_hdcp.o \
display/intel_hdcp_gsc.o \
display/intel_hdcp_gsc_message.o \
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/display/intel_gmch.c
similarity index 95%
rename from drivers/gpu/drm/i915/soc/intel_gmch.c
rename to drivers/gpu/drm/i915/display/intel_gmch.c
index 30f489417064..7797c7341047 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/display/intel_gmch.c
@@ -9,9 +9,8 @@
#include <drm/drm_print.h>
#include <drm/intel/i915_drm.h>
-#include "../display/intel_display_core.h" /* FIXME */
-
#include "i915_drv.h"
+#include "intel_display_core.h"
#include "intel_gmch.h"
#include "intel_pci_config.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/display/intel_gmch.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_gmch.h
rename to drivers/gpu/drm/i915/display/intel_gmch.h
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 6e125564db34..91ba17965ee3 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -11,10 +11,9 @@
#include <drm/drm_print.h>
#include <video/vga.h>
-#include "soc/intel_gmch.h"
-
#include "intel_de.h"
#include "intel_display.h"
+#include "intel_gmch.h"
#include "intel_vga.h"
#include "intel_vga_regs.h"
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
deleted file mode 100644
index 33c5257b3a71..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_gmch.h"
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH] drm/i915: move intel_gmch.[ch] from soc/ to display/
2025-11-13 13:37 ` [PATCH] drm/i915: move intel_gmch.[ch] from soc/ to display/ Jani Nikula
@ 2025-11-13 13:53 ` Ville Syrjälä
2025-11-13 15:22 ` Jani Nikula
0 siblings, 1 reply; 28+ messages in thread
From: Ville Syrjälä @ 2025-11-13 13:53 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, uma.shankar
On Thu, Nov 13, 2025 at 03:37:50PM +0200, Jani Nikula wrote:
> The sole user of the remaining functions in intel_gmch.[ch] is in
> display. Move them under display.
>
> This allows us to remove the compat soc/intel_gmch.h from xe.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 5 +----
> drivers/gpu/drm/i915/{soc => display}/intel_gmch.c | 3 +--
> drivers/gpu/drm/i915/{soc => display}/intel_gmch.h | 0
> drivers/gpu/drm/i915/display/intel_vga.c | 3 +--
> drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h | 6 ------
> 5 files changed, 3 insertions(+), 14 deletions(-)
> rename drivers/gpu/drm/i915/{soc => display}/intel_gmch.c (95%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_gmch.h (100%)
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 90588d5bb908..98822c98d960 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -57,10 +57,6 @@ i915-y += \
> vlv_iosf_sb.o \
> vlv_suspend.o
>
> -# core peripheral code
> -i915-y += \
> - soc/intel_gmch.o
> -
> # core library code
> i915-y += \
> i915_memcpy.o \
> @@ -280,6 +276,7 @@ i915-y += \
> display/intel_flipq.o \
> display/intel_frontbuffer.o \
> display/intel_global_state.o \
> + display/intel_gmch.o \
I think I'd just stick the stuff into intel_vga.c since
that's where the vgaarb registration is as well.
> display/intel_hdcp.o \
> display/intel_hdcp_gsc.o \
> display/intel_hdcp_gsc_message.o \
> diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/display/intel_gmch.c
> similarity index 95%
> rename from drivers/gpu/drm/i915/soc/intel_gmch.c
> rename to drivers/gpu/drm/i915/display/intel_gmch.c
> index 30f489417064..7797c7341047 100644
> --- a/drivers/gpu/drm/i915/soc/intel_gmch.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmch.c
> @@ -9,9 +9,8 @@
> #include <drm/drm_print.h>
> #include <drm/intel/i915_drm.h>
>
> -#include "../display/intel_display_core.h" /* FIXME */
> -
> #include "i915_drv.h"
> +#include "intel_display_core.h"
> #include "intel_gmch.h"
> #include "intel_pci_config.h"
>
> diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/display/intel_gmch.h
> similarity index 100%
> rename from drivers/gpu/drm/i915/soc/intel_gmch.h
> rename to drivers/gpu/drm/i915/display/intel_gmch.h
> diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
> index 6e125564db34..91ba17965ee3 100644
> --- a/drivers/gpu/drm/i915/display/intel_vga.c
> +++ b/drivers/gpu/drm/i915/display/intel_vga.c
> @@ -11,10 +11,9 @@
> #include <drm/drm_print.h>
> #include <video/vga.h>
>
> -#include "soc/intel_gmch.h"
> -
> #include "intel_de.h"
> #include "intel_display.h"
> +#include "intel_gmch.h"
> #include "intel_vga.h"
> #include "intel_vga_regs.h"
>
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
> deleted file mode 100644
> index 33c5257b3a71..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#include "../../../i915/soc/intel_gmch.h"
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH] drm/i915: move intel_gmch.[ch] from soc/ to display/
2025-11-13 13:53 ` Ville Syrjälä
@ 2025-11-13 15:22 ` Jani Nikula
0 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 15:22 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, uma.shankar
On Thu, 13 Nov 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Thu, Nov 13, 2025 at 03:37:50PM +0200, Jani Nikula wrote:
>> The sole user of the remaining functions in intel_gmch.[ch] is in
>> display. Move them under display.
>>
>> This allows us to remove the compat soc/intel_gmch.h from xe.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/Makefile | 5 +----
>> drivers/gpu/drm/i915/{soc => display}/intel_gmch.c | 3 +--
>> drivers/gpu/drm/i915/{soc => display}/intel_gmch.h | 0
>> drivers/gpu/drm/i915/display/intel_vga.c | 3 +--
>> drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h | 6 ------
>> 5 files changed, 3 insertions(+), 14 deletions(-)
>> rename drivers/gpu/drm/i915/{soc => display}/intel_gmch.c (95%)
>> rename drivers/gpu/drm/i915/{soc => display}/intel_gmch.h (100%)
>> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index 90588d5bb908..98822c98d960 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -57,10 +57,6 @@ i915-y += \
>> vlv_iosf_sb.o \
>> vlv_suspend.o
>>
>> -# core peripheral code
>> -i915-y += \
>> - soc/intel_gmch.o
>> -
>> # core library code
>> i915-y += \
>> i915_memcpy.o \
>> @@ -280,6 +276,7 @@ i915-y += \
>> display/intel_flipq.o \
>> display/intel_frontbuffer.o \
>> display/intel_global_state.o \
>> + display/intel_gmch.o \
>
> I think I'd just stick the stuff into intel_vga.c since
> that's where the vgaarb registration is as well.
Moving this directly to intel_vga.c requires a bunch of in-flight
modifications, because currently it's not compiled for xe, and there's a
dummy implementation of intel_gmch_vga_set_decode(). Or I have to wrap
#ifdef I915 around it or something.
See "[PATCH] drm/xe: use the same vga decode code as i915". If that
regresses, it's trivial to revert that, but if I do that as part of
moving the function to intel_vga.c, it's all mixed up.
Having this in intel_vga.c is the pleasing end result, but none of the
paths there are pleasing. Pick your poison, I guess.
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH] drm/i915/gmch: convert intel_gmch.c to struct intel_display
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (14 preceding siblings ...)
2025-11-13 13:37 ` [PATCH] drm/i915: move intel_gmch.[ch] from soc/ to display/ Jani Nikula
@ 2025-11-13 13:37 ` Jani Nikula
2025-11-13 13:38 ` [PATCH] drm/i915/gmch: find bridge device locally Jani Nikula
` (2 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:37 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
Convert most of intel_gmch.[ch] to struct intel_display. The
i915->gmch.pdev remains for now, but add a local variable for it.
intel_gmch_vga_set_state() is only used internally, make it static while
at it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_gmch.c | 18 ++++++++++--------
drivers/gpu/drm/i915/display/intel_gmch.h | 2 --
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_gmch.c b/drivers/gpu/drm/i915/display/intel_gmch.c
index 7797c7341047..475f2b6ce39e 100644
--- a/drivers/gpu/drm/i915/display/intel_gmch.c
+++ b/drivers/gpu/drm/i915/display/intel_gmch.c
@@ -11,17 +11,19 @@
#include "i915_drv.h"
#include "intel_display_core.h"
+#include "intel_display_types.h"
#include "intel_gmch.h"
#include "intel_pci_config.h"
-int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
+static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
+ struct pci_dev *bridge = i915->gmch.pdev;
unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
u16 gmch_ctrl;
- if (pci_read_config_word(i915->gmch.pdev, reg, &gmch_ctrl)) {
- drm_err(&i915->drm, "failed to read control word\n");
+ if (pci_read_config_word(bridge, reg, &gmch_ctrl)) {
+ drm_err(display->drm, "failed to read control word\n");
return -EIO;
}
@@ -33,8 +35,8 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
else
gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
- if (pci_write_config_word(i915->gmch.pdev, reg, gmch_ctrl)) {
- drm_err(&i915->drm, "failed to write control word\n");
+ if (pci_write_config_word(bridge, reg, gmch_ctrl)) {
+ drm_err(display->drm, "failed to write control word\n");
return -EIO;
}
@@ -43,9 +45,9 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
{
- struct drm_i915_private *i915 = pdev_to_i915(pdev);
+ struct intel_display *display = to_intel_display(pdev);
- intel_gmch_vga_set_state(i915, enable_decode);
+ intel_gmch_vga_set_state(display, enable_decode);
if (enable_decode)
return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
diff --git a/drivers/gpu/drm/i915/display/intel_gmch.h b/drivers/gpu/drm/i915/display/intel_gmch.h
index 907e1ae921e0..bc3421ab5ba6 100644
--- a/drivers/gpu/drm/i915/display/intel_gmch.h
+++ b/drivers/gpu/drm/i915/display/intel_gmch.h
@@ -9,9 +9,7 @@
#include <linux/types.h>
struct pci_dev;
-struct drm_i915_private;
-int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
#endif /* __INTEL_GMCH_H__ */
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH] drm/i915/gmch: find bridge device locally
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (15 preceding siblings ...)
2025-11-13 13:37 ` [PATCH] drm/i915/gmch: convert intel_gmch.c to struct intel_display Jani Nikula
@ 2025-11-13 13:38 ` Jani Nikula
2025-11-13 15:08 ` Ville Syrjälä
2025-11-13 13:38 ` [PATCH] drm/xe: use the same vga decode code as i915 Jani Nikula
2025-11-13 15:45 ` ✗ Xe.CI.Full: failure for " Patchwork
18 siblings, 1 reply; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:38 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
We don't really need the cached i915->gmch.pdev reference. Look up the
bridge device locally, and remove the final dependency on struct
drm_i915_private and i915_drv.h.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_gmch.c | 25 ++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_gmch.c b/drivers/gpu/drm/i915/display/intel_gmch.c
index 475f2b6ce39e..9bf36f02a062 100644
--- a/drivers/gpu/drm/i915/display/intel_gmch.c
+++ b/drivers/gpu/drm/i915/display/intel_gmch.c
@@ -9,7 +9,6 @@
#include <drm/drm_print.h>
#include <drm/intel/i915_drm.h>
-#include "i915_drv.h"
#include "intel_display_core.h"
#include "intel_display_types.h"
#include "intel_gmch.h"
@@ -17,18 +16,26 @@
static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
- struct pci_dev *bridge = i915->gmch.pdev;
+ struct pci_dev *pdev = to_pci_dev(display->drm->dev);
+ struct pci_dev *bridge;
unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
u16 gmch_ctrl;
+ int ret = 0;
+
+ bridge = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), 0, PCI_DEVFN(0, 0));
+ if (!bridge) {
+ drm_err(display->drm, "bridge device not found\n");
+ return -EIO;
+ }
if (pci_read_config_word(bridge, reg, &gmch_ctrl)) {
drm_err(display->drm, "failed to read control word\n");
- return -EIO;
+ ret = -EIO;
+ goto out;
}
if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
- return 0;
+ goto out;
if (enable_decode)
gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
@@ -37,10 +44,14 @@ static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_d
if (pci_write_config_word(bridge, reg, gmch_ctrl)) {
drm_err(display->drm, "failed to write control word\n");
- return -EIO;
+ ret = -EIO;
+ goto out;
}
- return 0;
+out:
+ pci_dev_put(bridge);
+
+ return ret;
}
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH] drm/i915/gmch: find bridge device locally
2025-11-13 13:38 ` [PATCH] drm/i915/gmch: find bridge device locally Jani Nikula
@ 2025-11-13 15:08 ` Ville Syrjälä
2025-11-13 15:26 ` Jani Nikula
0 siblings, 1 reply; 28+ messages in thread
From: Ville Syrjälä @ 2025-11-13 15:08 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, uma.shankar
On Thu, Nov 13, 2025 at 03:38:06PM +0200, Jani Nikula wrote:
> We don't really need the cached i915->gmch.pdev reference. Look up the
> bridge device locally, and remove the final dependency on struct
> drm_i915_private and i915_drv.h.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_gmch.c | 25 ++++++++++++++++-------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_gmch.c b/drivers/gpu/drm/i915/display/intel_gmch.c
> index 475f2b6ce39e..9bf36f02a062 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmch.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmch.c
> @@ -9,7 +9,6 @@
> #include <drm/drm_print.h>
> #include <drm/intel/i915_drm.h>
>
> -#include "i915_drv.h"
> #include "intel_display_core.h"
> #include "intel_display_types.h"
> #include "intel_gmch.h"
> @@ -17,18 +16,26 @@
>
> static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> - struct pci_dev *bridge = i915->gmch.pdev;
> + struct pci_dev *pdev = to_pci_dev(display->drm->dev);
> + struct pci_dev *bridge;
> unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
> u16 gmch_ctrl;
> + int ret = 0;
> +
> + bridge = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), 0, PCI_DEVFN(0, 0));
> + if (!bridge) {
> + drm_err(display->drm, "bridge device not found\n");
> + return -EIO;
> + }
>
> if (pci_read_config_word(bridge, reg, &gmch_ctrl)) {
I think you could just use pci_bus_{read,write}_config_word() and then
you don't need the pci_dev reference. That's what I've used in the
overlay workaround code as well.
I was pondering how this even works on discrete GPUs, but there it
seems the GPU PCI device is devfn=0.0 sitting on its own bus. So it
seems that it should work. Well, work in the sense that it accesses
the correct register. But in reality this code is complete nonsense
as this register is locked by the BIOS and so can't actually be
written by the driver.
The alternative approach would be to use the actual GPU PCI device
on SNB+ since the GGC register is also mirrored there (and I think
also mirrored in MCHBAR, so we could also use MMIO to access it
instead). I suppose it's technically the mirror that we're accessing
on dGPUs here always. On integrated we could choose to use either one.
> drm_err(display->drm, "failed to read control word\n");
> - return -EIO;
> + ret = -EIO;
> + goto out;
> }
>
> if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
> - return 0;
> + goto out;
>
> if (enable_decode)
> gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
> @@ -37,10 +44,14 @@ static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_d
>
> if (pci_write_config_word(bridge, reg, gmch_ctrl)) {
> drm_err(display->drm, "failed to write control word\n");
> - return -EIO;
> + ret = -EIO;
> + goto out;
> }
>
> - return 0;
> +out:
> + pci_dev_put(bridge);
> +
> + return ret;
> }
>
> unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH] drm/i915/gmch: find bridge device locally
2025-11-13 15:08 ` Ville Syrjälä
@ 2025-11-13 15:26 ` Jani Nikula
0 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 15:26 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, uma.shankar
On Thu, 13 Nov 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Thu, Nov 13, 2025 at 03:38:06PM +0200, Jani Nikula wrote:
>> We don't really need the cached i915->gmch.pdev reference. Look up the
>> bridge device locally, and remove the final dependency on struct
>> drm_i915_private and i915_drv.h.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_gmch.c | 25 ++++++++++++++++-------
>> 1 file changed, 18 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_gmch.c b/drivers/gpu/drm/i915/display/intel_gmch.c
>> index 475f2b6ce39e..9bf36f02a062 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gmch.c
>> +++ b/drivers/gpu/drm/i915/display/intel_gmch.c
>> @@ -9,7 +9,6 @@
>> #include <drm/drm_print.h>
>> #include <drm/intel/i915_drm.h>
>>
>> -#include "i915_drv.h"
>> #include "intel_display_core.h"
>> #include "intel_display_types.h"
>> #include "intel_gmch.h"
>> @@ -17,18 +16,26 @@
>>
>> static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
>> {
>> - struct drm_i915_private *i915 = to_i915(display->drm);
>> - struct pci_dev *bridge = i915->gmch.pdev;
>> + struct pci_dev *pdev = to_pci_dev(display->drm->dev);
>> + struct pci_dev *bridge;
>> unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
>> u16 gmch_ctrl;
>> + int ret = 0;
>> +
>> + bridge = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), 0, PCI_DEVFN(0, 0));
>> + if (!bridge) {
>> + drm_err(display->drm, "bridge device not found\n");
>> + return -EIO;
>> + }
>>
>> if (pci_read_config_word(bridge, reg, &gmch_ctrl)) {
>
> I think you could just use pci_bus_{read,write}_config_word() and then
> you don't need the pci_dev reference. That's what I've used in the
> overlay workaround code as well.
Oh, neat, seems cleaner.
> I was pondering how this even works on discrete GPUs, but there it
> seems the GPU PCI device is devfn=0.0 sitting on its own bus. So it
> seems that it should work. Well, work in the sense that it accesses
> the correct register. But in reality this code is complete nonsense
> as this register is locked by the BIOS and so can't actually be
> written by the driver.
>
> The alternative approach would be to use the actual GPU PCI device
> on SNB+ since the GGC register is also mirrored there (and I think
> also mirrored in MCHBAR, so we could also use MMIO to access it
> instead). I suppose it's technically the mirror that we're accessing
> on dGPUs here always. On integrated we could choose to use either one.
I'm just trying to dodge *that* specific part of the mess during the
refactoring! ;D
BR,
Jani.
>
>> drm_err(display->drm, "failed to read control word\n");
>> - return -EIO;
>> + ret = -EIO;
>> + goto out;
>> }
>>
>> if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
>> - return 0;
>> + goto out;
>>
>> if (enable_decode)
>> gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
>> @@ -37,10 +44,14 @@ static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_d
>>
>> if (pci_write_config_word(bridge, reg, gmch_ctrl)) {
>> drm_err(display->drm, "failed to write control word\n");
>> - return -EIO;
>> + ret = -EIO;
>> + goto out;
>> }
>>
>> - return 0;
>> +out:
>> + pci_dev_put(bridge);
>> +
>> + return ret;
>> }
>>
>> unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
>> --
>> 2.47.3
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH] drm/xe: use the same vga decode code as i915
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (16 preceding siblings ...)
2025-11-13 13:38 ` [PATCH] drm/i915/gmch: find bridge device locally Jani Nikula
@ 2025-11-13 13:38 ` Jani Nikula
2025-11-14 22:23 ` kernel test robot
2025-11-13 15:45 ` ✗ Xe.CI.Full: failure for " Patchwork
18 siblings, 1 reply; 28+ messages in thread
From: Jani Nikula @ 2025-11-13 13:38 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, uma.shankar
Drop the no-op intel_gmch_vga_set_decode() and xe_display_misc.c, and
build intel_gmch.c in xe instead.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/xe/Makefile | 2 +-
drivers/gpu/drm/xe/display/xe_display_misc.c | 16 ----------------
2 files changed, 1 insertion(+), 17 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/display/xe_display_misc.c
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7d0d4c780145..54b7dd06a802 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -206,7 +206,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/intel_fb_bo.o \
display/intel_fbdev_fb.o \
display/xe_display.o \
- display/xe_display_misc.o \
display/xe_display_rpm.o \
display/xe_display_wa.o \
display/xe_dsb_buffer.o \
@@ -280,6 +279,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_frontbuffer.o \
i915-display/intel_global_state.o \
i915-display/intel_gmbus.o \
+ i915-display/intel_gmch.o \
i915-display/intel_hdcp.o \
i915-display/intel_hdcp_gsc_message.o \
i915-display/intel_hdmi.o \
diff --git a/drivers/gpu/drm/xe/display/xe_display_misc.c b/drivers/gpu/drm/xe/display/xe_display_misc.c
deleted file mode 100644
index 242c2ef4ca93..000000000000
--- a/drivers/gpu/drm/xe/display/xe_display_misc.c
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "intel_display_types.h"
-
-struct pci_dev;
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
- /* ToDo: Implement the actual handling of vga decode */
- return 0;
-}
--
2.47.3
^ permalink raw reply related [flat|nested] 28+ messages in thread* ✗ Xe.CI.Full: failure for drm/xe: use the same vga decode code as i915
2025-11-13 9:57 [PATCH 0/8] drm/i915: start dissolving soc/ Jani Nikula
` (17 preceding siblings ...)
2025-11-13 13:38 ` [PATCH] drm/xe: use the same vga decode code as i915 Jani Nikula
@ 2025-11-13 15:45 ` Patchwork
18 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2025-11-13 15:45 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 50544 bytes --]
== Series Details ==
Series: drm/xe: use the same vga decode code as i915
URL : https://patchwork.freedesktop.org/series/157488/
State : failure
== Summary ==
CI Bug Log - changes from xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0_FULL -> xe-pw-157488v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157488v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157488v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157488v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_threads@threads-bal-mixed-fd-userptr-invalidate:
- shard-dg2-set2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-436/igt@xe_exec_threads@threads-bal-mixed-fd-userptr-invalidate.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-435/igt@xe_exec_threads@threads-bal-mixed-fd-userptr-invalidate.html
#### Warnings ####
* igt@xe_module_load@load:
- shard-adlp: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [SKIP][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28]) ([Intel XE#378] / [Intel XE#5612]) -> ([DMESG-WARN][29], [DMESG-WARN][30], [DMESG-WARN][31], [DMESG-WARN][32], [DMESG-WARN][33], [DMESG-WARN][34], [DMESG-WARN][35], [DMESG-WARN][36], [DMESG-WARN][37], [DMESG-WARN][38], [DMESG-WARN][39], [DMESG-WARN][40], [DMESG-WARN][41], [DMESG-WARN][42], [DMESG-WARN][43], [DMESG-WARN][44], [DMESG-WARN][45], [DMESG-WARN][46], [DMESG-WARN][47], [DMESG-WARN][48], [DMESG-WARN][49], [DMESG-WARN][50], [DMESG-WARN][51], [DMESG-WARN][52], [DMESG-WARN][53])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-3/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-6/igt@xe_module_load@load.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-1/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-8/igt@xe_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-8/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-1/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-3/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-3/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-2/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-2/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-4/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-4/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-9/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-9/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-4/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-9/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-3/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-9/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-4/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-8/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-6/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-6/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-2/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-4/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-6/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-adlp-1/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-4/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-4/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-4/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-1/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-1/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-1/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-1/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-6/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-6/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-6/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-6/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-2/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-2/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-2/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-3/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-3/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-3/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-3/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-8/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-8/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-8/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-9/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-9/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-9/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-adlp-9/igt@xe_module_load@load.html
Known issues
------------
Here are the changes found in xe-pw-157488v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2370])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2327]) +3 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#316])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#1124]) +7 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#610])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#1124]) +5 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#367])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][62] ([Intel XE#367]) +2 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#787]) +27 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#2907])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2887]) +12 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [PASS][67] -> [INCOMPLETE][68] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [PASS][69] -> [INCOMPLETE][70] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4:
- shard-dg2-set2: [PASS][71] -> [INCOMPLETE][72] ([Intel XE#6168])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6:
- shard-dg2-set2: [PASS][73] -> [DMESG-WARN][74] ([Intel XE#1727] / [Intel XE#3113])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4:
- shard-dg2-set2: [PASS][75] -> [INCOMPLETE][76] ([Intel XE#2705] / [Intel XE#4212])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][77] ([Intel XE#2652] / [Intel XE#787]) +12 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#2724])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_color@ctm-negative:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#2325]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_color@degamma:
- shard-dg2-set2: NOTRUN -> [SKIP][80] ([Intel XE#306])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-dg2-set2: NOTRUN -> [SKIP][81] ([Intel XE#373]) +3 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2252]) +6 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][83] ([Intel XE#1178]) +1 other test fail
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#307])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: NOTRUN -> [FAIL][85] ([Intel XE#1178])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][86] ([Intel XE#3304])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_content_protection@uevent:
- shard-dg2-set2: NOTRUN -> [FAIL][87] ([Intel XE#1188]) +1 other test fail
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2321]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-32x10:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#2320]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_cursor_crc@cursor-onscreen-32x10.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#308])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-bmg: [PASS][91] -> [SKIP][92] ([Intel XE#2291]) +4 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-2/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][93] -> [FAIL][94] ([Intel XE#1475])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#2286])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [PASS][96] -> [SKIP][97] ([Intel XE#1340])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#4331])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#2244])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_feature_discovery@psr1:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2374])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-bmg: [PASS][101] -> [SKIP][102] ([Intel XE#2316]) +3 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#2293]) +3 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#2311]) +20 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#6313])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#5390]) +8 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][108] ([Intel XE#651]) +11 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#6312]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#2313]) +22 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
- shard-dg2-set2: NOTRUN -> [SKIP][111] ([Intel XE#653]) +10 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#5672])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][113] -> [SKIP][114] ([Intel XE#1503])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#2925]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: NOTRUN -> [SKIP][116] ([Intel XE#2501])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [PASS][117] -> [SKIP][118] ([Intel XE#4596])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-4.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-bmg: NOTRUN -> [SKIP][119] ([Intel XE#2391])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][120] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#1406] / [Intel XE#1489]) +6 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#1406] / [Intel XE#1489]) +3 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-dg2-set2: NOTRUN -> [SKIP][123] ([Intel XE#1122] / [Intel XE#1406])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr-sprite-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][124] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +6 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_psr@fbc-psr-sprite-plane-onoff.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +9 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#3414] / [Intel XE#3904])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#3414])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#2413])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_sharpness_filter@filter-tap:
- shard-bmg: NOTRUN -> [SKIP][129] ([Intel XE#6503]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@kms_sharpness_filter@filter-tap.html
* igt@kms_sharpness_filter@invalid-plane-with-filter:
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#455]) +8 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@kms_sharpness_filter@invalid-plane-with-filter.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#2450])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flip-basic:
- shard-bmg: NOTRUN -> [SKIP][132] ([Intel XE#1499])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@kms_vrr@flip-basic.html
* igt@kms_vrr@lobf:
- shard-dg2-set2: NOTRUN -> [SKIP][133] ([Intel XE#2168])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_vrr@lobf.html
* igt@kms_vrr@negative-basic:
- shard-bmg: [PASS][134] -> [SKIP][135] ([Intel XE#1499])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-8/igt@kms_vrr@negative-basic.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_vrr@negative-basic.html
* igt@xe_create@multigpu-create-massive-size:
- shard-dg2-set2: NOTRUN -> [SKIP][136] ([Intel XE#944])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eu_stall@blocking-re-enable:
- shard-dg2-set2: NOTRUN -> [SKIP][137] ([Intel XE#5626]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_eu_stall@blocking-re-enable.html
* igt@xe_eudebug_online@single-step-one:
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#4837]) +9 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@xe_eudebug_online@single-step-one.html
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram:
- shard-dg2-set2: NOTRUN -> [SKIP][139] ([Intel XE#4837]) +1 other test skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#2322]) +5 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race:
- shard-dg2-set2: NOTRUN -> [SKIP][141] ([Intel XE#288]) +7 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
- shard-dg2-set2: NOTRUN -> [SKIP][142] ([Intel XE#2360])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge:
- shard-bmg: NOTRUN -> [SKIP][143] ([Intel XE#4943]) +16 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map:
- shard-dg2-set2: NOTRUN -> [SKIP][144] ([Intel XE#4915]) +140 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-prefetch:
- shard-bmg: [PASS][145] -> [ABORT][146] ([Intel XE#3970])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-prefetch.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-prefetch.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- shard-bmg: NOTRUN -> [SKIP][147] ([Intel XE#2229])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_oa@closed-fd-and-unmapped-access:
- shard-dg2-set2: NOTRUN -> [SKIP][148] ([Intel XE#3573]) +4 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_oa@closed-fd-and-unmapped-access.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: NOTRUN -> [SKIP][149] ([Intel XE#2284])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][150] ([Intel XE#2284] / [Intel XE#366])
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
- shard-bmg: [PASS][151] -> [FAIL][152] ([Intel XE#6251]) +5 other tests fail
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-2/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-4/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][153] ([Intel XE#4733]) +1 other test skip
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][154] ([Intel XE#4733]) +1 other test skip
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-bmg: NOTRUN -> [SKIP][155] ([Intel XE#944])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-7/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-dg2-set2: NOTRUN -> [SKIP][156] ([Intel XE#4351])
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-466/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
#### Possible fixes ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][157] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [PASS][158] +1 other test pass
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-bmg: [SKIP][159] ([Intel XE#2291]) -> [PASS][160] +2 other tests pass
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [SKIP][161] ([Intel XE#2316]) -> [PASS][162] +6 other tests pass
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-suspend:
- shard-dg2-set2: [INCOMPLETE][163] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][164] +1 other test pass
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-435/igt@kms_flip@flip-vs-suspend.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-463/igt@kms_flip@flip-vs-suspend.html
* {igt@kms_sharpness_filter@filter-formats@pipe-a-edp-1-nv12}:
- shard-lnl: [DMESG-WARN][165] ([Intel XE#4537]) -> [PASS][166] +1 other test pass
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-lnl-3/igt@kms_sharpness_filter@filter-formats@pipe-a-edp-1-nv12.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-lnl-3/igt@kms_sharpness_filter@filter-formats@pipe-a-edp-1-nv12.html
* igt@xe_pmu@engine-activity-accuracy-90:
- shard-lnl: [FAIL][167] ([Intel XE#6251]) -> [PASS][168] +3 other tests pass
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90.html
#### Warnings ####
* igt@kms_content_protection@srm:
- shard-bmg: [FAIL][169] ([Intel XE#1178]) -> [SKIP][170] ([Intel XE#2341])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-8/igt@kms_content_protection@srm.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_content_protection@srm.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move:
- shard-bmg: [SKIP][171] ([Intel XE#2312]) -> [SKIP][172] ([Intel XE#2311]) +11 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][173] ([Intel XE#5390]) -> [SKIP][174] ([Intel XE#2312]) +6 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][175] ([Intel XE#2312]) -> [SKIP][176] ([Intel XE#5390]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][177] ([Intel XE#2311]) -> [SKIP][178] ([Intel XE#2312]) +9 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][179] ([Intel XE#2313]) -> [SKIP][180] ([Intel XE#2312]) +10 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
- shard-bmg: [SKIP][181] ([Intel XE#2312]) -> [SKIP][182] ([Intel XE#2313]) +12 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][183] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][184] ([Intel XE#3544])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][185] ([Intel XE#1729]) -> [SKIP][186] ([Intel XE#2426])
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html
- shard-dg2-set2: [SKIP][187] ([Intel XE#362]) -> [FAIL][188] ([Intel XE#1729])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/shard-dg2-432/igt@kms_tiled_display@basic-test-pattern.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4537]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4537
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5672]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5672
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6313
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0 -> xe-pw-157488v1
IGT_8622: 8622
xe-4096-2395af7950abb996316c9ee00f68a639fb6eb1c0: 2395af7950abb996316c9ee00f68a639fb6eb1c0
xe-pw-157488v1: 157488v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157488v1/index.html
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