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d="scan'208";a="69569479" Received: from orsosgc001.jf.intel.com (HELO orsosgc001.intel.com) ([10.165.21.138]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2024 12:56:09 -0700 Date: Wed, 18 Sep 2024 12:56:08 -0700 Message-ID: <85cyl07n3b.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: "Souza, Jose" Cc: "intel-xe@lists.freedesktop.org" Subject: Re: [PATCH 3/7] drm/xe/oa: Add input fence dependencies In-Reply-To: <9b011eebe08c4458b48f9248d7e8082cb33a6501.camel@intel.com> References: <20240830221618.2103948-1-ashutosh.dixit@intel.com> <20240830221618.2103948-4-ashutosh.dixit@intel.com> <9b011eebe08c4458b48f9248d7e8082cb33a6501.camel@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-redhat-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Wed, 18 Sep 2024 04:59:59 -0700, Souza, Jose wrote: > Hi Jose, > On Fri, 2024-08-30 at 15:16 -0700, Ashutosh Dixit wrote: > > Add input fence dependencies which will make OA configuration wait till > > these dependencies are met (till input fences signal). > > > > v2: Change add_deps arg to xe_oa_submit_bb from bool to enum (Matt Brost) > > > > Reviewed-by: Jonathan Cavitt > > Signed-off-by: Ashutosh Dixit > > --- > > drivers/gpu/drm/xe/xe_oa.c | 25 +++++++++++++++++++++---- > > 1 file changed, 21 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > index 8ada74da3da19..b4b68019d35b7 100644 > > --- a/drivers/gpu/drm/xe/xe_oa.c > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > @@ -42,6 +42,11 @@ > > #define DEFAULT_POLL_PERIOD_NS (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY_HZ) > > #define XE_OA_UNIT_INVALID U32_MAX > > > > +enum xe_oa_submit_deps { > > + XE_OA_SUBMIT_NO_DEPS, > > + XE_OA_SUBMIT_ADD_DEPS, > > +}; > > + > > struct xe_oa_reg { > > struct xe_reg addr; > > u32 value; > > @@ -568,7 +573,8 @@ static __poll_t xe_oa_poll(struct file *file, poll_table *wait) > > return ret; > > } > > > > -static struct dma_fence *xe_oa_submit_bb(struct xe_oa_stream *stream, struct xe_bb *bb) > > +static struct dma_fence *xe_oa_submit_bb(struct xe_oa_stream *stream, enum xe_oa_submit_deps deps, > > + struct xe_bb *bb) > > { > > struct xe_sched_job *job; > > struct dma_fence *fence; > > @@ -581,11 +587,22 @@ static struct dma_fence *xe_oa_submit_bb(struct xe_oa_stream *stream, struct xe_ > > goto exit; > > } > > > > + if (deps == XE_OA_SUBMIT_ADD_DEPS) { > > + for (int i = 0; i < stream->num_syncs && !err; i++) > > + err = xe_sync_entry_add_deps(&stream->syncs[i], job); > > err needs to be initialize to 0 otherwise it could take the error path > below when there is no syncs set. Somehow I missed this because I never see the drm_dbg print below. Anyway, I have added the initialization, though the change is in Patch 1 of the series since the initialization was there and it was removed in Patch 1. Thanks for catching this, Ashutosh > > > + if (err) { > > + drm_dbg(&stream->oa->xe->drm, "xe_sync_entry_add_deps err %d\n", err); > > + goto err_put_job; > > + } > > + } > > + > > xe_sched_job_arm(job); > > fence = dma_fence_get(&job->drm.s_fence->finished); > > xe_sched_job_push(job); > > > > return fence; > > +err_put_job: > > + xe_sched_job_put(job); > > exit: > > return ERR_PTR(err); > > } > > @@ -663,7 +680,7 @@ static int xe_oa_modify_ctx_image(struct xe_oa_stream *stream, struct xe_lrc *lr > > > > xe_oa_store_flex(stream, lrc, bb, flex, count); > > > > - fence = xe_oa_submit_bb(stream, bb); > > + fence = xe_oa_submit_bb(stream, XE_OA_SUBMIT_NO_DEPS, bb); > > if (IS_ERR(fence)) { > > err = PTR_ERR(fence); > > goto free_bb; > > @@ -692,7 +709,7 @@ static int xe_oa_load_with_lri(struct xe_oa_stream *stream, struct xe_oa_reg *re > > > > write_cs_mi_lri(bb, reg_lri, 1); > > > > - fence = xe_oa_submit_bb(stream, bb); > > + fence = xe_oa_submit_bb(stream, XE_OA_SUBMIT_NO_DEPS, bb); > > if (IS_ERR(fence)) { > > err = PTR_ERR(fence); > > goto free_bb; > > @@ -943,7 +960,7 @@ static int xe_oa_emit_oa_config(struct xe_oa_stream *stream, struct xe_oa_config > > goto exit; > > } > > > > - fence = xe_oa_submit_bb(stream, oa_bo->bb); > > + fence = xe_oa_submit_bb(stream, XE_OA_SUBMIT_ADD_DEPS, oa_bo->bb); > > if (IS_ERR(fence)) { > > err = PTR_ERR(fence); > > goto exit; >