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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: "Olson, Matthew" <matthew.olson@intel.com>
Cc: Harish Chegondi <harish.chegondi@intel.com>,
	<intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v8 5/7] drm/xe/eustall: Add EU stall sampling support for Xe2
Date: Tue, 04 Feb 2025 17:57:17 -0800	[thread overview]
Message-ID: <85msf1dugy.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <Z6K70DoXZyfTN_eD@bolson-desk>

On Tue, 04 Feb 2025 17:16:00 -0800, Olson, Matthew wrote:
>

Hi Matt,

> On Wed, Jan 29, 2025 at 08:55:42PM -0800, Dixit, Ashutosh wrote:
> > On Wed, 15 Jan 2025 12:02:11 -0800, Harish Chegondi wrote:
> > > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > index 437782f8433c..d72f80a9dfe4 100644
> > > --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> > > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > @@ -73,6 +73,42 @@ struct xe_eu_stall_data_pvc {
> > >	__u64 unused[6];
> > >  } __packed;
> > >
> > > +/**
> > > + * struct xe_eu_stall_data_xe2 - EU stall data format for LNL, BMG
> > > + *
> > > + * Bits		Field
> > > + * 0  to 28	IP (addr)
> > > + * 29 to 36	Tdr count
> > > + * 37 to 44	other count
> > > + * 45 to 52	control count
> > > + * 53 to 60	pipestall count
> > > + * 61 to 68	send count
> > > + * 69 to 76	dist_acc count
> > > + * 77 to 84	sbid count
> > > + * 85 to 92	sync count
> > > + * 93 to 100	inst_fetch count
> > > + * 101 to 108	Active count
> > > + * 109 to 111	Exid
> > > + * 112		EndFlag (is always 1)
> > > + */
> > > +struct xe_eu_stall_data_xe2 {
> > > +	__u64 ip_addr:29;
> > > +	__u64 tdr_count:8;
> > > +	__u64 other_count:8;
> > > +	__u64 control_count:8;
> > > +	__u64 pipestall_count:8;
> > > +	__u64 send_count:8;
> > > +	__u64 dist_acc_count:8;
> > > +	__u64 sbid_count:8;
> > > +	__u64 sync_count:8;
> > > +	__u64 inst_fetch_count:8;
> > > +	__u64 active_count:8;
> > > +	__u64 ex_id:3;
> > > +	__u64 end_flag:1;
> > > +	__u64 unused_bits:15;
> > > +	__u64 unused[6];
> > > +} __packed;
> >
> > Same question about whether or not to retain this struct. Retain it if we
> > want to document this information otherwise drop it and just keep sizeof.
>
> I'd prefer to keep them, as I've personally found it convenient to refer
> to them while while writing the userspace reader of these samples. I'm not
> aware of any other particular place that they can be found, other than
> maybe some other public repo that uses the i915 version of this interface
> (IGT, maybe?). I'd venture to guess that others trying to call this
> code are also going to be searching for these definitions in
> `drivers/gpu/drm/xe` as well.

Yes, they are present in the IGT's too:

https://patchwork.freedesktop.org/patch/630656/?series=143030&rev=1

Would that work for you, or you prefer them in the kernel? Just trying to
get an idea right now, not deciding one way or another.

Thanks.
--
Ashutosh



>
> >
> > > +
> > >  static u64 per_xecore_buf_size = SZ_512K;
> > >
> > >  static unsigned long
> > > @@ -83,6 +119,8 @@ xe_eu_stall_data_record_size(struct xe_device *xe)
> > >
> > >	if (platform == XE_PVC)
> > >		record_size = sizeof(struct xe_eu_stall_data_pvc);
> > > +	else if ((platform == XE_LUNARLAKE) || (platform == XE_BATTLEMAGE))
> >
> > 'else if (GRAPHICS_VER(xe) >= 20)' so that we don't have to keep adding
> > each individual platform.
> >
> > > +		record_size = sizeof(struct xe_eu_stall_data_xe2);
> > >
> > >	return record_size;
> > >  }
> > > @@ -311,10 +349,16 @@ eu_stall_data_buf_check(struct xe_eu_stall_data_stream *stream)
> > >  static void
> > >  clear_dropped_eviction_line_bit(struct xe_gt *gt, u16 group, u16 instance)
> > >  {
> > > +	struct xe_device *xe = gt_to_xe(gt);
> > >	u32 write_ptr_reg;
> > >
> > > -	/* On PVC, the overflow bit has to be cleared by writing 1 to it. */
> > > -	write_ptr_reg = _MASKED_BIT_ENABLE(XEHPC_EUSTALL_REPORT_OVERFLOW_DROP);
> > > +	/* On PVC, the overflow bit has to be cleared by writing 1 to it.
> > > +	 * On other GPUs, the bit has to be cleared by writing 0 to it.
> > > +	 */
> > > +	if (GRAPHICS_VER(xe) >= 20)
> > > +		write_ptr_reg = _MASKED_BIT_DISABLE(XEHPC_EUSTALL_REPORT_OVERFLOW_DROP);
> > > +	else
> > > +		write_ptr_reg = _MASKED_BIT_ENABLE(XEHPC_EUSTALL_REPORT_OVERFLOW_DROP);
> > >
> > >	xe_gt_mcr_unicast_write(gt, XEHPC_EUSTALL_REPORT, write_ptr_reg, group, instance);
> > >  }
> > > @@ -882,7 +926,9 @@ static const struct file_operations fops_eu_stall = {
> > >
> > >  static inline bool has_eu_stall_sampling_support(struct xe_device *xe)
> > >  {
> > > -	return ((xe->info.platform == XE_PVC) ? true : false);
> > > +	return ((xe->info.platform == XE_PVC ||
> > > +		 xe->info.platform == XE_LUNARLAKE ||
> > > +		 xe->info.platform == XE_BATTLEMAGE) ? true : false);
> >
> > Same here, use (GRAPHICS_VER(xe) >= 20).
> >
> > >  }
> > >
> > >  /**
> > > --
> > > 2.47.1
> > >

  reply	other threads:[~2025-02-05  1:57 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-15 20:02 [PATCH v8 0/7] Add support for EU stall sampling Harish Chegondi
2025-01-15 20:02 ` [PATCH v8 1/7] drm/xe/topology: Add a function to find the index of the last enabled DSS in a mask Harish Chegondi
2025-01-17 17:25   ` Dixit, Ashutosh
2025-01-22  5:18     ` Harish Chegondi
2025-01-15 20:02 ` [PATCH v8 2/7] drm/xe/uapi: Introduce API for EU stall sampling Harish Chegondi
2025-01-17 19:02   ` Dixit, Ashutosh
2025-01-22 23:44     ` Harish Chegondi
2025-01-23  2:19       ` Dixit, Ashutosh
2025-01-15 20:02 ` [PATCH v8 3/7] drm/xe/eustall: Implement EU stall sampling APIs for Xe_HPC Harish Chegondi
2025-01-18  2:34   ` Dixit, Ashutosh
2025-01-23 18:51   ` Dixit, Ashutosh
2025-01-25  3:09   ` [PATCH v8 3 " Dixit, Ashutosh
2025-01-29  4:12   ` [PATCH v8 4 " Dixit, Ashutosh
2025-01-29  4:32     ` Dixit, Ashutosh
2025-01-30 18:46     ` Harish Chegondi
2025-01-31  3:23       ` Dixit, Ashutosh
2025-01-15 20:02 ` [PATCH v8 4/7] drm/xe/eustall: Return -EIO error from read() if HW drops data Harish Chegondi
2025-01-30  4:45   ` Dixit, Ashutosh
2025-01-30 17:05     ` Dixit, Ashutosh
2025-01-31 21:50       ` Harish Chegondi
2025-01-31 19:30     ` Harish Chegondi
2025-01-31 20:19       ` Dixit, Ashutosh
2025-01-31 22:59         ` Harish Chegondi
2025-02-01  0:13           ` Dixit, Ashutosh
2025-02-01  6:57             ` Dixit, Ashutosh
2025-01-15 20:02 ` [PATCH v8 5/7] drm/xe/eustall: Add EU stall sampling support for Xe2 Harish Chegondi
2025-01-30  4:55   ` Dixit, Ashutosh
2025-02-05  1:16     ` Olson, Matthew
2025-02-05  1:57       ` Dixit, Ashutosh [this message]
2025-02-05 19:03         ` Olson, Matthew
2025-02-05 20:02           ` Dixit, Ashutosh
2025-01-15 20:02 ` [PATCH v8 6/7] drm/xe/uapi: Add a device query to get EU stall sampling information Harish Chegondi
2025-01-16 22:34   ` Dixit, Ashutosh
2025-01-22  2:48     ` Harish Chegondi
2025-01-22  3:00       ` Dixit, Ashutosh
2025-01-30 17:36   ` Dixit, Ashutosh
2025-01-15 20:02 ` [PATCH v8 7/7] drm/xe/eustall: Add workaround 22016596838 which applies to PVC Harish Chegondi
2025-01-30  5:14   ` Dixit, Ashutosh
2025-01-15 20:46 ` ✓ CI.Patch_applied: success for Add support for EU stall sampling Patchwork
2025-01-15 20:46 ` ✗ CI.checkpatch: warning " Patchwork
2025-01-15 20:48 ` ✓ CI.KUnit: success " Patchwork
2025-01-15 21:14 ` ✓ CI.Build: " Patchwork
2025-01-15 21:16 ` ✗ CI.Hooks: failure " Patchwork
2025-01-15 21:18 ` ✓ CI.checksparse: success " Patchwork
2025-01-15 21:43 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-01-16  0:37 ` ✗ Xe.CI.Full: " Patchwork
2025-01-16  0:51 ` [PATCH v8 0/7] " Degrood, Felix J
2025-01-16 21:50 ` Olson, Matthew
2025-01-18  5:19   ` Harish Chegondi

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