From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFCBAE74ADD for ; Tue, 3 Dec 2024 21:53:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7E1AA10EB59; Tue, 3 Dec 2024 21:53:56 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="F1iD3jIZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id C84F410EB59 for ; Tue, 3 Dec 2024 21:53:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733262835; x=1764798835; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=KVOJAFS9fuYVW9GvoFXwOe/RmxIkdDw2PRCWdkZLJfQ=; b=F1iD3jIZyptl/ePR7hIUA97IqfGB7OmOSPgNv0ejq8U/ZUyy5LrdtpZC GdxVEWnJIdCnZalpOSozguv0h+Z284FpwNlOegz9glGpCBxx/bDlN76qv RIlf0i7K6l9lGl+hbfo+S8L8NWgyKTApU0+bqCAJEWsw5IyGDpfW4r6TT iy54vBmsvc3/uwpJaz7DQbIP2tnHvE26iY7Yo8wkprPvf+SsqCgT4Wut/ ZZrFq69s2LoN6qD44TTVAzeolHHPMncu4ugU7IuRvTTakhAYr6ZMcrSTK iAR0ekc3PHcbOteiIsOm1h+uHKgsnhTS/98LeVMeZI/rjkJzC7eCNTciU g==; X-CSE-ConnectionGUID: RFITdQrDQPChS9rufcec7Q== X-CSE-MsgGUID: eudW1rp8RZifogfwDAadcA== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="33381952" X-IronPort-AV: E=Sophos;i="6.12,206,1728975600"; d="scan'208";a="33381952" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 13:53:54 -0800 X-CSE-ConnectionGUID: hzl6tC04RKyJGOeiRT3zhQ== X-CSE-MsgGUID: 2DPc5ae7Qx+bpRe2fikbCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,206,1728975600"; d="scan'208";a="98369914" Received: from orsosgc001.jf.intel.com (HELO orsosgc001.intel.com) ([10.165.21.142]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 13:53:53 -0800 Date: Tue, 03 Dec 2024 13:53:53 -0800 Message-ID: <85r06o3026.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: "Cavitt, Jonathan" Cc: "intel-xe@lists.freedesktop.org" , "Gupta,\ saurabhg" , "Zuo, Alex" , "Nerlige Ramappa, Umesh" , "Harrison, John\ C" , "Roper, Matthew D" , "De Marchi, Lucas" Subject: Re: [PATCH v3] drm/xe/xe_guc_ads: Add nonpriv registers to write list In-Reply-To: References: <20241122180826.7075-1-jonathan.cavitt@intel.com> <85ttbl3jvv.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-redhat-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, 02 Dec 2024 13:11:21 -0800, Cavitt, Jonathan wrote: > > -----Original Message----- > From: Dixit, Ashutosh > Sent: Monday, December 2, 2024 12:33 PM > To: Cavitt, Jonathan > Cc: intel-xe@lists.freedesktop.org; Gupta, saurabhg ; Zuo, Alex ; Nerlige Ramappa, Umesh ; Harrison, John C ; Roper, Matthew D ; De Marchi, Lucas > Subject: Re: [PATCH v3] drm/xe/xe_guc_ads: Add nonpriv registers to write list > > > > On Fri, 22 Nov 2024 10:08:26 -0800, Jonathan Cavitt wrote: > > > > > > When performing a guc_mmio_regset_write, we add all the registers in the > > > reg_sr list to the save/restore list, but do not do the same for the > > > nonpriv registers. Add them in. > > > > > > v2: > > > - Add all NONPRIV registers to avoid undefined behavior (Harrison) > > > - s/whitelist/nonpriv > > > > > > v3: > > > - Rebase > > > > > > Closes: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2249 > > > Signed-off-by: Jonathan Cavitt > > > CC: Lucas de Marchi > > > CC: Matt Roper > > > CC: John Harrison > > > CC: Umesh Nerlige Ramappa > > > CC: Ashutosh Dixit > > > Reviewed-by: Lucas De Marchi > > > --- > > > drivers/gpu/drm/xe/xe_guc_ads.c | 7 +++++++ > > > 1 file changed, 7 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c > > > index 943146e5b460..b0afb89d9d90 100644 > > > --- a/drivers/gpu/drm/xe/xe_guc_ads.c > > > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c > > > @@ -243,6 +243,8 @@ static size_t calculate_regset_size(struct xe_gt *gt) > > > xa_for_each(&hwe->reg_sr.xa, sr_idx, sr_entry) > > > count++; > > > > > > + count += RING_MAX_NONPRIV_SLOTS * XE_NUM_HW_ENGINES; > > > + > > > count += ADS_REGSET_EXTRA_MAX * XE_NUM_HW_ENGINES; > > > > > > if (XE_WA(gt, 1607983814)) > > > @@ -727,6 +729,11 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, > > > xa_for_each(&hwe->reg_sr.xa, idx, entry) > > > guc_mmio_regset_write_one(ads, regset_map, entry->reg, count++); > > > > > > + for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) > > > + guc_mmio_regset_write_one(ads, regset_map, > > > + RING_FORCE_TO_NONPRIV(hwe->mmio_base, i), > > > + count++); > > > + > > > > What about the EU_PERF_CNTL registers which were there in the original > > patch? Those are not needed? > > It turned out they weren't. At least not for this use case. > They might be needed later for a different issue, but right now we aren't > observing any issues caused by their absence. Ok, let's keep this patch restricted to the nonprov registers. > > > > > > for (e = extra_regs; e < extra_regs + ARRAY_SIZE(extra_regs); e++) { > > > if (e->skip) > > > continue; > > > -- > > > 2.43.0 > > > > >