From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CF03C021A4 for ; Wed, 12 Feb 2025 20:01:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EA63B10E28B; Wed, 12 Feb 2025 20:01:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="caOWv5Zv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id E6FC310E28B for ; Wed, 12 Feb 2025 20:01:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739390507; x=1770926507; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=DiBjSXEj5izzIqluYuIGbesaCzCDT39TEX62sZJoPRI=; b=caOWv5ZvGzCnO4OtfvKAmoy06KYhD2BWizQL2dGdmfVwYcHHNNmwAely pDafCKRzK+KPEz+m8+6ab+Q5tEcNtopHXHDmwDelTnQlY/nm2F2sx1CBl FLqXxu/LZdsltsgl98Lr0U6tsDCqZ/dSJwkcIAjyExuctV4GmQaAikjPz kZs8yyue4FPhLzmk4Hq6Q/YmJFXOb3H+Q6wzIZWbyDWRAaeMHFqMLcGI7 /SyLikFX//laVWKUGSbXHqzI6gPkblLIwcc0apKtmwzigWVts9ww+MGUX NPfLdYGFgssIkPbp6ZOftUwGbd+KebyPwt7oZgcgeank+3MmeEVH8qEiX Q==; X-CSE-ConnectionGUID: tpLwJ2NBRXGEdnHu+ONOgg== X-CSE-MsgGUID: pjFsrum6Rnqcr8/g/NdHcA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="39255082" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="39255082" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 12:01:46 -0800 X-CSE-ConnectionGUID: UmYQUvBeRTuf8PwOc4HVKw== X-CSE-MsgGUID: kLIw5ZCZQH6Mn+5gm82uuQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="112777054" Received: from orsosgc001.jf.intel.com (HELO orsosgc001.intel.com) ([10.165.21.142]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 12:01:46 -0800 Date: Wed, 12 Feb 2025 12:01:45 -0800 Message-ID: <85y0yb6ifq.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Harish Chegondi Cc: Subject: Re: [PATCH v9 8/8] drm/xe/eustall: Add workaround 22016596838 which applies to PVC. In-Reply-To: <49e73f762d5eabf587a251352a9b77056c47fe3a.1739193510.git.harish.chegondi@intel.com> References: <49e73f762d5eabf587a251352a9b77056c47fe3a.1739193510.git.harish.chegondi@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-redhat-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, 10 Feb 2025 05:46:49 -0800, Harish Chegondi wrote: > > Add PVC workaround 22016596838 that disables EU DOP gating > during EU stall sampling. > > Signed-off-by: Harish Chegondi > --- > drivers/gpu/drm/xe/xe_eu_stall.c | 10 ++++++++++ > drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + > 2 files changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c > index 4dce58f60405..6acb87a25f78 100644 > --- a/drivers/gpu/drm/xe/xe_eu_stall.c > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c > @@ -9,6 +9,7 @@ > #include > > #include > +#include > #include > > #include "xe_bo.h" > @@ -22,6 +23,7 @@ > #include "xe_observation.h" > #include "xe_pm.h" > #include "xe_trace.h" > +#include "xe_wa.h" > > #include "regs/xe_eu_stall_regs.h" > #include "regs/xe_gt_regs.h" > @@ -658,6 +660,10 @@ static int xe_eu_stall_stream_enable(struct xe_eu_stall_data_stream *stream) > return -ETIMEDOUT; > } > > + if (XE_WA(gt, 22016596838)) > + xe_gt_mcr_multicast_write(gt, ROW_CHICKEN2, > + _MASKED_BIT_ENABLE(DISABLE_DOP_GATING)); > + > for_each_dss_steering(xecore, gt, group, instance) { > write_ptr_reg = xe_gt_mcr_unicast_read(gt, XEHPC_EUSTALL_REPORT, group, instance); > /* Clear any drop bits set and not cleared in the previous session. */ > @@ -816,6 +822,10 @@ static int xe_eu_stall_disable_locked(struct xe_eu_stall_data_stream *stream) > queue_delayed_work(stream->buf_poll_wq, &stream->buf_poll_work, 0); > flush_delayed_work(&stream->buf_poll_work); > > + if (XE_WA(gt, 22016596838)) > + xe_gt_mcr_multicast_write(gt, ROW_CHICKEN2, > + _MASKED_BIT_DISABLE(DISABLE_DOP_GATING)); > + > xe_force_wake_put(gt_to_fw(gt), XE_FW_RENDER); > xe_pm_runtime_put(gt_to_xe(gt)); > > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index 228436532282..8e2cae7f7135 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -5,6 +5,7 @@ > 22011391025 PLATFORM(DG2) > 22012727170 SUBPLATFORM(DG2, G11) > 22012727685 SUBPLATFORM(DG2, G11) > +22016596838 PLATFORM(PVC) > 18020744125 PLATFORM(PVC) > 1509372804 PLATFORM(PVC), GRAPHICS_STEP(A0, C0) > 1409600907 GRAPHICS_VERSION_RANGE(1200, 1250) I am assuming: * 22016596838 is the correct lineage bug number for this * It is ok to do the enable/disable DOP gating in EU stall enable/disable, rather than in say stream_init/stream_close. With this, this lgtm: Reviewed-by: Ashutosh Dixit