From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67455C48297 for ; Fri, 9 Feb 2024 07:08:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 64D7410F13A; Fri, 9 Feb 2024 07:08:21 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mlNxl1cP"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0BBDB10F13A for ; Fri, 9 Feb 2024 07:08:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707462499; x=1738998499; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=E+sj2qGnIfiMm4dogAS+bkerZD7cr2fEMUON5c2FBVM=; b=mlNxl1cPYdeD9kwZNf/u3sIwte2OZDoTBUSyOs8GVCpF8P7yvj9bjjBC msiYYEHhSPxXNPOBnUYbNXeQ1FxeorOP26ccPn9zLhXu8oEe15w/lxE1a c6uY4v1jFIQCRJ7qAKf2evd3xtepJKh0C7xKG8/ap9nMjSLioFhdVeJuX I5Dt0yV7idyprZNcGbQ9J9uLiEKvAFhqFyG2S+VEx8+Yc6TuAHUQqi3e9 qSHVnqvvvn852Zkt6hDdsp3c72CCpf9jK2cotuyAKNk7+UtAp0SXoYagg PKOUDBU1i/DgCrSsOLbqfRXYawm7CLAdyqgkIjEjwFffOBkvXxrPlWxhV w==; X-IronPort-AV: E=McAfee;i="6600,9927,10978"; a="1519373" X-IronPort-AV: E=Sophos;i="6.05,256,1701158400"; d="scan'208";a="1519373" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 23:08:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,256,1701158400"; d="scan'208";a="32664327" Received: from orsosgc001.jf.intel.com (HELO unerlige-ril.intel.com) ([10.165.21.138]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 23:08:15 -0800 Date: Thu, 08 Feb 2024 23:08:14 -0800 Message-ID: <85zfwaunc1.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Lionel Landwerlin Cc: intel-xe@lists.freedesktop.org, Umesh Nerlige Ramappa Subject: Re: [PATCH 07/16] drm/xe/oa: OA stream initialization (OAG) In-Reply-To: References: <20240208054916.3788133-1-ashutosh.dixit@intel.com> <20240208054916.3788133-8-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-redhat-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, 08 Feb 2024 22:23:30 -0800, Lionel Landwerlin wrote: > Hi Lionel, > > +static int xe_oa_emit_oa_config(struct xe_oa_stream *stream) > > +{ > > +#define NOA_PROGRAM_ADDITIONAL_DELAY_US 500 > > + struct xe_oa_config_bo *oa_bo; > > + int err, us = NOA_PROGRAM_ADDITIONAL_DELAY_US; > > + > > + oa_bo = xe_oa_alloc_config_buffer(stream); > > + if (IS_ERR(oa_bo)) { > > + err = PTR_ERR(oa_bo); > > + goto exit; > > + } > > + > > + err = xe_oa_submit_bb(stream, oa_bo->bb); > > + > > + /* Additional empirical delay needed for NOA programming after registers are written */ > > + usleep_range(us, 2 * us); > > Looks like the entire oa_config emission is synchronous. Yes that is indeed the case in this patchset. > That's a difference from i915 where we could just pipeline all the config > changes with perf queries in between. > > If there was a mechanism to return a syncobj in this ioctl, we could do the > wait from userspace and/or pipeline more submissions. That is the plan. To expose syncobj's in OA properties and make also make the oa_config emission asynchronous. But have not been able to get to it yet (IGT's are mostly getting ready, but now we may also need to add support for GPUVis before we can merge these patches, if we can't get a temporary waiver). So the direction right now is to get the current patchset merged before adding more features (like the syncobj). (Also, separately I'm trying to figure out if a delay similar to the NOA programming delay is really needed when we have PES registers, the case for Xe2+. Looks like it might not be, but still needs to be confirmed). Thanks. -- Ashutosh