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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: mx.microsoft.com 1; dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from PH0PR11MB5095.namprd11.prod.outlook.com (2603:10b6:510:3b::14) by DS0PR11MB7767.namprd11.prod.outlook.com (2603:10b6:8:138::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.569.12; Mon, 9 Nov 2026 23:50:42 +0000 Received: from PH0PR11MB5095.namprd11.prod.outlook.com ([fe80::770b:7229:68c0:5ded]) by PH0PR11MB5095.namprd11.prod.outlook.com ([fe80::770b:7229:68c0:5ded%3]) with mapi id 15.21.0592.012; Mon, 9 Nov 2026 23:50:36 +0000 From: Gustavo Sousa To: CC: Matt Atwood , Dnyaneshwar Bhadane , Matt Roper , Shekhar Chauhan , Balasubramani Vivekanandan Subject: Re: [PATCH v3 00/10] drm/xe: Clean up adjust_idledly() and implement Wa_16031259911 In-Reply-To: <20261105-wa_16031259911-v3-0-da6ec790aa29@intel.com> References: <20261105-wa_16031259911-v3-0-da6ec790aa29@intel.com> Date: Mon, 9 Nov 2026 20:50:30 -0300 Message-ID: <871p8t36pl.fsf@intel.com> Content-Type: text/plain X-ClientProxiedBy: BY5PR03CA0028.namprd03.prod.outlook.com (2603:10b6:a03:1e0::38) To PH0PR11MB5095.namprd11.prod.outlook.com (2603:10b6:510:3b::14) X-Archived-By: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR11MB5095:EE_|DS0PR11MB7767:EE_ X-MS-Office365-Filtering-Correlation-Id: 2c2e24ae-2e69-4e22-29ee-08df3ebc4026 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The > workaround is similar to existing ones that apply adjustments to > RING_IDLEDLY. > > The current implementation can be improved though: adjust_idledly() > can be cleaned up and refactored to make the code easier to follow > sequentially as well as to add new workarounds (such as > Wa_16031259911); the GuC ADS regset accounting has a subtle issue > where the addition of RING_IDLEDLY is not accounted for. > > This series addresses those issues first and then adds the > implementation of Wa_16031259911 as the final step. > > Signed-off-by: Gustavo Sousa > --- > Changes in v3: > - Rebased on top of drm-tip to fix a conflict and resending for fresh > CI results. > - Link to v2: https://patch.msgid.link/20261030-wa_16031259911-v2-0-919fa1c27070@intel.com Added MattA's r-b from v2 to the equivalent patch in v3 that was missing a r-b and applied to drm-xe-next. Thanks MattA and Bala for the reviews! -- Gustavo Sousa > > Changes in v2: > - Change idledly_units_ps and maxcnt_units_ps to u64 in adjust_idledly() > to avoid 32-bit multiplication overflow. (Sashiko, Matt) > - Replace the call-site comment for adjust_idledly() with a comment at > the function definition instead of just dropping it. (Matt) > - Link to v1: https://patch.msgid.link/20261023-wa_16031259911-v1-0-b0453f79c4e1@intel.com > > --- > Gustavo Sousa (10): > drm/xe: Bail from adjust_idledly() if in VF mode > drm/xe: Sync Wa_16023105232 in xe_was to match OOB rule > drm/xe: Use picosecond as common unit in adjust_idledly() > drm/xe: Factor out {min,max}_idledly_ps in adjust_idledly() > drm/xe: Bail from adjust_idledly() if no applicable workaround > drm/xe: Drop early and redundant workaround checks in adjust_idledly() > drm/xe: Replace MAXCNT comment with a comment on adjust_idledly() > drm/xe/guc: Increment regset size for Wa_1607983814 inside hwe loop > drm/xe/guc: Increment regset size for RING_IDLEDLY workarounds > drm/xe: Implement Wa_16031259911 > > drivers/gpu/drm/xe/xe_guc_ads.c | 16 ++-- > drivers/gpu/drm/xe/xe_hw_engine.c | 158 ++++++++++++++++++------------------- > drivers/gpu/drm/xe/xe_wa.c | 5 +- > drivers/gpu/drm/xe/xe_wa_oob.rules | 6 +- > 4 files changed, 93 insertions(+), 92 deletions(-) > --- > base-commit: be7a4fe8d1795219f7d033830ec4cf6e8ca1ecdb > change-id: 20261021-wa_16031259911-3a83c69d8570 > > Best regards, > -- > Gustavo Sousa