From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B0B3D70DF2 for ; Thu, 18 Dec 2025 21:01:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DF7210E070; Thu, 18 Dec 2025 21:01:13 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="D+FlOHCY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6F46F10E070 for ; Thu, 18 Dec 2025 21:01:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1766091673; x=1797627673; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=SnGDyDzB9tn78CG3x9hVlbF5HSlA+q6ux8b6Be3zUaM=; b=D+FlOHCYmcaWu2ujzVKlW8/mLiZ1Qr7hSWE82ORaZm9SNOtUhAybOMBr 9qL5G9Hexv/LCUyiIapHKWZupuGSxxX8391HxiQlcq9p2j/Seqm+6EsRH 24zxo316swz1xSyP7Ij8FAl0Ou8X6jkqfOgLQ3yJekqSXzlEeO8SpWkK2 cKL70Yh3IoEJUnYG1uHB+MYjhbX7OrEM2vR8op5QXCE3CfAf21JUYIDxR xJknOvNO+Yik2ZNvlI2FvcDaoSUzWpPHpsP4SyVsIAPzaBqjyoT8n1F5R 3e3UplV4H4aQco9haubPDAHEMpw2i/UDuj1TUNy92Hui5bg7XHFXxG7AV g==; X-CSE-ConnectionGUID: 5I501j3KS7m9Z4ZbrxeVfg== X-CSE-MsgGUID: QXpym8DqT8mDppBbkto/zw== X-IronPort-AV: E=McAfee;i="6800,10657,11646"; a="67948192" X-IronPort-AV: E=Sophos;i="6.21,159,1763452800"; d="scan'208";a="67948192" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2025 13:01:13 -0800 X-CSE-ConnectionGUID: QgaALRjiRYa/dLPxTNvqmA== X-CSE-MsgGUID: fXb+yvzXTHqED809zR4V/Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,159,1763452800"; d="scan'208";a="198446376" Received: from unknown (HELO adixit-MOBL3.intel.com) ([10.57.131.238]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2025 13:01:12 -0800 Date: Thu, 18 Dec 2025 13:01:11 -0800 Message-ID: <874ipn33oo.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Jonathan Cavitt Cc: intel-xe@lists.freedesktop.org, saurabhg.gupta@intel.com, alex.zuo@intel.com, matthew.brost@intel.com, daniele.ceraolospurio@intel.com, rodrigo.vivi@intel.com, michal.wajdeczko@intel.com Subject: Re: [PATCH 6/6] drm/xe/xe_guc_ct: Justify WRITE_ONCE/READ_ONCE usage In-Reply-To: <20251218153527.6436-14-jonathan.cavitt@intel.com> References: <20251218153527.6436-8-jonathan.cavitt@intel.com> <20251218153527.6436-14-jonathan.cavitt@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, 18 Dec 2025 07:35:34 -0800, Jonathan Cavitt wrote: > > Usage of READ_ONCE and WRITE_ONCE requires comments justifying it. > Some recently added uses had cross-dependencies with each other, but > needed to be added separately, so introduce the justifications now when > it makes more sense to. What is the reason for doing this in a separate patch? Afais, these comments should be added in the same patches where the code was changed. So people can see it in a single patch... > > Suggested-by: Matthew Brost > Suggested-by: Rodrigo Vivi > Signed-off-by: Jonathan Cavitt > --- > drivers/gpu/drm/xe/xe_guc_ct.c | 5 +++++ > drivers/gpu/drm/xe/xe_guc_ct.h | 2 ++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c > index 20ac0438ffb6..24857c2c8cb5 100644 > --- a/drivers/gpu/drm/xe/xe_guc_ct.c > +++ b/drivers/gpu/drm/xe/xe_guc_ct.c > @@ -529,6 +529,11 @@ static void guc_ct_change_state(struct xe_guc_ct *ct, > if (ct->g2h_outstanding) > xe_pm_runtime_put(ct_to_xe(ct)); > ct->g2h_outstanding = 0; > + > + /* > + * WRITE_ONCE pairs with READ_ONCEs in xe_guc_ct_initialized and > + * xe_guc_ct_enabled. > + */ > WRITE_ONCE(ct->state, state); > > xe_gt_dbg(gt, "GuC CT communication channel %s\n", > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h > index cb1335f1d66f..8d318b094f33 100644 > --- a/drivers/gpu/drm/xe/xe_guc_ct.h > +++ b/drivers/gpu/drm/xe/xe_guc_ct.h > @@ -30,11 +30,13 @@ void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p, bool want_ctb) > > static inline bool xe_guc_ct_initialized(struct xe_guc_ct *ct) > { > + /* READ_ONCE pairs with WRITE_ONCE in guc_ct_change_state */ > return READ_ONCE(ct->state) != XE_GUC_CT_STATE_NOT_INITIALIZED; > } > > static inline bool xe_guc_ct_enabled(struct xe_guc_ct *ct) > { > + /* READ_ONCE pairs with WRITE_ONCE in guc_ct_change_state */ > return READ_ONCE(ct->state) == XE_GUC_CT_STATE_ENABLED; > } > > -- > 2.43.0 >