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d="scan'208";a="156054736" Received: from ncintean-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.17]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 00:57:16 -0700 From: Jani Nikula To: Ville Syrjala , intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: Re: [PATCH v2 02/14] drm/i915: s/intel_crtc_bw/intel_dbuf_bw/ In-Reply-To: <20250326162544.3642-3-ville.syrjala@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20250326162544.3642-1-ville.syrjala@linux.intel.com> <20250326162544.3642-3-ville.syrjala@linux.intel.com> Date: Thu, 27 Mar 2025 09:57:13 +0200 Message-ID: <877c4a7vom.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Wed, 26 Mar 2025, Ville Syrjala wrote: > From: Ville Syrj=C3=A4l=C3=A4 > > Rename the intel_crtc_bw struct to intel_dbuf_bw to better > reflect what it does. > > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_bw.c | 24 ++++++++++++------------ > 1 file changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i9= 15/display/intel_bw.c > index 15c2377193f7..b34db55f5a7e 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -1157,15 +1157,15 @@ static bool intel_bw_state_changed(struct intel_d= isplay *display, > enum pipe pipe; >=20=20 > for_each_pipe(display, pipe) { > - const struct intel_dbuf_bw *old_crtc_bw =3D > + const struct intel_dbuf_bw *old_dbuf_bw =3D > &old_bw_state->dbuf_bw[pipe]; > - const struct intel_dbuf_bw *new_crtc_bw =3D > + const struct intel_dbuf_bw *new_dbuf_bw =3D > &new_bw_state->dbuf_bw[pipe]; > enum dbuf_slice slice; >=20=20 > for_each_dbuf_slice(display, slice) { > - if (old_crtc_bw->max_bw[slice] !=3D new_crtc_bw->max_bw[slice] || > - old_crtc_bw->active_planes[slice] !=3D new_crtc_bw->active_planes= [slice]) > + if (old_dbuf_bw->max_bw[slice] !=3D new_dbuf_bw->max_bw[slice] || > + old_dbuf_bw->active_planes[slice] !=3D new_dbuf_bw->active_planes= [slice]) > return true; > } >=20=20 > @@ -1185,7 +1185,7 @@ static void skl_plane_calc_dbuf_bw(struct intel_bw_= state *bw_state, > { > struct intel_display *display =3D to_intel_display(crtc); > struct drm_i915_private *i915 =3D to_i915(display->drm); > - struct intel_dbuf_bw *crtc_bw =3D &bw_state->dbuf_bw[crtc->pipe]; > + struct intel_dbuf_bw *dbuf_bw =3D &bw_state->dbuf_bw[crtc->pipe]; > unsigned int dbuf_mask =3D skl_ddb_dbuf_slice_mask(i915, ddb); > enum dbuf_slice slice; >=20=20 > @@ -1194,8 +1194,8 @@ static void skl_plane_calc_dbuf_bw(struct intel_bw_= state *bw_state, > * equal share of the total bw to each plane. > */ > for_each_dbuf_slice_in_mask(display, slice, dbuf_mask) { > - crtc_bw->max_bw[slice] =3D max(crtc_bw->max_bw[slice], data_rate); > - crtc_bw->active_planes[slice] |=3D BIT(plane_id); > + dbuf_bw->max_bw[slice] =3D max(dbuf_bw->max_bw[slice], data_rate); > + dbuf_bw->active_planes[slice] |=3D BIT(plane_id); > } > } >=20=20 > @@ -1204,10 +1204,10 @@ static void skl_crtc_calc_dbuf_bw(struct intel_bw= _state *bw_state, > { > struct intel_display *display =3D to_intel_display(crtc_state); > struct intel_crtc *crtc =3D to_intel_crtc(crtc_state->uapi.crtc); > - struct intel_dbuf_bw *crtc_bw =3D &bw_state->dbuf_bw[crtc->pipe]; > + struct intel_dbuf_bw *dbuf_bw =3D &bw_state->dbuf_bw[crtc->pipe]; > enum plane_id plane_id; >=20=20 > - memset(crtc_bw, 0, sizeof(*crtc_bw)); > + memset(dbuf_bw, 0, sizeof(*dbuf_bw)); >=20=20 > if (!crtc_state->hw.active) > return; > @@ -1249,10 +1249,10 @@ intel_bw_dbuf_min_cdclk(struct intel_display *dis= play, > * equal share of the total bw to each plane. > */ > for_each_pipe(display, pipe) { > - const struct intel_dbuf_bw *crtc_bw =3D &bw_state->dbuf_bw[pipe]; > + const struct intel_dbuf_bw *dbuf_bw =3D &bw_state->dbuf_bw[pipe]; >=20=20 > - max_bw =3D max(crtc_bw->max_bw[slice], max_bw); > - num_active_planes +=3D hweight8(crtc_bw->active_planes[slice]); > + max_bw =3D max(dbuf_bw->max_bw[slice], max_bw); > + num_active_planes +=3D hweight8(dbuf_bw->active_planes[slice]); > } > max_bw *=3D num_active_planes; --=20 Jani Nikula, Intel