From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E247FCFD35A for ; Mon, 24 Nov 2025 21:34:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A359310E262; Mon, 24 Nov 2025 21:34:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="T7GM/1Ku"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id C014010E262 for ; Mon, 24 Nov 2025 21:34:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764020066; x=1795556066; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=Vwoto7nLgP4lvIFqNxNECwK06Gm44yCkuMWnMFrUwWg=; b=T7GM/1Ku5A+TBX2rNEQxyzbxt4IBQ/RSakacamwRkEh+t0JQmEn0tQ4x qRXke2MA9AXoJwzDat9Gy+xo/Z3BZ+uVtZn5lhxPmSknGXcxHzSG96DTZ 3CZ/jwZD88SQZLZ6xhflQlXatuJ3nJiug5fMCQQPD+pLgSqPecXoURVoa LQWNpiuT5lqvhopi0IwHJanIYB9Qy6b8c+xSJAR0gxfVnSSyr00mrJsQm r2tzy3qahthRS0QLSoTIe6+wkdo1gVhYxZ3qf7azVHhFKk+k2UmBPyjsQ ACvvQ/oO9/1hEzoAOiDpCbkJTuH6WEATp2c3I3jM9AbPnfNraLfjTqU0s Q==; X-CSE-ConnectionGUID: HtvrCtlLRM2vsDP5h/eh7w== X-CSE-MsgGUID: c6/jnjD9T3OvbPH60L/ltQ== X-IronPort-AV: E=McAfee;i="6800,10657,11623"; a="76655101" X-IronPort-AV: E=Sophos;i="6.20,223,1758610800"; d="scan'208";a="76655101" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 13:34:26 -0800 X-CSE-ConnectionGUID: p+NPnWbPQX+yBEt9bqXmmg== X-CSE-MsgGUID: QYmArGxqT6eLBsNWzVQ25g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,223,1758610800"; d="scan'208";a="192455236" Received: from mdsouz-mobl2.amr.corp.intel.com (HELO adixit-MOBL3.intel.com) ([10.125.163.10]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 13:34:26 -0800 Date: Mon, 24 Nov 2025 13:34:25 -0800 Message-ID: <878qfvunby.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa Cc: Lucas De Marchi , Subject: Re: [PATCH 08/12] drm/xe/oa/uapi: Expose MERT OA unit In-Reply-To: References: <20251021-cri-v1-0-bf11e61d9f49@intel.com> <20251021-cri-v1-8-bf11e61d9f49@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Wed, 22 Oct 2025 16:09:41 -0700, Umesh Nerlige Ramappa wrote: > > On Tue, Oct 21, 2025 at 10:17:40PM -0700, Lucas De Marchi wrote: > > From: Ashutosh Dixit > > > > A MERT OA unit is available in the SoC on some platforms. Add support > > for this OA unit and expose it to userspace. The MERT OA unit does not > > have any HW engines attached, but is otherwise similar to an OAM unit. > > > > Cc: Umesh Nerlige Ramappa > > Signed-off-by: Ashutosh Dixit > > Signed-off-by: Lucas De Marchi > > Looks good, > > Reviewed-by: Umesh Nerlige Ramappa Currently there is some uncertainty about this feature. Because of this I don't want to merge this patch at present. So please don't merge this now. I will resend the patch at appropriate time when there is more clarity. Thanks. > > Regards, > Umesh > > > --- > > drivers/gpu/drm/xe/regs/xe_oa_regs.h | 9 +++++++++ > > drivers/gpu/drm/xe/xe_oa.c | 36 +++++++++++++++++++++++++++++++++--- > > include/uapi/drm/xe_drm.h | 3 +++ > > 3 files changed, 45 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h > > index e693a50706f84..72334bd660751 100644 > > --- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h > > +++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h > > @@ -100,4 +100,13 @@ > > #define OAM_COMPRESSION_T3_CONTROL XE_REG(0x1c2e00) > > #define OAM_LAT_MEASURE_ENABLE REG_BIT(4) > > > > +#define OAMERT_CONTROL XE_REG(0x1453a0) > > +#define OAMERT_DEBUG XE_REG(0x1453a4) > > +#define OAMERT_STATUS XE_REG(0x1453a8) > > +#define OAMERT_HEAD_POINTER XE_REG(0x1453ac) > > +#define OAMERT_TAIL_POINTER XE_REG(0x1453b0) > > +#define OAMERT_BUFFER XE_REG(0x1453b4) > > +#define OAMERT_CONTEXT_CONTROL XE_REG(0x1453c8) > > +#define OAMERT_MMIO_TRG XE_REG(0x1453cc) > > + > > #endif > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > index f901ba52b4032..4aea94d438d40 100644 > > --- a/drivers/gpu/drm/xe/xe_oa.c > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > @@ -1915,6 +1915,7 @@ static bool oa_unit_supports_oa_format(struct xe_oa_open_param *param, int type) > > type == DRM_XE_OA_FMT_TYPE_OAC || type == DRM_XE_OA_FMT_TYPE_PEC; > > case DRM_XE_OA_UNIT_TYPE_OAM: > > case DRM_XE_OA_UNIT_TYPE_OAM_SAG: > > + case DRM_XE_OA_UNIT_TYPE_MERT: > > return type == DRM_XE_OA_FMT_TYPE_OAM || type == DRM_XE_OA_FMT_TYPE_OAM_MPEC; > > default: > > return false; > > @@ -2206,6 +2207,8 @@ static const struct xe_mmio_range xe2_oa_mux_regs[] = { > > { .start = 0xE18C, .end = 0xE18C }, /* SAMPLER_MODE */ > > { .start = 0xE590, .end = 0xE590 }, /* TDL_LSC_LAT_MEASURE_TDL_GFX */ > > { .start = 0x13000, .end = 0x137FC }, /* PES_0_PESL0 - PES_63_UPPER_PESL3 */ > > + { .start = 0x145194, .end = 0x145194 }, /* SYS_MEM_LAT_MEASURE */ > > + { .start = 0x145340, .end = 0x14537C }, /* MERTSS_PES_0 - MERTSS_PES_7 */ > > {}, > > }; > > > > @@ -2495,7 +2498,12 @@ int xe_oa_register(struct xe_device *xe) > > static u32 num_oa_units_per_gt(struct xe_gt *gt) > > { > > if (xe_gt_is_main_type(gt) || GRAPHICS_VER(gt_to_xe(gt)) < 20) > > - return 1; > > + /* > > + * Mert OA unit belongs to the SoC, not a gt, so should be accessed using > > + * xe_root_tile_mmio(). However, for all known platforms this is the same as > > + * accessing via xe_root_mmio_gt()->mmio. > > + */ > > + return xe_device_has_mert(gt_to_xe(gt)) ? 2 : 1; > > else if (!IS_DGFX(gt_to_xe(gt))) > > return XE_OAM_UNIT_SCMI_0 + 1; /* SAG + SCMI_0 */ > > else > > @@ -2577,6 +2585,21 @@ static struct xe_oa_regs __oag_regs(void) > > }; > > } > > > > +static struct xe_oa_regs __oamert_regs(void) > > +{ > > + return (struct xe_oa_regs) { > > + 0, > > + OAMERT_HEAD_POINTER, > > + OAMERT_TAIL_POINTER, > > + OAMERT_BUFFER, > > + OAMERT_CONTEXT_CONTROL, > > + OAMERT_CONTROL, > > + OAMERT_DEBUG, > > + OAMERT_STATUS, > > + OAM_CONTROL_COUNTER_SEL_MASK, > > + }; > > +} > > + > > static void __xe_oa_init_oa_units(struct xe_gt *gt) > > { > > /* Actual address is MEDIA_GT_GSI_OFFSET + oam_base_addr[i] */ > > @@ -2591,8 +2614,15 @@ static void __xe_oa_init_oa_units(struct xe_gt *gt) > > struct xe_oa_unit *u = >->oa.oa_unit[i]; > > > > if (xe_gt_is_main_type(gt)) { > > - u->regs = __oag_regs(); > > - u->type = DRM_XE_OA_UNIT_TYPE_OAG; > > + if (!i) { > > + u->regs = __oag_regs(); > > + u->type = DRM_XE_OA_UNIT_TYPE_OAG; > > + } else { > > + xe_gt_assert(gt, xe_device_has_mert(gt_to_xe(gt))); > > + xe_gt_assert(gt, gt == xe_root_mmio_gt(gt_to_xe(gt))); > > + u->regs = __oamert_regs(); > > + u->type = DRM_XE_OA_UNIT_TYPE_MERT; > > + } > > } else { > > xe_gt_assert(gt, GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270); > > u->regs = __oam_regs(oam_base_addr[i]); > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h > > index 47853659a705e..09599dcc816d6 100644 > > --- a/include/uapi/drm/xe_drm.h > > +++ b/include/uapi/drm/xe_drm.h > > @@ -1654,6 +1654,9 @@ enum drm_xe_oa_unit_type { > > > > /** @DRM_XE_OA_UNIT_TYPE_OAM_SAG: OAM_SAG OA unit */ > > DRM_XE_OA_UNIT_TYPE_OAM_SAG, > > + > > + /** @DRM_XE_OA_UNIT_TYPE_MERT: MERT OA unit */ > > + DRM_XE_OA_UNIT_TYPE_MERT, > > }; > > > > /** > > > > -- > > 2.51.0 > >