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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from PH8PR11MB8287.namprd11.prod.outlook.com (2603:10b6:510:1c7::14) by SJ0PR11MB4862.namprd11.prod.outlook.com (2603:10b6:a03:2de::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.22; Thu, 5 Mar 2026 15:23:57 +0000 Received: from PH8PR11MB8287.namprd11.prod.outlook.com ([fe80::a0e5:e99c:ee7b:620a]) by PH8PR11MB8287.namprd11.prod.outlook.com ([fe80::a0e5:e99c:ee7b:620a%3]) with mapi id 15.20.9678.016; Thu, 5 Mar 2026 15:23:56 +0000 From: Gustavo Sousa To: CC: Piotr =?utf-8?Q?Pi=C3=B3rkowski?= Subject: Re: [PATCH 5/7] drm/xe/nvlp: Implement Wa_14026539277 In-Reply-To: <20260305-extra-nvl-p-enabling-patches-v1-5-5020d5289dea@intel.com> References: <20260305-extra-nvl-p-enabling-patches-v1-0-5020d5289dea@intel.com> <20260305-extra-nvl-p-enabling-patches-v1-5-5020d5289dea@intel.com> Date: Thu, 5 Mar 2026 12:23:52 -0300 Message-ID: <87a4wm8flj.fsf@intel.com> Content-Type: text/plain X-ClientProxiedBy: BYAPR03CA0022.namprd03.prod.outlook.com (2603:10b6:a02:a8::35) To PH8PR11MB8287.namprd11.prod.outlook.com (2603:10b6:510:1c7::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8287:EE_|SJ0PR11MB4862:EE_ X-MS-Office365-Filtering-Correlation-Id: 9056d6e7-a5fc-4aea-30e9-08de7acb37d6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024; 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> } > > +static void xe_gt_wa_14026539277(struct xe_gt *gt) > +{ > + u32 val; > + > + if (!XE_GT_WA(gt, 14026539277)) > + return; It appears SRIOV VF wouldn't have access to the register below, right? Adding Piotr here, since we talked about it offline recently. Does implementing this only on PF side suffice? If so, should we return early here if on a VF or should we rather add a FUNC(xe_rtp_match_not_sriov_vf) in the rules for Wa_14026539277? One thing that I realize with the latter approach is that 14026539277 would not be listed in the workarounds debugfs file. Do we really want that? I think this question applies to all cases where we use FUNC(xe_rtp_match_not_sriov_vf), not only this one. -- Gustavo Sousa > + > + /* > + * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset > + * does not apply. > + */ > + xe_gt_assert(gt, xe_gt_is_main_type(gt)); > + > + val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL); > + val &= ~CECTRL; > + val |= CECTRL_CENODATA_ALWAYS; > + xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val); > +} > + > int xe_gt_init_early(struct xe_gt *gt) > { > int err; > @@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt) > */ > gt->info.gmdid = xe_mmio_read32(>->mmio, GMD_ID); > > + /* > + * Wa_14026539277 can't be implemented as a regular GT workaround (i.e. > + * as an entry in gt_was[]) because we would get the hardware already in > + * a bad state by the time it would be applied. Hence, we implement it > + * as an OOB workaround and apply it early to prevent that. > + */ > + xe_gt_wa_14026539277(gt); > + > return 0; > } > > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index 80b54b195f20..7f42436df6ab 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -58,3 +58,5 @@ > > 14025883347 MEDIA_VERSION_RANGE(1301, 3503) > GRAPHICS_VERSION_RANGE(2004, 3005) > + > +14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510) > > -- > 2.52.0