From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC2FBD3ABC1 for ; Sat, 6 Dec 2025 00:05:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 693B510E28E; Sat, 6 Dec 2025 00:05:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="T/PPiOtZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0EC7A10E28E for ; Sat, 6 Dec 2025 00:05:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764979511; x=1796515511; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=4S/BqvTKzzgZzIhus/vwNmU/KvZujpPlGZo9HrcVEvI=; b=T/PPiOtZ0kbeSmduKo9Kb+LShBM7fpNBcSFdVLFcsHkLiO26Nt4ln+Xn C/z6XfKf+/LhHmFgcc46deGwuVpzMam9qJUkcfoaqWXNkboohOzG7X2Ii 5GYfl53EQ+T5krfJMzPaFD87QVh7F/Cnzjf4+I3CCt9Kyx6L+j7ZZNhzo laeLlVnJlxc+zh4jlqO7RtaS5IA486wu9ZqnL4/D8OJ+ZoVBucbZT2WQc wL7UZIJyTGb50Db0W6UKiGYK6va+zcTolL4Sr8F9N6Mp6UPfXvHTSubQo rKGR4uJMjZU6GAnNzyZrJ9PwFFhjflMoX6LIpcADB6eClNDhnSIsJNtZa Q==; X-CSE-ConnectionGUID: 3Wbz7Y7CRJKWj+89XdXxqQ== X-CSE-MsgGUID: 8AAwHeVISnu0Y0lrDfXiEQ== X-IronPort-AV: E=McAfee;i="6800,10657,11633"; a="70866765" X-IronPort-AV: E=Sophos;i="6.20,253,1758610800"; d="scan'208";a="70866765" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2025 16:05:11 -0800 X-CSE-ConnectionGUID: GNZ4LqAxTLCUFQncg+fFXw== X-CSE-MsgGUID: 4ojr8KdnRLCyKj8lwWeyjw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,253,1758610800"; d="scan'208";a="195862652" Received: from pgopalap-mobl2.amr.corp.intel.com (HELO adixit-MOBL3.intel.com) ([10.124.162.149]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2025 16:05:10 -0800 Date: Fri, 05 Dec 2025 16:05:09 -0800 Message-ID: <87jyz0pj9m.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Shuicheng Lin Cc: , Matthew Brost Subject: Re: [PATCH v3 2/2] drm/xe/oa: Limit num_syncs to prevent oversized allocations In-Reply-To: <20251205234715.2476561-6-shuicheng.lin@intel.com> References: <20251205234715.2476561-4-shuicheng.lin@intel.com> <20251205234715.2476561-6-shuicheng.lin@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Fri, 05 Dec 2025 15:47:18 -0800, Shuicheng Lin wrote: > > The OA open parameters did not validate num_syncs, allowing > userspace to pass arbitrarily large values, potentially > leading to excessive allocations. > > Add check to ensure that num_syncs does not exceed DRM_XE_MAX_SYNCS, > returning -EINVAL when the limit is violated. > > v2: use XE_IOCTL_DBG() and drop duplicated check. (Ashutosh) Reviewed-by: Ashutosh Dixit > > Fixes: c8507a25cebd ("drm/xe/oa/uapi: Define and parse OA sync properties") > Cc: Matthew Brost > Cc: Ashutosh Dixit > Signed-off-by: Shuicheng Lin > --- > drivers/gpu/drm/xe/xe_oa.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > index cc48663c2b48..92aa25fc0422 100644 > --- a/drivers/gpu/drm/xe/xe_oa.c > +++ b/drivers/gpu/drm/xe/xe_oa.c > @@ -1254,6 +1254,9 @@ static int xe_oa_set_no_preempt(struct xe_oa *oa, u64 value, > static int xe_oa_set_prop_num_syncs(struct xe_oa *oa, u64 value, > struct xe_oa_open_param *param) > { > + if (XE_IOCTL_DBG(oa->xe, value > DRM_XE_MAX_SYNCS)) > + return -EINVAL; > + > param->num_syncs = value; > return 0; > } > -- > 2.50.1 >