From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DD36CC36008 for ; Tue, 25 Mar 2025 17:15:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8BA0C10E172; Tue, 25 Mar 2025 17:15:21 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="grysfD9M"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 62C7E10E172 for ; Tue, 25 Mar 2025 17:15:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1742922919; x=1774458919; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version:content-transfer-encoding; bh=/Pj2ffko3qsZXjxcLlNW+reznZ/UKBh55Pq9Xm+QhBU=; b=grysfD9Msw+c7CvwAer0kK580Wn/TSDpli3u0Rjud13eVks7lgMAcPnb XXlpaOmNHbJ9HhvTCUOoozNRvY61DP5xasQlrriUzPVYOjrpQBo81pU3c Uu9IGRzMpJuuqpXkxgpW9leLsenmCeZce301LVUC2ZfCf3upYcEsLSoPT 9WbzRgX2v0BpbOU4IV8gPYiglQZC7qksMtb5zhZahMn/gi9My2tH5C6St 2RxTA7o5jCt95GlwZ7jeuP/6tstY6w2dyg60X0aMF3ZNBvkFjDMdNxbhp m/llyH3t5TyR4VeK5oT2pzTbi5y8ttswynfXfEQLQ0t/Y1VxYEpYgCeq9 w==; X-CSE-ConnectionGUID: QkJupUUkTKyXmRoRgqqyEA== X-CSE-MsgGUID: QNl+4qILSei/ZHeI5zm+HA== X-IronPort-AV: E=McAfee;i="6700,10204,11384"; a="61577307" X-IronPort-AV: E=Sophos;i="6.14,275,1736841600"; d="scan'208";a="61577307" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2025 10:15:18 -0700 X-CSE-ConnectionGUID: uqS667yLRg+hUI9hpsdxSA== X-CSE-MsgGUID: n5/I1KdYQEaXAj0Fsi4wYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,275,1736841600"; d="scan'208";a="124415818" Received: from unknown (HELO adixit-MOBL3.intel.com) ([10.125.127.34]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2025 10:15:17 -0700 Date: Tue, 25 Mar 2025 10:15:16 -0700 Message-ID: <87jz8dhw0r.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: "Belgaumkar, Vinay" Cc: , Riana Tauro , Lucas De Marchi , Rodrigo Vivi Subject: Re: [PATCH v4] drm/xe/pmu: Add GT frequency events In-Reply-To: References: <20250324232402.46481-1-vinay.belgaumkar@intel.com> <87jz8e9d3h.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, 24 Mar 2025 19:37:32 -0700, Belgaumkar, Vinay wrote: > Hi Vinay, > On 3/24/2025 5:18 PM, Dixit, Ashutosh wrote: > > On Mon, 24 Mar 2025 16:24:02 -0700, Vinay Belgaumkar wrote: > >> @@ -266,11 +274,24 @@ static u64 __xe_pmu_event_read(struct perf_event= *event) > >> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS: > >> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS: > >> return read_engine_events(gt, event); > >> + case XE_PMU_EVENT_GT_ACTUAL_FREQUENCY: > >> + return xe_guc_pc_get_act_freq(>->uc.guc.pc); > >> + case XE_PMU_EVENT_GT_REQUESTED_FREQUENCY: > >> + if (!xe_guc_pc_get_cur_freq(>->uc.guc.pc, &cur_gt_freq)) > > This is unconditionally taking the forcewake and waking the card up jus= t to > > get the sample. Do we really want to do that? > > > > So if we don't do that, both the actual and requested freq will be 0 if= gt > > is in C6. > > For actual frequency, the register(0xc60) does not belong to any fw domai= n - > > GEN_FW_RANGE(0xc00, 0xfff, 0), > > HW will report 0 when GT is in C6. Yes, no issue about act_freq, see commit 22009b6dad66. I was referring only to requested freq. > The requested freq register is a > shadowed register (0xa008), so that will not accrue fwake either. > > static const struct i915_range mtl_shadowed_regs[] =3D { > =A0=A0=A0=A0=A0=A0=A0 { .start =3D=A0=A0 0x2030, .end =3D=A0=A0 0x2030 }, > =A0=A0=A0=A0=A0=A0=A0 { .start =3D=A0=A0 0x2510, .end =3D=A0=A0 0x2550 }, > =A0=A0=A0=A0=A0=A0=A0 { .start =3D=A0=A0 0xA008, .end =3D=A0=A0 0xA00C }, So this still doesn't make sense because: 1. The fact is that xe_guc_pc_get_cur_freq() *is* taking forcewake 2. And that is in accord with the following comment in i915/intel_uncore.c * Shadowing only applies to writes; forcewake * must still be acquired when reading from registers in these ranges. Also see intel_rps_read_punit_req() which is called from i915 PMU (frequency_sample()) and uses with_intel_runtime_pm_if_in_use(), so we'd need to do use the equivalent in xe. Thanks. -- Ashutosh