From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35DB4C30653 for ; Wed, 26 Jun 2024 00:41:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EFF5910E280; Wed, 26 Jun 2024 00:41:09 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mVz8SFqa"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3323110E280 for ; Wed, 26 Jun 2024 00:41:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719362468; x=1750898468; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version:content-transfer-encoding; bh=LszRI5kBxV9/RFixaVCypR94uekJ+wwcZXAOpcsludw=; b=mVz8SFqak/aDJX9SL0hYY12lGhOqY8Z3PiNT9l2+WOlii+Z2whBK23nO 0qgSu32W126poUOY5US+a2l4zG0WkRa05A5DOxtCAbC3Wr84CGwjHmrt1 hIB5ym7qcKpcEKcnks0wlpbuyQ4y+9RMT5H5COeAJ/Jr2n+uWjrvAnUun iT/xbaRsPMhTAXJk2hozVa31RyvO0bfg5C1W9A8iEKt/SpDbrTlSpLrgh AvvAmEDu8rDBHPA0Eb2LmUvoKdt78KjhW5Vkqoo9omYShc69l6eEIgKNn vW0K6RRKO4864eM6Y9feD8q9nwL84eFB8uz8/AM0tAdUZCXs7h6HRd+FD w==; X-CSE-ConnectionGUID: DQG+r9YuRpGiQSTk0O5Ltw== X-CSE-MsgGUID: it+s7qFsTryohlAFOe218w== X-IronPort-AV: E=McAfee;i="6700,10204,11114"; a="16093005" X-IronPort-AV: E=Sophos;i="6.08,265,1712646000"; d="scan'208";a="16093005" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2024 17:41:07 -0700 X-CSE-ConnectionGUID: DGvyFWhtTBSLyBM7nQPnyg== X-CSE-MsgGUID: UMEhnL4gSaye6cV8scDj4g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,265,1712646000"; d="scan'208";a="48274255" Received: from tlhardin-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.125.225.168]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2024 17:41:07 -0700 Date: Tue, 25 Jun 2024 17:29:46 -0700 Message-ID: <87jzich7gl.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: "Souza, Jose" Cc: "intel-xe@lists.freedesktop.org" , "Brost, Matthew" , "Nerlige Ramappa, Umesh" , "Landwerlin, Lionel G" Subject: Re: [PATCH 3/3] drm/xe/oa: Allow preemption to be disabled on the stream exec queue In-Reply-To: References: <20240625201518.766925-1-ashutosh.dixit@intel.com> <20240625201518.766925-4-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.3 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, 25 Jun 2024 13:49:07 -0700, Souza, Jose wrote: > Hi Jose, > On Tue, 2024-06-25 at 13:15 -0700, Ashutosh Dixit wrote: > > Mesa VK_KHR_performance_query use case requires preemption to be disabl= ed > > for the stream exec queue. Implement this functionality here based on t= he > > new set_no_preempt and clear_no_preempt exec queue ops. > > Is this planned to land in the same Kernel version as the other OA > patches? Let's see if we can get them reviewed and merged tomorrow which is the cutoff for 6.11. If we can merge tomorrow, they will get in with the other OA patches. That is why I was trying to rush this ahead of other things. > If not would be nice to have some flag indicating that this feature is > supported in running kernel, like we have in i915. Yes, if we don't make it tomorrow's deadline, we'll need to figure something out. > uAPI looks good to me, will implement on Mesa tomorrow. > > thank you > > Acked-by: Jos=E9 Roberto de Souza Thanks. -- Ashutosh > > > > > Signed-off-by: Ashutosh Dixit > > --- > > drivers/gpu/drm/xe/xe_oa.c | 33 +++++++++++++++++++++++++++++++- > > drivers/gpu/drm/xe/xe_oa_types.h | 3 +++ > > include/uapi/drm/xe_drm.h | 6 ++++++ > > 3 files changed, 41 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > index a68659fd5386..6453c36c4539 100644 > > --- a/drivers/gpu/drm/xe/xe_oa.c > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > @@ -80,6 +80,7 @@ struct xe_oa_open_param { > > int engine_instance; > > struct xe_exec_queue *exec_q; > > struct xe_hw_engine *hwe; > > + bool no_preempt; > > }; > > > > struct xe_oa_config_bo { > > @@ -1018,6 +1019,13 @@ static int xe_oa_enable_locked(struct xe_oa_stre= am *stream) > > if (stream->enabled) > > return 0; > > > > + if (stream->no_preempt) { > > + int ret =3D stream->exec_q->ops->set_no_preempt(stream->exec_q); > > + > > + if (ret) > > + return ret; > > + } > > + > > xe_oa_stream_enable(stream); > > > > stream->enabled =3D true; > > @@ -1026,13 +1034,18 @@ static int xe_oa_enable_locked(struct xe_oa_str= eam *stream) > > > > static int xe_oa_disable_locked(struct xe_oa_stream *stream) > > { > > + int ret =3D 0; > > + > > if (!stream->enabled) > > return 0; > > > > xe_oa_stream_disable(stream); > > > > + if (stream->no_preempt) > > + ret =3D stream->exec_q->ops->clear_no_preempt(stream->exec_q); > > + > > stream->enabled =3D false; > > - return 0; > > + return ret; > > } > > > > static long xe_oa_config_locked(struct xe_oa_stream *stream, u64 arg) > > @@ -1307,6 +1320,7 @@ static int xe_oa_stream_init(struct xe_oa_stream = *stream, > > stream->sample =3D param->sample; > > stream->periodic =3D param->period_exponent > 0; > > stream->period_exponent =3D param->period_exponent; > > + stream->no_preempt =3D param->no_preempt; > > > > /* > > * For Xe2+, when overrun mode is enabled, there are no partial reports= at the end > > @@ -1651,6 +1665,13 @@ static int xe_oa_set_prop_engine_instance(struct= xe_oa *oa, u64 value, > > return 0; > > } > > > > +static int xe_oa_set_no_preempt(struct xe_oa *oa, u64 value, > > + struct xe_oa_open_param *param) > > +{ > > + param->no_preempt =3D value; > > + return 0; > > +} > > + > > typedef int (*xe_oa_set_property_fn)(struct xe_oa *oa, u64 value, > > struct xe_oa_open_param *param); > > static const xe_oa_set_property_fn xe_oa_set_property_funcs[] =3D { > > @@ -1662,6 +1683,7 @@ static const xe_oa_set_property_fn xe_oa_set_prop= erty_funcs[] =3D { > > [DRM_XE_OA_PROPERTY_OA_DISABLED] =3D xe_oa_set_prop_disabled, > > [DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID] =3D xe_oa_set_prop_exec_queue_id, > > [DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE] =3D xe_oa_set_prop_engine_insta= nce, > > + [DRM_XE_OA_PROPERTY_NO_PREEMPT] =3D xe_oa_set_no_preempt, > > }; > > > > static int xe_oa_user_ext_set_property(struct xe_oa *oa, u64 extension, > > @@ -1766,6 +1788,15 @@ int xe_oa_stream_open_ioctl(struct drm_device *d= ev, u64 data, struct drm_file *f > > if (param.exec_q && !param.sample) > > privileged_op =3D false; > > > > + if (param.no_preempt) { > > + if (!param.exec_q) { > > + drm_dbg(&oa->xe->drm, "Preemption disable without exec_q!\n"); > > + ret =3D -EINVAL; > > + goto err_exec_q; > > + } > > + privileged_op =3D true; > > + } > > + > > if (privileged_op && xe_perf_stream_paranoid && !perfmon_capable()) { > > drm_dbg(&oa->xe->drm, "Insufficient privileges to open xe perf stream\= n"); > > ret =3D -EACCES; > > diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_o= a_types.h > > index 706d45577dae..540c3ec53a6d 100644 > > --- a/drivers/gpu/drm/xe/xe_oa_types.h > > +++ b/drivers/gpu/drm/xe/xe_oa_types.h > > @@ -235,5 +235,8 @@ struct xe_oa_stream { > > > > /** @oa_status: temporary storage for oa_status register value */ > > u32 oa_status; > > + > > + /** @no_preempt: Whether preemption and timeslicing is disabled for s= tream exec_q */ > > + u32 no_preempt; > > }; > > #endif > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h > > index b410553faa9b..12eaa8532b5c 100644 > > --- a/include/uapi/drm/xe_drm.h > > +++ b/include/uapi/drm/xe_drm.h > > @@ -1611,6 +1611,12 @@ enum drm_xe_oa_property_id { > > * pass along with @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to= 0. > > */ > > DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE, > > + > > + /** > > + * @DRM_XE_OA_PROPERTY_NO_PREEMPT: Allow preemption and timeslicing > > + * to be disabled for the stream exec queue. > > + */ > > + DRM_XE_OA_PROPERTY_NO_PREEMPT, > > }; > > > > /** >