From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4601CD374A5 for ; Fri, 5 Dec 2025 21:06:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 065A610EBB7; Fri, 5 Dec 2025 21:06:50 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ANq6uiHl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id E45CF10E285 for ; Fri, 5 Dec 2025 21:06:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764968809; x=1796504809; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=c47lXz5mZZvTG1nh94TZzKKFh5W2WUXV9lL+BMffJAo=; b=ANq6uiHl1TPXfg1b2PbwfC9GyxhBVUMhx1cd7wmeBkkzsA9ZUz0ymPrN KPriHzcb4miO0oJ9mkKx+agWo1NZBMpVSpn3yyUHfs7ymqATAc1SGHVms /BqHQQfP3UiKY1FY38Op/2vcS3kKUG2Pbs4qj+wsJaJNIrapmhjxlFDkf GLadGzaTGeh1lsVEPxE4FIqr1X5fZYqR7CSDu4MB+ciRmq4fwfNA96AMA vD8fIqlkCAX7i1K66NjojyaNHg0cs6mFDkSdEjV388PMMmIj6S863FCP9 RiRaR7ABQ3PJ93gQqNMLElcQoNSN7ZEv5nOPtGB/xW+ivi2Sk2DOnBwKV w==; X-CSE-ConnectionGUID: o1G9KLrAR+yT70WAQr3jsw== X-CSE-MsgGUID: gZoCh9X2SEqKaYrdSEjCLw== X-IronPort-AV: E=McAfee;i="6800,10657,11633"; a="70856514" X-IronPort-AV: E=Sophos;i="6.20,252,1758610800"; d="scan'208";a="70856514" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2025 13:06:49 -0800 X-CSE-ConnectionGUID: fcdp1KReQPOcY3+AxZRQ2g== X-CSE-MsgGUID: dWM9yF+RSje6uE9aIWR0dQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,252,1758610800"; d="scan'208";a="199566863" Received: from pgopalap-mobl2.amr.corp.intel.com (HELO adixit-MOBL3.intel.com) ([10.124.162.149]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2025 13:06:48 -0800 Date: Fri, 05 Dec 2025 13:06:47 -0800 Message-ID: <87ldjgpriw.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Matthew Brost Cc: Shuicheng Lin , Subject: Re: [PATCH 3/3] drm/xe/oa: Limit num_syncs to prevent oversized allocations In-Reply-To: References: <20251205190506.2426471-5-shuicheng.lin@intel.com> <20251205190506.2426471-8-shuicheng.lin@intel.com> <87ms3wpsy6.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Fri, 05 Dec 2025 12:55:32 -0800, Matthew Brost wrote: > > On Fri, Dec 05, 2025 at 12:36:01PM -0800, Dixit, Ashutosh wrote: > > On Fri, 05 Dec 2025 11:05:10 -0800, Shuicheng Lin wrote: > > > > > > > Hi Shuicheng, > > > > > The OA open parameters did not validate num_syncs, allowing > > > userspace to pass arbitrarily large values, potentially > > > leading to excessive allocations. > > > > > > Add checks to ensure that num_syncs does not exceed XE_MAX_SYNCS, > > > returning -EINVAL when the limit is violated. > > > > > > Fixes: c8507a25cebd ("drm/xe/oa/uapi: Define and parse OA sync properties") > > > Cc: Matthew Brost > > > Cc: Ashutosh Dixit > > > Signed-off-by: Shuicheng Lin > > > --- > > > drivers/gpu/drm/xe/xe_oa.c | 11 +++++++++++ > > > 1 file changed, 11 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > > index cc48663c2b48..7477c27a4ba2 100644 > > > --- a/drivers/gpu/drm/xe/xe_oa.c > > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > > @@ -1254,6 +1254,11 @@ static int xe_oa_set_no_preempt(struct xe_oa *oa, u64 value, > > > static int xe_oa_set_prop_num_syncs(struct xe_oa *oa, u64 value, > > > struct xe_oa_open_param *param) > > > { > > > + if (value > XE_MAX_SYNCS) { > > > + drm_dbg(&oa->xe->drm, "num_syncs %llu must be <= %u\n", > > > + value, XE_MAX_SYNCS); > > > + return -EINVAL; > > > + } > > > > Like the other patches, let's just do: > > > > if (XE_IOCTL_DBG(xe, value > XE_MAX_SYNCS)) > > return -EINVAL; > > > > I might change the other functions here to also use XE_IOCTL_DBG(). They > > may have been written before XE_IOCTL_DBG() was implemented. > > > > > param->num_syncs = value; > > > return 0; > > > } > > > @@ -1404,6 +1409,12 @@ static int xe_oa_parse_syncs(struct xe_oa *oa, > > > } > > > > > > if (param->num_syncs) { > > > + if (param->num_syncs > XE_MAX_SYNCS) { > > > + drm_dbg(&oa->xe->drm, "num_syncs %d must be <= %u\n", > > > + param->num_syncs, XE_MAX_SYNCS); > > > + ret = -EINVAL; > > > + goto exit; > > > + } > > > > This is not needed. If we return -EINVAL from the code at the top, this > > will never get executed. > > > > Also, maybe squash the 3 patches into a single patch? Not sure if we need 3 > > patches, a single patch with XE_IOCTL_DBG() in all 3 places might make more > > sense? > > > > When did OA land? Before or after force probe removal? If after then > best at least keep the OA part in a different patch so backport patches > (hopefully) just apply. OK, yes, fair enough, the "Fixes" commit is different for OA (and it also landed after force probe removal). So let's keep the OA patch separate. Thanks. > > > > param->syncs = kcalloc(param->num_syncs, sizeof(*param->syncs), GFP_KERNEL); > > > if (!param->syncs) { > > > ret = -ENOMEM; > > > -- > > > 2.50.1 > > > > > > > Thanks. > > -- > > Ashutosh