Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Poosa, Karthik" <karthik.poosa@intel.com>,
	Soham Purkait <soham.purkait@intel.com>,
	intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
	badal.nilawar@intel.com
Cc: lucas.demarchi@intel.com, ashutosh.dixit@intel.com,
	riana.tauro@intel.com
Subject: Re: [PATCH 1/4] Utility function and macro for telemetry reading
Date: Wed, 14 May 2025 20:18:27 +0300	[thread overview]
Message-ID: <87ldqzglgc.fsf@intel.com> (raw)
In-Reply-To: <98bdd2b6-f69e-4ff0-93c8-d57099a3060e@intel.com>

On Wed, 14 May 2025, "Poosa, Karthik" <karthik.poosa@intel.com> wrote:
> On 14-05-2025 14:57, Jani Nikula wrote:
>> On Wed, 14 May 2025, Soham Purkait <soham.purkait@intel.com> wrote:
>>> The changes in this patch is taken from
>>> https://patchwork.freedesktop.org/series/148926/
>>> Thay are  added only for compilation and does not
>>> require review.
>>> ---
>>>   drivers/gpu/drm/xe/regs/xe_pmt.h | 5 +++++
>>>   drivers/gpu/drm/xe/xe_vsec.c     | 2 +-
>>>   drivers/gpu/drm/xe/xe_vsec.h     | 5 +++++
>>>   3 files changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
>>> index f45abcd96ba8..b1d4504e4adc 100644
>>> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
>>> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
>>> @@ -10,6 +10,11 @@
>>>   #define BMG_PMT_BASE_OFFSET		0xDB000
>>>   #define BMG_DISCOVERY_OFFSET		(SOC_BASE + BMG_PMT_BASE_OFFSET)
>>>   
>>> +#define PUNIT_TELEMETRY_GUID		XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
>>> +#define BMG_ENERGY_STATUS_PMT_OFFSET	(0x30)
>>> +#define ENERGY_PKG			REG_GENMASK64(31, 0)
>>> +#define ENERGY_CARD			REG_GENMASK64(63, 32)
>>> +
>>>   #define BMG_TELEMETRY_BASE_OFFSET	0xE0000
>>>   #define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
>>>   
>>> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
>>> index b378848d3b7b..a46e9580b1f4 100644
>>> --- a/drivers/gpu/drm/xe/xe_vsec.c
>>> +++ b/drivers/gpu/drm/xe/xe_vsec.c
>>> @@ -149,7 +149,7 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
>>>   	return 0;
>>>   }
>>>   
>>> -static int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_offset,
>>> +int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_offset,
>>>   			     u32 count)
>>>   {
>>>   	struct xe_device *xe = pdev_to_xe_device(pdev);
>>> diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
>>> index 5777c53faec2..6184b875e4b1 100644
>>> --- a/drivers/gpu/drm/xe/xe_vsec.h
>>> +++ b/drivers/gpu/drm/xe/xe_vsec.h
>>> @@ -4,8 +4,13 @@
>>>   #ifndef _XE_VSEC_H_
>>>   #define _XE_VSEC_H_
>>>   
>>> +#include "linux/types.h"
>>> +#include "linux/pci.h"
>>> +
>> Please address the reviews [1].
>>
>> BR,
>> Jani.
>
> These are addressed here Jani,
>
> https://patchwork.freedesktop.org/patch/653146/?series=148926&rev=2

Please sort this out between you and Soham. This is clearly conflicting
stuff, sent *after* the above.

BR,
Jani.


>>
>>
>> [1] https://lore.kernel.org/r/87ikmcvfzd.fsf@intel.com
>>
>>
>>
>>>   struct xe_device;
>>>   
>>>   void xe_vsec_init(struct xe_device *xe);
>>> +int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_offset,
>>> +		      u32 count);
>>>   
>>>   #endif

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-05-14 17:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-14  8:07 [PATCH 0/4] Add debugfs to expose G8, G10 and ModS residency Soham Purkait
2025-05-14  8:07 ` [PATCH 1/4] Utility function and macro for telemetry reading Soham Purkait
2025-05-14  9:27   ` Jani Nikula
2025-05-14 17:06     ` Poosa, Karthik
2025-05-14 17:18       ` Jani Nikula [this message]
2025-05-14  8:07 ` [PATCH 2/4] drm/xe/xe_debugfs: Exposure of G8 residency counter Soham Purkait
2025-05-14  8:44   ` Gupta, Anshuman
2025-05-14 16:27     ` Rodrigo Vivi
2025-05-14 11:07   ` Riana Tauro
2025-05-14  8:07 ` [PATCH 3/4] drm/xe/xe_debugfs: Exposure of G10 " Soham Purkait
2025-05-14  8:07 ` [PATCH 4/4] drm/xe/xe_debugfs: Exposure of Mods " Soham Purkait
2025-05-14 11:10   ` Riana Tauro
2025-05-14 21:16 ` ✗ CI.Patch_applied: failure for Add debugfs to expose G8, G10 and ModS residency Patchwork
2025-05-27  0:53 ` Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87ldqzglgc.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=anshuman.gupta@intel.com \
    --cc=ashutosh.dixit@intel.com \
    --cc=badal.nilawar@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=karthik.poosa@intel.com \
    --cc=lucas.demarchi@intel.com \
    --cc=riana.tauro@intel.com \
    --cc=soham.purkait@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox