From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2D8AFE75455 for ; Thu, 5 Oct 2023 06:13:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CE58E10E1B3; Thu, 5 Oct 2023 06:13:34 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id C5ECB10E1B3 for ; Thu, 5 Oct 2023 06:13:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696486413; x=1728022413; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=UDxcVjrOfg+lJRu6aL2b2ycIveZTSV4W+2dW7KWbUTY=; b=bCVLCvSgpEjPOkF4NmNVNfSvQGesZNhYzvNVl9VABlbm/DyEF/6baZdg 0qJ6hd+eUyR/cZd/8J6cSEFZdPwyStuZ6IrCbMuMnK2YeGYpeO1ICu/S/ 5THDMBBmU2QS0uZDDbbCvRULQKsZ91UqdlaH8lRQi2rfJuhHA7G4W+UUs DZUr4skEf3FSQQFTxu5Ugqih75TwsFBGVrr9BHxWCU8wNsoENbK40Fq6R MDCEjvTipTGALOgxEXUe61UyKLuJ7IbAQT/QPUWhD6HWKApcs0L6BtHes 6Ji31RK0yPQEkw+N9Hyoz/2EEF4HbUf6jEj8qaLBP1ge85AvSMDZni+BQ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="380692230" X-IronPort-AV: E=Sophos;i="6.03,202,1694761200"; d="scan'208";a="380692230" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 23:13:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="842251448" X-IronPort-AV: E=Sophos;i="6.03,202,1694761200"; d="scan'208";a="842251448" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.7.225]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 23:13:32 -0700 Date: Wed, 04 Oct 2023 23:13:31 -0700 Message-ID: <87lech1tro.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa In-Reply-To: References: <20230919161049.2307855-1-ashutosh.dixit@intel.com> <20230919161049.2307855-16-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-xe@lists.freedesktop.org Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, 03 Oct 2023 19:33:45 -0700, Umesh Nerlige Ramappa wrote: > Hi Umesh, > On Tue, Sep 19, 2023 at 09:10:43AM -0700, Ashutosh Dixit wrote: > > OA format names (in enum drm_xe_oa_format) have an overhead in that the > > uapi header has to be updated each time a HW introduces a new > > format. Instead of directly using OA format names, switch to using the same > > fields Bspec uses to specify formats. The fields change much less often > > than the format names. The format names are still internally maintained, > > just not exchanged through the uapi. > > I am rethinking this now. Maybe we should retain the same thing that > existed in i915 - the enum of formats. I see some resistance to this change > from UMDs like Mesa. If the enum is easier for UMDs, let's just retain > that. I will not resist strongly against going back to the format enum's but I would like to run this patch with the UMD's first before deciding (since they haven't really seen this patch). As said in the commit message above the change here (a) follows Bspec (b) is more relient to changes each time a new format is introduced. Also the format enum's can be maintained internally in both the kernel and in userland, the format enum just don't come through the uapi. The kernel change can of course be seen below in this patch. The IGT userspace change is seen the "tests/xe/oa: Use OA format fields, not format names" patch here: https://gitlab.freedesktop.org/adixit/igt-gpu-tools/-/commits/xe-oa Let me run this past the UMD's and then decide on this. Thanks. -- Ashutosh > > As for updating the UApi for each platform, we must make sure hardware > retains a backwards compatible OA format for new platforms. That's outside > the scope of this activity though. > > Sorry about the churn, since I suggested this. Let me know if you think > otherwise. > > Thanks, > Umesh > > > > > Bspec: 52198, 60942 > > > > Signed-off-by: Ashutosh Dixit > > --- > > drivers/gpu/drm/xe/xe_oa.c | 52 +++++++++++++++++++++----------- > > drivers/gpu/drm/xe/xe_oa_types.h | 23 ++++++++++++-- > > include/uapi/drm/xe_drm.h | 33 ++++++++++---------- > > 3 files changed, 72 insertions(+), 36 deletions(-) > > > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > index 19ad23b90e6ad..d49debe732bbd 100644 > > --- a/drivers/gpu/drm/xe/xe_oa.c > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > @@ -53,10 +53,10 @@ static const struct xe_oa_format oa_formats[] = { > > [XE_OA_FORMAT_A12] = { 0, 64 }, > > [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 }, > > [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 }, > > - [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 }, > > + [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256, XE_OA_FMT_TYPE_OAR }, > > [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 }, > > - [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT }, > > - [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT }, > > + [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT }, > > + [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT }, > > }; > > > > struct xe_oa_open_properties { > > @@ -65,7 +65,7 @@ struct xe_oa_open_properties { > > u64 exec_q_id; > > > > int metrics_set; > > - int oa_format; > > + enum xe_oa_format_name oa_format; > > bool oa_periodic; > > int oa_period_exponent; > > > > @@ -1529,13 +1529,6 @@ static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent) > > return div_u64(nom + den - 1, den); > > } > > > > -static bool oa_format_valid(struct xe_oa *oa, u64 format) > > -{ > > - if (format >= XE_OA_FORMAT_MAX) > > - return false; > > - return test_bit(format, oa->format_mask); > > -} > > - > > static bool engine_supports_oa(const struct xe_hw_engine *hwe) > > { > > return hwe->oa_group; > > @@ -1543,7 +1536,32 @@ static bool engine_supports_oa(const struct xe_hw_engine *hwe) > > > > static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type) > > { > > - return hwe->oa_group && hwe->oa_group->type == type; > > + switch (hwe->oa_group->type) { > > + case TYPE_OAG: > > + return type == XE_OA_FMT_TYPE_OAG || type == XE_OA_FMT_TYPE_OAR; > > + case TYPE_OAM: > > + return type == XE_OA_FMT_TYPE_OAM || type == XE_OA_FMT_TYPE_OAM_MPEC; > > + default: > > + return false; > > + } > > +} > > + > > +static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *name) > > +{ > > + u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, prop); > > + u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, prop); > > + int idx; > > + > > + for_each_set_bit(idx, oa->format_mask, XE_OA_FORMAT_MAX) { > > + const struct xe_oa_format *f = &oa->oa_formats[idx]; > > + > > + if (type == f->type && counter_sel == f->format) { > > + *name = idx; > > + return 0; > > + } > > + } > > + > > + return -EINVAL; > > } > > > > #define OA_EXPONENT_MAX 31 > > @@ -1600,12 +1618,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops, > > props->metrics_set = value; > > break; > > case DRM_XE_OA_PROP_OA_FORMAT: > > - if (!oa_format_valid(oa, value)) { > > - drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n", > > + ret = decode_oa_format(oa, value, &props->oa_format); > > + if (ret) { > > + drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n", > > value); > > - return -EINVAL; > > + return ret; > > } > > - props->oa_format = value; > > break; > > case DRM_XE_OA_PROP_OA_EXPONENT: > > if (value > OA_EXPONENT_MAX) { > > @@ -2227,7 +2245,7 @@ u16 xe_oa_unit_id(struct xe_hw_engine *hwe) > > hwe->oa_group->oa_unit_id : U16_MAX; > > } > > > > -static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format) > > +static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format) > > { > > __set_bit(format, oa->format_mask); > > } > > diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h > > index ac8b23695cc6e..3cc1d88fe4a51 100644 > > --- a/drivers/gpu/drm/xe/xe_oa_types.h > > +++ b/drivers/gpu/drm/xe/xe_oa_types.h > > @@ -24,7 +24,7 @@ enum { > > OA_GROUP_INVALID = U32_MAX, > > }; > > > > -enum oa_type { > > +enum oa_unit_type { > > TYPE_OAG, > > TYPE_OAM, > > }; > > @@ -34,6 +34,25 @@ enum report_header { > > HDR_64_BIT, > > }; > > > > +enum xe_oa_format_name { > > + XE_OA_FORMAT_C4_B8 = 7, > > + > > + /* Gen8+ */ > > + XE_OA_FORMAT_A12, > > + XE_OA_FORMAT_A12_B8_C8, > > + XE_OA_FORMAT_A32u40_A4u32_B8_C8, > > + > > + /* DG2 */ > > + XE_OAR_FORMAT_A32u40_A4u32_B8_C8, > > + XE_OA_FORMAT_A24u40_A14u32_B8_C8, > > + > > + /* MTL OAM */ > > + XE_OAM_FORMAT_MPEC8u64_B8_C8, > > + XE_OAM_FORMAT_MPEC8u32_B8_C8, > > + > > + XE_OA_FORMAT_MAX, > > +}; > > + > > struct xe_oa_format { > > u32 format; > > int size; > > @@ -96,7 +115,7 @@ struct xe_oa_group { > > struct xe_oa_regs regs; > > > > /** @type: Type of OA unit - OAM, OAG etc. */ > > - enum oa_type type; > > + enum oa_unit_type type; > > }; > > > > /** > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h > > index fe873dc63fc5a..77949c5abcee1 100644 > > --- a/include/uapi/drm/xe_drm.h > > +++ b/include/uapi/drm/xe_drm.h > > @@ -1124,23 +1124,13 @@ struct drm_xe_perf_param { > > __u64 param; > > }; > > > > -enum drm_xe_oa_format { > > - XE_OA_FORMAT_C4_B8 = 7, > > - > > - /* Gen8+ */ > > - XE_OA_FORMAT_A12, > > - XE_OA_FORMAT_A12_B8_C8, > > - XE_OA_FORMAT_A32u40_A4u32_B8_C8, > > - > > - /* DG2 */ > > - XE_OAR_FORMAT_A32u40_A4u32_B8_C8, > > - XE_OA_FORMAT_A24u40_A14u32_B8_C8, > > - > > - /* MTL OAM */ > > - XE_OAM_FORMAT_MPEC8u64_B8_C8, > > - XE_OAM_FORMAT_MPEC8u32_B8_C8, > > - > > - XE_OA_FORMAT_MAX /* non-ABI */ > > +enum drm_xe_oa_format_type { > > + XE_OA_FMT_TYPE_OAG, > > + XE_OA_FMT_TYPE_OAR, > > + XE_OA_FMT_TYPE_OAM, > > + XE_OA_FMT_TYPE_OAC, > > + XE_OA_FMT_TYPE_OAM_MPEC, > > + XE_OA_FMT_TYPE_PEC, > > }; > > > > enum drm_xe_oa_property_id { > > @@ -1167,6 +1157,15 @@ enum drm_xe_oa_property_id { > > * The value specifies the size and layout of OA unit reports. > > */ > > DRM_XE_OA_PROP_OA_FORMAT, > > + /** > > + * OA_FORMAT's are specified the same way as in Bspec, in terms of > > + * the following quantities: a. enum @drm_xe_oa_format_type > > + * b. Counter select c. Counter size and d. BC report > > + */ > > +#define XE_OA_MASK_FMT_TYPE (0xff << 0) > > +#define XE_OA_MASK_COUNTER_SEL (0xff << 8) > > +#define XE_OA_MASK_COUNTER_SIZE (0xff << 16) > > +#define XE_OA_MASK_BC_REPORT (0xff << 24) > > > > /** > > * Specifying this property implicitly requests periodic OA unit > > -- > > 2.41.0 > >