RE: [PATCH] drm/i915/pps: debug log the remaining power cycle delay to wait

[Jani Nikula <jani.nikula@intel.com>]

On Mon, 09 Dec 2024, "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
>> -----Original Message-----
>> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Wednesday, December 4, 2024 9:31 PM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Nikula, Jani <jani.nikula@intel.com>; Paul Menzel
>> <pmenzel@molgen.mpg.de>
>> Subject: [PATCH] drm/i915/pps: debug log the remaining power cycle delay to
>> wait
>>
>> While pps_init_delays() debug logs the power cycle delay, also debug log the
>> actual remaining time to wait in wait_panel_power_cycle().
>>
>> Note that this still isn't the full picture; the power sequencer may still wait after
>> this one.
>>
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13007
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> LGTM
> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

Thanks, pushed to din.

BR,
Jani.

>
>
>
>>
>> ---
>>
>> Cc: Paul Menzel <pmenzel@molgen.mpg.de>
>> ---
>>  drivers/gpu/drm/i915/display/intel_pps.c | 19 ++++++++++---------
>>  1 file changed, 10 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
>> b/drivers/gpu/drm/i915/display/intel_pps.c
>> index 7784b3b760db..bfda52850150 100644
>> --- a/drivers/gpu/drm/i915/display/intel_pps.c
>> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
>> @@ -668,23 +668,24 @@ static void wait_panel_power_cycle(struct intel_dp
>> *intel_dp)
>>       struct intel_display *display = to_intel_display(intel_dp);
>>       struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>>       ktime_t panel_power_on_time;
>> -     s64 panel_power_off_duration;
>> -
>> -     drm_dbg_kms(display->drm,
>> -                 "[ENCODER:%d:%s] %s wait for panel power cycle\n",
>> -                 dig_port->base.base.base.id, dig_port->base.base.name,
>> -                 pps_name(intel_dp));
>> +     s64 panel_power_off_duration, remaining;
>>
>>       /* take the difference of current time and panel power off time
>>        * and then make panel wait for power_cycle if needed. */
>>       panel_power_on_time = ktime_get_boottime();
>>       panel_power_off_duration = ktime_ms_delta(panel_power_on_time,
>> intel_dp->pps.panel_power_off_time);
>>
>> +     remaining = max(0, intel_dp->pps.panel_power_cycle_delay -
>> +panel_power_off_duration);
>> +
>> +     drm_dbg_kms(display->drm,
>> +                 "[ENCODER:%d:%s] %s wait for panel power cycle (%lld ms
>> remaining)\n",
>> +                 dig_port->base.base.base.id, dig_port->base.base.name,
>> +                 pps_name(intel_dp), remaining);
>> +
>>       /* When we disable the VDD override bit last we have to do the
>> manual
>>        * wait. */
>> -     if (panel_power_off_duration < (s64)intel_dp-
>> >pps.panel_power_cycle_delay)
>> -             wait_remaining_ms_from_jiffies(jiffies,
>> -                                    intel_dp->pps.panel_power_cycle_delay -
>> panel_power_off_duration);
>> +     if (remaining)
>> +             wait_remaining_ms_from_jiffies(jiffies, remaining);
>>
>>       wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE);
>> }
>> --
>> 2.39.5
>

-- 
Jani Nikula, Intel