[PATCH v5 0/4] drm/i915/display: DMC wakelock implementation

[PATCH v5 0/4] drm/i915/display: DMC wakelock implementation

[Luca Coelho]

Hi,

This is the seventh version of my series, the fifth as a proper
patchset.

These are the changes:

In v5:
   * add DOC to i915.rst;
   * Removed duplicate paragraph in main DOC section;
   * Fixed comment-style in intel_dmc_wl_get().

In v4:
   * removed the call to init from the first patch (gets added later);
   * added a flag to check if the wakelock is taken in DMC, so we
     don't try to take it again if get() is called while the work is
     queued;
   * changed the copyright year to 2024;
   * added __intel_dmc_wl_supported() to make checks easier;
   * check if supported also on init;
   * check if DMC is loaded before enabling;
   * removed a couple of stray debugging messages.

In v3:
   * Fixed some checkpatch issues.

In v2:
  * Enable/disable the wakelocks on DC5-6 entry and exit instead of on
    DMC load and unload;
  * Added bspec link to the commit message;
  * A bunch of other small changes;
  * For the complete list of changes and discussions, please look at
    the patchset in patchwork:
    https://patchwork.freedesktop.org/series/128628/

Please review.

Cheers,
Luca.


Luca Coelho (4):
  drm/i915/display: add support for DMC wakelocks
  drm/i915/display: don't allow DMC wakelock on older hardware
  drm/i915/display: add module parameter to enable DMC wakelock
  drm/i915/display: tie DMC wakelock to DC5/6 state transitions

 Documentation/gpu/i915.rst                    |   9 +
 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/display/intel_de.h       |  97 ++++++-
 .../gpu/drm/i915/display/intel_display_core.h |   2 +
 .../drm/i915/display/intel_display_driver.c   |   1 +
 .../drm/i915/display/intel_display_params.c   |   5 +
 .../drm/i915/display/intel_display_params.h   |   1 +
 .../i915/display/intel_display_power_well.c   |   7 +
 drivers/gpu/drm/i915/display/intel_dmc.c      |   4 +
 drivers/gpu/drm/i915/display/intel_dmc_regs.h |   6 +
 drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 262 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dmc_wl.h   |  31 +++
 drivers/gpu/drm/xe/Makefile                   |   1 +
 13 files changed, 419 insertions(+), 8 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h

-- 
2.39.2

[PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Luca Coelho]

In order to reduce the DC5->DC2 restore time, wakelocks have been
introduced in DMC so the driver can tell it when registers and other
memory areas are going to be accessed and keep their respective blocks
awake.

Implement this in the driver by adding the concept of DMC wakelocks.
When the driver needs to access memory which lies inside pre-defined
ranges, it will tell DMC to set the wakelock, access the memory, then
wait for a while and clear the wakelock.

The wakelock state is protected in the driver with spinlocks to
prevent concurrency issues.

BSpec: 71583
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 Documentation/gpu/i915.rst                    |   9 +
 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/display/intel_de.h       |  97 +++++++-
 .../gpu/drm/i915/display/intel_display_core.h |   2 +
 drivers/gpu/drm/i915/display/intel_dmc_regs.h |   6 +
 drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 234 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dmc_wl.h   |  31 +++
 drivers/gpu/drm/xe/Makefile                   |   1 +
 8 files changed, 373 insertions(+), 8 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h

diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 0ca1550fd9dc..17261ba18313 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -204,6 +204,15 @@ DMC Firmware Support
 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c
    :internal:
 
+DMC wakelock support
+--------------------
+
+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
+   :doc: DMC wakelock support
+
+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
+   :internal:
+
 Video BIOS Table (VBT)
 ----------------------
 
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index af9e871daf1d..7cad944b825c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -266,6 +266,7 @@ i915-y += \
 	display/intel_display_rps.o \
 	display/intel_display_wa.o \
 	display/intel_dmc.o \
+	display/intel_dmc_wl.o \
 	display/intel_dpio_phy.o \
 	display/intel_dpll.o \
 	display/intel_dpll_mgr.o \
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index ba7a1c6ebc2a..0a0fba81e7af 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -13,52 +13,125 @@
 static inline u32
 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
 {
-	return intel_uncore_read(&i915->uncore, reg);
+	u32 val;
+
+	intel_dmc_wl_get(i915, reg);
+
+	val = intel_uncore_read(&i915->uncore, reg);
+
+	intel_dmc_wl_put(i915, reg);
+
+	return val;
 }
 
 static inline u8
 intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
 {
-	return intel_uncore_read8(&i915->uncore, reg);
+	u8 val;
+
+	intel_dmc_wl_get(i915, reg);
+
+	val = intel_uncore_read8(&i915->uncore, reg);
+
+	intel_dmc_wl_put(i915, reg);
+
+	return val;
 }
 
 static inline u64
 intel_de_read64_2x32(struct drm_i915_private *i915,
 		     i915_reg_t lower_reg, i915_reg_t upper_reg)
 {
-	return intel_uncore_read64_2x32(&i915->uncore, lower_reg, upper_reg);
+	u64 val;
+
+	intel_dmc_wl_get(i915, lower_reg);
+	intel_dmc_wl_get(i915, upper_reg);
+
+	val = intel_uncore_read64_2x32(&i915->uncore, lower_reg, upper_reg);
+
+	intel_dmc_wl_put(i915, upper_reg);
+	intel_dmc_wl_put(i915, lower_reg);
+
+	return val;
 }
 
 static inline void
 intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
 {
+	intel_dmc_wl_get(i915, reg);
+
 	intel_uncore_posting_read(&i915->uncore, reg);
+
+	intel_dmc_wl_put(i915, reg);
 }
 
 static inline void
 intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
 {
+	intel_dmc_wl_get(i915, reg);
+
 	intel_uncore_write(&i915->uncore, reg, val);
+
+	intel_dmc_wl_put(i915, reg);
 }
 
 static inline u32
-intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+		    u32 clear, u32 set)
 {
 	return intel_uncore_rmw(&i915->uncore, reg, clear, set);
 }
 
+static inline u32
+intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+{
+	u32 val;
+
+	intel_dmc_wl_get(i915, reg);
+
+	val = __intel_de_rmw_nowl(i915, reg, clear, set);
+
+	intel_dmc_wl_put(i915, reg);
+
+	return val;
+}
+
+static inline int
+__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+			       u32 mask, u32 value, unsigned int timeout)
+{
+	return intel_wait_for_register(&i915->uncore, reg, mask,
+				       value, timeout);
+}
+
 static inline int
 intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg,
 	      u32 mask, u32 value, unsigned int timeout)
 {
-	return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout);
+	int ret;
+
+	intel_dmc_wl_get(i915, reg);
+
+	ret = __intel_wait_for_register_nowl(i915, reg, mask, value, timeout);
+
+	intel_dmc_wl_put(i915, reg);
+
+	return ret;
 }
 
 static inline int
 intel_de_wait_fw(struct drm_i915_private *i915, i915_reg_t reg,
 		 u32 mask, u32 value, unsigned int timeout)
 {
-	return intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout);
+	int ret;
+
+	intel_dmc_wl_get(i915, reg);
+
+	ret = intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout);
+
+	intel_dmc_wl_put(i915, reg);
+
+	return ret;
 }
 
 static inline int
@@ -67,8 +140,16 @@ intel_de_wait_custom(struct drm_i915_private *i915, i915_reg_t reg,
 		     unsigned int fast_timeout_us,
 		     unsigned int slow_timeout_ms, u32 *out_value)
 {
-	return __intel_wait_for_register(&i915->uncore, reg, mask, value,
-					 fast_timeout_us, slow_timeout_ms, out_value);
+	int ret;
+
+	intel_dmc_wl_get(i915, reg);
+
+	ret = __intel_wait_for_register(&i915->uncore, reg, mask, value,
+					fast_timeout_us, slow_timeout_ms, out_value);
+
+	intel_dmc_wl_put(i915, reg);
+
+	return ret;
 }
 
 static inline int
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index db9b6492758e..9d89828e87df 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -26,6 +26,7 @@
 #include "intel_global_state.h"
 #include "intel_gmbus.h"
 #include "intel_opregion.h"
+#include "intel_dmc_wl.h"
 #include "intel_wm_types.h"
 
 struct task_struct;
@@ -546,6 +547,7 @@ struct intel_display {
 	struct intel_overlay *overlay;
 	struct intel_display_params params;
 	struct intel_vbt_data vbt;
+	struct intel_dmc_wl wl;
 	struct intel_wm wm;
 };
 
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index 90d0dbb41cfe..1bf446f96a10 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -97,4 +97,10 @@
 #define TGL_DMC_DEBUG3		_MMIO(0x101090)
 #define DG1_DMC_DEBUG3		_MMIO(0x13415c)
 
+#define DMC_WAKELOCK_CFG	_MMIO(0x8F1B0)
+#define  DMC_WAKELOCK_CFG_ENABLE REG_BIT(31)
+#define DMC_WAKELOCK1_CTL	_MMIO(0x8F140)
+#define  DMC_WAKELOCK_CTL_REQ	 REG_BIT(31)
+#define  DMC_WAKELOCK_CTL_ACK	 REG_BIT(15)
+
 #endif /* __INTEL_DMC_REGS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
new file mode 100644
index 000000000000..abe875690e70
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2024 Intel Corporation
+ */
+
+#include <linux/kernel.h>
+
+#include "intel_de.h"
+#include "intel_dmc_regs.h"
+#include "intel_dmc_wl.h"
+
+/**
+ * DOC: DMC wakelock support
+ *
+ * Wake lock is the mechanism to cause display engine to exit DC
+ * states to allow programming to registers that are powered down in
+ * those states. Previous projects exited DC states automatically when
+ * detecting programming. Now software controls the exit by
+ * programming the wake lock. This improves system performance and
+ * system interactions and better fits the flip queue style of
+ * programming. Wake lock is only required when DC5, DC6, or DC6v have
+ * been enabled in DC_STATE_EN and the wake lock mode of operation has
+ * been enabled.
+ *
+ * The wakelock mechanism in DMC allows the display engine to exit DC
+ * states explicitly before programming registers that may be powered
+ * down.  In earlier hardware, this was done automatically and
+ * implicitly when the display engine accessed a register.  With the
+ * wakelock implementation, the driver asserts a wakelock in DMC,
+ * which forces it to exit the DC state until the wakelock is
+ * deasserted.
+ *
+ * The mechanism can be enabled and disabled by writing to the
+ * DMC_WAKELOCK_CFG register.  There are also 13 control registers
+ * that can be used to hold and release different wakelocks.  In the
+ * current implementation, we only need one wakelock, so only
+ * DMC_WAKELOCK1_CTL is used.  The other definitions are here for
+ * potential future use.
+ */
+
+#define DMC_WAKELOCK_CTL_TIMEOUT 5
+#define DMC_WAKELOCK_HOLD_TIME 50
+
+struct intel_dmc_wl_range {
+	u32 start;
+	u32 end;
+};
+
+static struct intel_dmc_wl_range lnl_wl_range[] = {
+	{ .start = 0x60000, .end = 0x7ffff },
+};
+
+static void __intel_dmc_wl_release(struct drm_i915_private *i915)
+{
+	struct intel_dmc_wl *wl = &i915->display.wl;
+
+	WARN_ON(refcount_read(&wl->refcount));
+
+	queue_delayed_work(i915->unordered_wq, &wl->work,
+			   msecs_to_jiffies(DMC_WAKELOCK_HOLD_TIME));
+}
+
+static void intel_dmc_wl_work(struct work_struct *work)
+{
+	struct intel_dmc_wl *wl =
+		container_of(work, struct intel_dmc_wl, work.work);
+	struct drm_i915_private *i915 =
+		container_of(wl, struct drm_i915_private, display.wl);
+	unsigned long flags;
+
+	spin_lock_irqsave(&wl->lock, flags);
+
+	/* Bail out if refcount reached zero while waiting for the spinlock */
+	if (!refcount_read(&wl->refcount))
+		goto out_unlock;
+
+	__intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_REQ, 0);
+
+	if (__intel_wait_for_register_nowl(i915,  DMC_WAKELOCK1_CTL,
+					   DMC_WAKELOCK_CTL_ACK, 0,
+					   DMC_WAKELOCK_CTL_TIMEOUT)) {
+		WARN_RATELIMIT(1, "DMC wakelock release timed out");
+		goto out_unlock;
+	}
+
+	wl->taken = false;
+
+out_unlock:
+	spin_unlock_irqrestore(&wl->lock, flags);
+}
+
+static bool intel_dmc_wl_check_range(u32 address)
+{
+	int i;
+	bool wl_needed = false;
+
+	for (i = 0; i < ARRAY_SIZE(lnl_wl_range); i++) {
+		if (address >= lnl_wl_range[i].start &&
+		    address <= lnl_wl_range[i].end) {
+			wl_needed = true;
+			break;
+		}
+	}
+
+	return wl_needed;
+}
+
+void intel_dmc_wl_init(struct drm_i915_private *i915)
+{
+	struct intel_dmc_wl *wl = &i915->display.wl;
+
+	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
+	spin_lock_init(&wl->lock);
+	refcount_set(&wl->refcount, 0);
+}
+
+void intel_dmc_wl_enable(struct drm_i915_private *i915)
+{
+	struct intel_dmc_wl *wl = &i915->display.wl;
+	unsigned long flags;
+
+	spin_lock_irqsave(&wl->lock, flags);
+
+	if (wl->enabled)
+		goto out_unlock;
+
+	/*
+	 * Enable wakelock in DMC.  We shouldn't try to take the
+	 * wakelock, because we're just enabling it, so call the
+	 * non-locking version directly here.
+	 */
+	__intel_de_rmw_nowl(i915, DMC_WAKELOCK_CFG, 0, DMC_WAKELOCK_CFG_ENABLE);
+
+	wl->enabled = true;
+	wl->taken = false;
+
+out_unlock:
+	spin_unlock_irqrestore(&wl->lock, flags);
+}
+
+void intel_dmc_wl_disable(struct drm_i915_private *i915)
+{
+	struct intel_dmc_wl *wl = &i915->display.wl;
+	unsigned long flags;
+
+	flush_delayed_work(&wl->work);
+
+	spin_lock_irqsave(&wl->lock, flags);
+
+	if (!wl->enabled)
+		goto out_unlock;
+
+	/* Disable wakelock in DMC */
+	__intel_de_rmw_nowl(i915, DMC_WAKELOCK_CFG, DMC_WAKELOCK_CFG_ENABLE, 0);
+
+	refcount_set(&wl->refcount, 0);
+	wl->enabled = false;
+	wl->taken = false;
+
+out_unlock:
+	spin_unlock_irqrestore(&wl->lock, flags);
+}
+
+void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg)
+{
+	struct intel_dmc_wl *wl = &i915->display.wl;
+	unsigned long flags;
+
+	if (!intel_dmc_wl_check_range(reg.reg))
+		return;
+
+	spin_lock_irqsave(&wl->lock, flags);
+
+	if (!wl->enabled)
+		goto out_unlock;
+
+	cancel_delayed_work(&wl->work);
+
+	if (refcount_inc_not_zero(&wl->refcount))
+		goto out_unlock;
+
+	refcount_set(&wl->refcount, 1);
+
+	/*
+	 * Only try to take the wakelock if it's not marked as taken
+	 * yet.  It may be already taken at this point if we have
+	 * already released the last reference, but the work has not
+	 * run yet.
+	 */
+	if (!wl->taken) {
+		__intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, 0,
+				    DMC_WAKELOCK_CTL_REQ);
+
+		if (__intel_wait_for_register_nowl(i915,  DMC_WAKELOCK1_CTL,
+						   DMC_WAKELOCK_CTL_ACK,
+						   DMC_WAKELOCK_CTL_ACK,
+						   DMC_WAKELOCK_CTL_TIMEOUT)) {
+			WARN_RATELIMIT(1, "DMC wakelock ack timed out");
+			goto out_unlock;
+		}
+
+		wl->taken = true;
+	}
+
+out_unlock:
+	spin_unlock_irqrestore(&wl->lock, flags);
+}
+
+void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg)
+{
+	struct intel_dmc_wl *wl = &i915->display.wl;
+	unsigned long flags;
+
+	if (!intel_dmc_wl_check_range(reg.reg))
+		return;
+
+	spin_lock_irqsave(&wl->lock, flags);
+
+	if (!wl->enabled)
+		goto out_unlock;
+
+	if (WARN_RATELIMIT(!refcount_read(&wl->refcount),
+			   "Tried to put wakelock with refcount zero\n"))
+		goto out_unlock;
+
+	if (refcount_dec_and_test(&wl->refcount)) {
+		__intel_dmc_wl_release(i915);
+
+		goto out_unlock;
+	}
+
+out_unlock:
+	spin_unlock_irqrestore(&wl->lock, flags);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
new file mode 100644
index 000000000000..6fb86b05b437
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (C) 2024 Intel Corporation
+ */
+
+#ifndef __INTEL_WAKELOCK_H__
+#define __INTEL_WAKELOCK_H__
+
+#include <linux/types.h>
+#include <linux/workqueue.h>
+#include <linux/refcount.h>
+
+#include "i915_reg_defs.h"
+
+struct drm_i915_private;
+
+struct intel_dmc_wl {
+	spinlock_t lock; /* protects enabled, taken  and refcount */
+	bool enabled;
+	bool taken;
+	refcount_t refcount;
+	struct delayed_work work;
+};
+
+void intel_dmc_wl_init(struct drm_i915_private *i915);
+void intel_dmc_wl_enable(struct drm_i915_private *i915);
+void intel_dmc_wl_disable(struct drm_i915_private *i915);
+void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg);
+void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg);
+
+#endif /* __INTEL_WAKELOCK_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 6015c9e41f24..23eeda2b4910 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -280,6 +280,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_vdsc.o \
 	i915-display/intel_vga.o \
 	i915-display/intel_vrr.o \
+	i915-display/intel_dmc_wl.o \
 	i915-display/intel_wm.o \
 	i915-display/skl_scaler.o \
 	i915-display/skl_universal_plane.o \
-- 
2.39.2

RE: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Shankar, Uma]

> -----Original Message-----
> From: Coelho, Luciano <luciano.coelho@intel.com>
> Sent: Friday, April 12, 2024 3:12 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
> ville.syrjala@linux.intel.com; Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
> 
> In order to reduce the DC5->DC2 restore time, wakelocks have been introduced
> in DMC so the driver can tell it when registers and other memory areas are going
> to be accessed and keep their respective blocks awake.
> 
> Implement this in the driver by adding the concept of DMC wakelocks.
> When the driver needs to access memory which lies inside pre-defined ranges, it
> will tell DMC to set the wakelock, access the memory, then wait for a while and
> clear the wakelock.
> 
> The wakelock state is protected in the driver with spinlocks to prevent
> concurrency issues.

Hi Luca,
Seems you missed to add the version history.

Anyways, changes look good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

Regards,
Uma Shankar

> BSpec: 71583
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>  Documentation/gpu/i915.rst                    |   9 +
>  drivers/gpu/drm/i915/Makefile                 |   1 +
>  drivers/gpu/drm/i915/display/intel_de.h       |  97 +++++++-
>  .../gpu/drm/i915/display/intel_display_core.h |   2 +
>  drivers/gpu/drm/i915/display/intel_dmc_regs.h |   6 +
>  drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 234 ++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_dmc_wl.h   |  31 +++
>  drivers/gpu/drm/xe/Makefile                   |   1 +
>  8 files changed, 373 insertions(+), 8 deletions(-)  create mode 100644
> drivers/gpu/drm/i915/display/intel_dmc_wl.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
> 
> diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index
> 0ca1550fd9dc..17261ba18313 100644
> --- a/Documentation/gpu/i915.rst
> +++ b/Documentation/gpu/i915.rst
> @@ -204,6 +204,15 @@ DMC Firmware Support  .. kernel-doc::
> drivers/gpu/drm/i915/display/intel_dmc.c
>     :internal:
> 
> +DMC wakelock support
> +--------------------
> +
> +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
> +   :doc: DMC wakelock support
> +
> +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
> +   :internal:
> +
>  Video BIOS Table (VBT)
>  ----------------------
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index af9e871daf1d..7cad944b825c 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -266,6 +266,7 @@ i915-y += \
>  	display/intel_display_rps.o \
>  	display/intel_display_wa.o \
>  	display/intel_dmc.o \
> +	display/intel_dmc_wl.o \
>  	display/intel_dpio_phy.o \
>  	display/intel_dpll.o \
>  	display/intel_dpll_mgr.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h
> b/drivers/gpu/drm/i915/display/intel_de.h
> index ba7a1c6ebc2a..0a0fba81e7af 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -13,52 +13,125 @@
>  static inline u32
>  intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)  {
> -	return intel_uncore_read(&i915->uncore, reg);
> +	u32 val;
> +
> +	intel_dmc_wl_get(i915, reg);
> +
> +	val = intel_uncore_read(&i915->uncore, reg);
> +
> +	intel_dmc_wl_put(i915, reg);
> +
> +	return val;
>  }
> 
>  static inline u8
>  intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)  {
> -	return intel_uncore_read8(&i915->uncore, reg);
> +	u8 val;
> +
> +	intel_dmc_wl_get(i915, reg);
> +
> +	val = intel_uncore_read8(&i915->uncore, reg);
> +
> +	intel_dmc_wl_put(i915, reg);
> +
> +	return val;
>  }
> 
>  static inline u64
>  intel_de_read64_2x32(struct drm_i915_private *i915,
>  		     i915_reg_t lower_reg, i915_reg_t upper_reg)  {
> -	return intel_uncore_read64_2x32(&i915->uncore, lower_reg,
> upper_reg);
> +	u64 val;
> +
> +	intel_dmc_wl_get(i915, lower_reg);
> +	intel_dmc_wl_get(i915, upper_reg);
> +
> +	val = intel_uncore_read64_2x32(&i915->uncore, lower_reg, upper_reg);
> +
> +	intel_dmc_wl_put(i915, upper_reg);
> +	intel_dmc_wl_put(i915, lower_reg);
> +
> +	return val;
>  }
> 
>  static inline void
>  intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)  {
> +	intel_dmc_wl_get(i915, reg);
> +
>  	intel_uncore_posting_read(&i915->uncore, reg);
> +
> +	intel_dmc_wl_put(i915, reg);
>  }
> 
>  static inline void
>  intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)  {
> +	intel_dmc_wl_get(i915, reg);
> +
>  	intel_uncore_write(&i915->uncore, reg, val);
> +
> +	intel_dmc_wl_put(i915, reg);
>  }
> 
>  static inline u32
> -intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
> +__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg,
> +		    u32 clear, u32 set)
>  {
>  	return intel_uncore_rmw(&i915->uncore, reg, clear, set);  }
> 
> +static inline u32
> +intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear,
> +u32 set) {
> +	u32 val;
> +
> +	intel_dmc_wl_get(i915, reg);
> +
> +	val = __intel_de_rmw_nowl(i915, reg, clear, set);
> +
> +	intel_dmc_wl_put(i915, reg);
> +
> +	return val;
> +}
> +
> +static inline int
> +__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg,
> +			       u32 mask, u32 value, unsigned int timeout) {
> +	return intel_wait_for_register(&i915->uncore, reg, mask,
> +				       value, timeout);
> +}
> +
>  static inline int
>  intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg,
>  	      u32 mask, u32 value, unsigned int timeout)  {
> -	return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout);
> +	int ret;
> +
> +	intel_dmc_wl_get(i915, reg);
> +
> +	ret = __intel_wait_for_register_nowl(i915, reg, mask, value, timeout);
> +
> +	intel_dmc_wl_put(i915, reg);
> +
> +	return ret;
>  }
> 
>  static inline int
>  intel_de_wait_fw(struct drm_i915_private *i915, i915_reg_t reg,
>  		 u32 mask, u32 value, unsigned int timeout)  {
> -	return intel_wait_for_register_fw(&i915->uncore, reg, mask, value,
> timeout);
> +	int ret;
> +
> +	intel_dmc_wl_get(i915, reg);
> +
> +	ret = intel_wait_for_register_fw(&i915->uncore, reg, mask, value,
> +timeout);
> +
> +	intel_dmc_wl_put(i915, reg);
> +
> +	return ret;
>  }
> 
>  static inline int
> @@ -67,8 +140,16 @@ intel_de_wait_custom(struct drm_i915_private *i915,
> i915_reg_t reg,
>  		     unsigned int fast_timeout_us,
>  		     unsigned int slow_timeout_ms, u32 *out_value)  {
> -	return __intel_wait_for_register(&i915->uncore, reg, mask, value,
> -					 fast_timeout_us, slow_timeout_ms,
> out_value);
> +	int ret;
> +
> +	intel_dmc_wl_get(i915, reg);
> +
> +	ret = __intel_wait_for_register(&i915->uncore, reg, mask, value,
> +					fast_timeout_us, slow_timeout_ms,
> out_value);
> +
> +	intel_dmc_wl_put(i915, reg);
> +
> +	return ret;
>  }
> 
>  static inline int
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index db9b6492758e..9d89828e87df 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -26,6 +26,7 @@
>  #include "intel_global_state.h"
>  #include "intel_gmbus.h"
>  #include "intel_opregion.h"
> +#include "intel_dmc_wl.h"
>  #include "intel_wm_types.h"
> 
>  struct task_struct;
> @@ -546,6 +547,7 @@ struct intel_display {
>  	struct intel_overlay *overlay;
>  	struct intel_display_params params;
>  	struct intel_vbt_data vbt;
> +	struct intel_dmc_wl wl;
>  	struct intel_wm wm;
>  };
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> index 90d0dbb41cfe..1bf446f96a10 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> @@ -97,4 +97,10 @@
>  #define TGL_DMC_DEBUG3		_MMIO(0x101090)
>  #define DG1_DMC_DEBUG3		_MMIO(0x13415c)
> 
> +#define DMC_WAKELOCK_CFG	_MMIO(0x8F1B0)
> +#define  DMC_WAKELOCK_CFG_ENABLE REG_BIT(31)
> +#define DMC_WAKELOCK1_CTL	_MMIO(0x8F140)
> +#define  DMC_WAKELOCK_CTL_REQ	 REG_BIT(31)
> +#define  DMC_WAKELOCK_CTL_ACK	 REG_BIT(15)
> +
>  #endif /* __INTEL_DMC_REGS_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> new file mode 100644
> index 000000000000..abe875690e70
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> @@ -0,0 +1,234 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2024 Intel Corporation  */
> +
> +#include <linux/kernel.h>
> +
> +#include "intel_de.h"
> +#include "intel_dmc_regs.h"
> +#include "intel_dmc_wl.h"
> +
> +/**
> + * DOC: DMC wakelock support
> + *
> + * Wake lock is the mechanism to cause display engine to exit DC
> + * states to allow programming to registers that are powered down in
> + * those states. Previous projects exited DC states automatically when
> + * detecting programming. Now software controls the exit by
> + * programming the wake lock. This improves system performance and
> + * system interactions and better fits the flip queue style of
> + * programming. Wake lock is only required when DC5, DC6, or DC6v have
> + * been enabled in DC_STATE_EN and the wake lock mode of operation has
> + * been enabled.
> + *
> + * The wakelock mechanism in DMC allows the display engine to exit DC
> + * states explicitly before programming registers that may be powered
> + * down.  In earlier hardware, this was done automatically and
> + * implicitly when the display engine accessed a register.  With the
> + * wakelock implementation, the driver asserts a wakelock in DMC,
> + * which forces it to exit the DC state until the wakelock is
> + * deasserted.
> + *
> + * The mechanism can be enabled and disabled by writing to the
> + * DMC_WAKELOCK_CFG register.  There are also 13 control registers
> + * that can be used to hold and release different wakelocks.  In the
> + * current implementation, we only need one wakelock, so only
> + * DMC_WAKELOCK1_CTL is used.  The other definitions are here for
> + * potential future use.
> + */
> +
> +#define DMC_WAKELOCK_CTL_TIMEOUT 5
> +#define DMC_WAKELOCK_HOLD_TIME 50
> +
> +struct intel_dmc_wl_range {
> +	u32 start;
> +	u32 end;
> +};
> +
> +static struct intel_dmc_wl_range lnl_wl_range[] = {
> +	{ .start = 0x60000, .end = 0x7ffff },
> +};
> +
> +static void __intel_dmc_wl_release(struct drm_i915_private *i915) {
> +	struct intel_dmc_wl *wl = &i915->display.wl;
> +
> +	WARN_ON(refcount_read(&wl->refcount));
> +
> +	queue_delayed_work(i915->unordered_wq, &wl->work,
> +			   msecs_to_jiffies(DMC_WAKELOCK_HOLD_TIME));
> +}
> +
> +static void intel_dmc_wl_work(struct work_struct *work) {
> +	struct intel_dmc_wl *wl =
> +		container_of(work, struct intel_dmc_wl, work.work);
> +	struct drm_i915_private *i915 =
> +		container_of(wl, struct drm_i915_private, display.wl);
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&wl->lock, flags);
> +
> +	/* Bail out if refcount reached zero while waiting for the spinlock */
> +	if (!refcount_read(&wl->refcount))
> +		goto out_unlock;
> +
> +	__intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL,
> DMC_WAKELOCK_CTL_REQ, 0);
> +
> +	if (__intel_wait_for_register_nowl(i915,  DMC_WAKELOCK1_CTL,
> +					   DMC_WAKELOCK_CTL_ACK, 0,
> +					   DMC_WAKELOCK_CTL_TIMEOUT)) {
> +		WARN_RATELIMIT(1, "DMC wakelock release timed out");
> +		goto out_unlock;
> +	}
> +
> +	wl->taken = false;
> +
> +out_unlock:
> +	spin_unlock_irqrestore(&wl->lock, flags); }
> +
> +static bool intel_dmc_wl_check_range(u32 address) {
> +	int i;
> +	bool wl_needed = false;
> +
> +	for (i = 0; i < ARRAY_SIZE(lnl_wl_range); i++) {
> +		if (address >= lnl_wl_range[i].start &&
> +		    address <= lnl_wl_range[i].end) {
> +			wl_needed = true;
> +			break;
> +		}
> +	}
> +
> +	return wl_needed;
> +}
> +
> +void intel_dmc_wl_init(struct drm_i915_private *i915) {
> +	struct intel_dmc_wl *wl = &i915->display.wl;
> +
> +	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
> +	spin_lock_init(&wl->lock);
> +	refcount_set(&wl->refcount, 0);
> +}
> +
> +void intel_dmc_wl_enable(struct drm_i915_private *i915) {
> +	struct intel_dmc_wl *wl = &i915->display.wl;
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&wl->lock, flags);
> +
> +	if (wl->enabled)
> +		goto out_unlock;
> +
> +	/*
> +	 * Enable wakelock in DMC.  We shouldn't try to take the
> +	 * wakelock, because we're just enabling it, so call the
> +	 * non-locking version directly here.
> +	 */
> +	__intel_de_rmw_nowl(i915, DMC_WAKELOCK_CFG, 0,
> +DMC_WAKELOCK_CFG_ENABLE);
> +
> +	wl->enabled = true;
> +	wl->taken = false;
> +
> +out_unlock:
> +	spin_unlock_irqrestore(&wl->lock, flags); }
> +
> +void intel_dmc_wl_disable(struct drm_i915_private *i915) {
> +	struct intel_dmc_wl *wl = &i915->display.wl;
> +	unsigned long flags;
> +
> +	flush_delayed_work(&wl->work);
> +
> +	spin_lock_irqsave(&wl->lock, flags);
> +
> +	if (!wl->enabled)
> +		goto out_unlock;
> +
> +	/* Disable wakelock in DMC */
> +	__intel_de_rmw_nowl(i915, DMC_WAKELOCK_CFG,
> DMC_WAKELOCK_CFG_ENABLE,
> +0);
> +
> +	refcount_set(&wl->refcount, 0);
> +	wl->enabled = false;
> +	wl->taken = false;
> +
> +out_unlock:
> +	spin_unlock_irqrestore(&wl->lock, flags); }
> +
> +void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg) {
> +	struct intel_dmc_wl *wl = &i915->display.wl;
> +	unsigned long flags;
> +
> +	if (!intel_dmc_wl_check_range(reg.reg))
> +		return;
> +
> +	spin_lock_irqsave(&wl->lock, flags);
> +
> +	if (!wl->enabled)
> +		goto out_unlock;
> +
> +	cancel_delayed_work(&wl->work);
> +
> +	if (refcount_inc_not_zero(&wl->refcount))
> +		goto out_unlock;
> +
> +	refcount_set(&wl->refcount, 1);
> +
> +	/*
> +	 * Only try to take the wakelock if it's not marked as taken
> +	 * yet.  It may be already taken at this point if we have
> +	 * already released the last reference, but the work has not
> +	 * run yet.
> +	 */
> +	if (!wl->taken) {
> +		__intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, 0,
> +				    DMC_WAKELOCK_CTL_REQ);
> +
> +		if (__intel_wait_for_register_nowl(i915,
> DMC_WAKELOCK1_CTL,
> +						   DMC_WAKELOCK_CTL_ACK,
> +						   DMC_WAKELOCK_CTL_ACK,
> +
> DMC_WAKELOCK_CTL_TIMEOUT)) {
> +			WARN_RATELIMIT(1, "DMC wakelock ack timed out");
> +			goto out_unlock;
> +		}
> +
> +		wl->taken = true;
> +	}
> +
> +out_unlock:
> +	spin_unlock_irqrestore(&wl->lock, flags); }
> +
> +void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg) {
> +	struct intel_dmc_wl *wl = &i915->display.wl;
> +	unsigned long flags;
> +
> +	if (!intel_dmc_wl_check_range(reg.reg))
> +		return;
> +
> +	spin_lock_irqsave(&wl->lock, flags);
> +
> +	if (!wl->enabled)
> +		goto out_unlock;
> +
> +	if (WARN_RATELIMIT(!refcount_read(&wl->refcount),
> +			   "Tried to put wakelock with refcount zero\n"))
> +		goto out_unlock;
> +
> +	if (refcount_dec_and_test(&wl->refcount)) {
> +		__intel_dmc_wl_release(i915);
> +
> +		goto out_unlock;
> +	}
> +
> +out_unlock:
> +	spin_unlock_irqrestore(&wl->lock, flags); }
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
> b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
> new file mode 100644
> index 000000000000..6fb86b05b437
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
> @@ -0,0 +1,31 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright (C) 2024 Intel Corporation  */
> +
> +#ifndef __INTEL_WAKELOCK_H__
> +#define __INTEL_WAKELOCK_H__
> +
> +#include <linux/types.h>
> +#include <linux/workqueue.h>
> +#include <linux/refcount.h>
> +
> +#include "i915_reg_defs.h"
> +
> +struct drm_i915_private;
> +
> +struct intel_dmc_wl {
> +	spinlock_t lock; /* protects enabled, taken  and refcount */
> +	bool enabled;
> +	bool taken;
> +	refcount_t refcount;
> +	struct delayed_work work;
> +};
> +
> +void intel_dmc_wl_init(struct drm_i915_private *i915); void
> +intel_dmc_wl_enable(struct drm_i915_private *i915); void
> +intel_dmc_wl_disable(struct drm_i915_private *i915); void
> +intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg); void
> +intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg);
> +
> +#endif /* __INTEL_WAKELOCK_H__ */
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index
> 6015c9e41f24..23eeda2b4910 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -280,6 +280,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
>  	i915-display/intel_vdsc.o \
>  	i915-display/intel_vga.o \
>  	i915-display/intel_vrr.o \
> +	i915-display/intel_dmc_wl.o \
>  	i915-display/intel_wm.o \
>  	i915-display/skl_scaler.o \
>  	i915-display/skl_universal_plane.o \
> --
> 2.39.2

Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Luca Coelho]

On Fri, 2024-04-12 at 10:30 +0000, Shankar, Uma wrote:
> 
> > -----Original Message-----
> > From: Coelho, Luciano <luciano.coelho@intel.com>
> > Sent: Friday, April 12, 2024 3:12 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel-xe@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
> > ville.syrjala@linux.intel.com; Nikula, Jani <jani.nikula@intel.com>
> > Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
> > 
> > In order to reduce the DC5->DC2 restore time, wakelocks have been introduced
> > in DMC so the driver can tell it when registers and other memory areas are going
> > to be accessed and keep their respective blocks awake.
> > 
> > Implement this in the driver by adding the concept of DMC wakelocks.
> > When the driver needs to access memory which lies inside pre-defined ranges, it
> > will tell DMC to set the wakelock, access the memory, then wait for a while and
> > clear the wakelock.
> > 
> > The wakelock state is protected in the driver with spinlocks to prevent
> > concurrency issues.
> 
> Hi Luca,
> Seems you missed to add the version history.

I've been sending the version history in the cover letter, because I
don't think it adds any information after it gets to the mainline
kernel.  The history is lost anyway, so the mailing list is a better
place to store it (it's unique and meaningful there).

Bur as I said to someone else before, I can add it to the commit
message if you think that it's needed.

> 
> Anyways, changes look good to me.
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>

Thanks a lot!

Though you didn't review patch 3/4, the one about the module parameter.
Was that intentional or did you just miss it?

--
Cheers,
Luca.

RE: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Shankar, Uma]

> -----Original Message-----
> From: Luca Coelho <luca@coelho.fi>
> Sent: Friday, April 12, 2024 5:57 PM
> To: Shankar, Uma <uma.shankar@intel.com>; Coelho, Luciano
> <luciano.coelho@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; ville.syrjala@linux.intel.com; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
> 
> On Fri, 2024-04-12 at 10:30 +0000, Shankar, Uma wrote:
> >
> > > -----Original Message-----
> > > From: Coelho, Luciano <luciano.coelho@intel.com>
> > > Sent: Friday, April 12, 2024 3:12 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: intel-xe@lists.freedesktop.org; Shankar, Uma
> > > <uma.shankar@intel.com>; ville.syrjala@linux.intel.com; Nikula, Jani
> > > <jani.nikula@intel.com>
> > > Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC
> > > wakelocks
> > >
> > > In order to reduce the DC5->DC2 restore time, wakelocks have been
> > > introduced in DMC so the driver can tell it when registers and other
> > > memory areas are going to be accessed and keep their respective blocks
> awake.
> > >
> > > Implement this in the driver by adding the concept of DMC wakelocks.
> > > When the driver needs to access memory which lies inside pre-defined
> > > ranges, it will tell DMC to set the wakelock, access the memory,
> > > then wait for a while and clear the wakelock.
> > >
> > > The wakelock state is protected in the driver with spinlocks to
> > > prevent concurrency issues.
> >
> > Hi Luca,
> > Seems you missed to add the version history.
> 
> I've been sending the version history in the cover letter, because I don't think it
> adds any information after it gets to the mainline kernel.  The history is lost
> anyway, so the mailing list is a better place to store it (it's unique and meaningful
> there).

Its matter of preference, but being part of the patch's commit message it stays with it
and can be checked with a git show. Cover letter details gets lost though as it doesn't
end up in the tree.

> Bur as I said to someone else before, I can add it to the commit message if you
> think that it's needed.

Not needed Luca, it was a simple nitpick 😊. You can skip that.

> >
> > Anyways, changes look good to me.
> > Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> 
> Thanks a lot!
> 
> Though you didn't review patch 3/4, the one about the module parameter.
> Was that intentional or did you just miss it?

I think I have reviewed and RB'ed it. The entire series is RB'ed now.

Regards,
Uma Shankar

> --
> Cheers,
> Luca.

Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Luca Coelho]

On Mon, 2024-04-15 at 05:05 +0000, Shankar, Uma wrote:
> 
> > -----Original Message-----
> > From: Luca Coelho <luca@coelho.fi>
> > Sent: Friday, April 12, 2024 5:57 PM
> > To: Shankar, Uma <uma.shankar@intel.com>; Coelho, Luciano
> > <luciano.coelho@intel.com>; intel-gfx@lists.freedesktop.org
> > Cc: intel-xe@lists.freedesktop.org; ville.syrjala@linux.intel.com; Nikula, Jani
> > <jani.nikula@intel.com>
> > Subject: Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
> > 
> > On Fri, 2024-04-12 at 10:30 +0000, Shankar, Uma wrote:
> > > 
> > > > -----Original Message-----
> > > > From: Coelho, Luciano <luciano.coelho@intel.com>
> > > > Sent: Friday, April 12, 2024 3:12 PM
> > > > To: intel-gfx@lists.freedesktop.org
> > > > Cc: intel-xe@lists.freedesktop.org; Shankar, Uma
> > > > <uma.shankar@intel.com>; ville.syrjala@linux.intel.com; Nikula, Jani
> > > > <jani.nikula@intel.com>
> > > > Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC
> > > > wakelocks
> > > > 
> > > > In order to reduce the DC5->DC2 restore time, wakelocks have been
> > > > introduced in DMC so the driver can tell it when registers and other
> > > > memory areas are going to be accessed and keep their respective blocks
> > awake.
> > > > 
> > > > Implement this in the driver by adding the concept of DMC wakelocks.
> > > > When the driver needs to access memory which lies inside pre-defined
> > > > ranges, it will tell DMC to set the wakelock, access the memory,
> > > > then wait for a while and clear the wakelock.
> > > > 
> > > > The wakelock state is protected in the driver with spinlocks to
> > > > prevent concurrency issues.
> > > 
> > > Hi Luca,
> > > Seems you missed to add the version history.
> > 
> > I've been sending the version history in the cover letter, because I don't think it
> > adds any information after it gets to the mainline kernel.  The history is lost
> > anyway, so the mailing list is a better place to store it (it's unique and meaningful
> > there).
> 
> Its matter of preference, but being part of the patch's commit message it stays with it
> and can be checked with a git show. Cover letter details gets lost though as it doesn't
> end up in the tree.

Yes, but the change history in the commit message doesn't tell the full
story.  If I write, for instance, "In v2: refactor intel_foo_bar()",
there's no way to know what it looked like before.  That's why I think
that, if we want to keep the version history accessible from the git
tree, we should have a link to the mailing list discussions, as
apparently we do in most cases anyway.


> > Bur as I said to someone else before, I can add it to the commit message if you
> > think that it's needed.
> 
> Not needed Luca, it was a simple nitpick 😊. You can skip that.

Thanks for pointing out, anyway! 😉 I don't want to keep flaming about
this, so I'll just try to remember to add it next time, so it doesn't
come up again.


> > > 
> > > Anyways, changes look good to me.
> > > Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> > 
> > Thanks a lot!
> > 
> > Though you didn't review patch 3/4, the one about the module parameter.
> > Was that intentional or did you just miss it?
> 
> I think I have reviewed and RB'ed it. The entire series is RB'ed now.

Oh, right.  "Someone" was not paying attention.  I even already had the
r-b in the commit message itself.  Silly me.

Thanks a lot for your reviews! Now I just need to get someone to merge
this series, since I don't have commit rights to the repo yet.

--
Cheers,
Luca.

Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Jani Nikula]

On Mon, 15 Apr 2024, Luca Coelho <luca@coelho.fi> wrote:
> Thanks a lot for your reviews! Now I just need to get someone to merge
> this series, since I don't have commit rights to the repo yet.

Thanks for the patches and review, merged to drm-intel-next with a
slightly heavy heart because it sets me back with [1] in a pretty
annoying way. Oh well.

BR,
Jani.

[1] https://lore.kernel.org/r/0b48d6bebfe90aa2f901a05be8279ed887d99d7a.1712665176.git.jani.nikula@intel.com


-- 
Jani Nikula, Intel

Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Luca Coelho]

On Wed, 2024-04-17 at 12:42 +0300, Jani Nikula wrote:
> On Mon, 15 Apr 2024, Luca Coelho <luca@coelho.fi> wrote:
> > Thanks a lot for your reviews! Now I just need to get someone to merge
> > this series, since I don't have commit rights to the repo yet.
> 
> Thanks for the patches and review, merged to drm-intel-next with a
> slightly heavy heart because it sets me back with [1] in a pretty
> annoying way. Oh well.
> 
> BR,
> Jani.
> 
> [1] https://lore.kernel.org/r/0b48d6bebfe90aa2f901a05be8279ed887d99d7a.1712665176.git.jani.nikula@intel.com

Oh, no! But you do have cocci and scripts, so it should be easy? Let me
know if I can help you rebase your change.

In any case, thanks for merging my patches!

--
Cheers,
Luca.

Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

[Jani Nikula]

On Wed, 17 Apr 2024, Luca Coelho <luca@coelho.fi> wrote:
> On Wed, 2024-04-17 at 12:42 +0300, Jani Nikula wrote:
>> On Mon, 15 Apr 2024, Luca Coelho <luca@coelho.fi> wrote:
>> > Thanks a lot for your reviews! Now I just need to get someone to merge
>> > this series, since I don't have commit rights to the repo yet.
>> 
>> Thanks for the patches and review, merged to drm-intel-next with a
>> slightly heavy heart because it sets me back with [1] in a pretty
>> annoying way. Oh well.
>> 
>> BR,
>> Jani.
>> 
>> [1] https://lore.kernel.org/r/0b48d6bebfe90aa2f901a05be8279ed887d99d7a.1712665176.git.jani.nikula@intel.com
>
> Oh, no! But you do have cocci and scripts, so it should be easy? Let me
> know if I can help you rebase your change.

The cocci script completely broke apart with the changes. :(

I don't know how to tell it to "first do all these transformations, then
these, and then these" which seems to be necessary.

BR,
Jani.





>
> In any case, thanks for merging my patches!
>
> --
> Cheers,
> Luca.

-- 
Jani Nikula, Intel

[PATCH v5 2/4] drm/i915/display: don't allow DMC wakelock on older hardware

[Luca Coelho]

Only allow running DMC wakelock code if the display version is 20 or
greater.  Also check if DMC is loaded before enabling.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../drm/i915/display/intel_display_driver.c   |  1 +
 drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 26 +++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 87dd07e0d138..e4015557af6a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -198,6 +198,7 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915)
 	intel_dpll_init_clock_hook(i915);
 	intel_init_display_hooks(i915);
 	intel_fdi_init_hook(i915);
+	intel_dmc_wl_init(i915);
 }
 
 /* part #1: call before irq install */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index abe875690e70..bc3f3d6dfe10 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -6,6 +6,7 @@
 #include <linux/kernel.h>
 
 #include "intel_de.h"
+#include "intel_dmc.h"
 #include "intel_dmc_regs.h"
 #include "intel_dmc_wl.h"
 
@@ -105,10 +106,23 @@ static bool intel_dmc_wl_check_range(u32 address)
 	return wl_needed;
 }
 
+static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
+{
+	if (DISPLAY_VER(i915) < 20 ||
+	    !intel_dmc_has_payload(i915))
+		return false;
+
+	return true;
+}
+
 void intel_dmc_wl_init(struct drm_i915_private *i915)
 {
 	struct intel_dmc_wl *wl = &i915->display.wl;
 
+	/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
+	if (DISPLAY_VER(i915) < 20)
+		return;
+
 	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
 	spin_lock_init(&wl->lock);
 	refcount_set(&wl->refcount, 0);
@@ -119,6 +133,9 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	spin_lock_irqsave(&wl->lock, flags);
 
 	if (wl->enabled)
@@ -143,6 +160,9 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	flush_delayed_work(&wl->work);
 
 	spin_lock_irqsave(&wl->lock, flags);
@@ -166,6 +186,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	if (!intel_dmc_wl_check_range(reg.reg))
 		return;
 
@@ -211,6 +234,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	if (!intel_dmc_wl_check_range(reg.reg))
 		return;
 
-- 
2.39.2

[PATCH v5 3/4] drm/i915/display: add module parameter to enable DMC wakelock

[Luca Coelho]

This feature should be disabled by default until properly tested and
mature.  Add a module parameter to enable the feature for testing,
while keeping it disabled by default for now.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_params.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
 drivers/gpu/drm/i915/display/intel_dmc_wl.c         | 6 ++++--
 3 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11e03cfb774d..f40b223cc8a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -116,6 +116,11 @@ intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
 	"(0=disabled, 1=enabled) "
 	"Default: 1");
 
+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
+	"Enable DMC wakelock "
+	"(0=disabled, 1=enabled) "
+	"Default: 0");
+
 __maybe_unused
 static void _param_print_bool(struct drm_printer *p, const char *driver_name,
 			      const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 6206cc51df04..bf8dbbdb20a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -46,6 +46,7 @@ struct drm_i915_private;
 	param(int, enable_psr, -1, 0600) \
 	param(bool, psr_safest_params, false, 0400) \
 	param(bool, enable_psr2_sel_fetch, true, 0400) \
+	param(bool, enable_dmc_wl, false, 0400) \
 
 #define MEMBER(T, member, ...) T member;
 struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index bc3f3d6dfe10..30f8905fae41 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -109,7 +109,8 @@ static bool intel_dmc_wl_check_range(u32 address)
 static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
 {
 	if (DISPLAY_VER(i915) < 20 ||
-	    !intel_dmc_has_payload(i915))
+	    !intel_dmc_has_payload(i915) ||
+	    !i915->display.params.enable_dmc_wl)
 		return false;
 
 	return true;
@@ -120,7 +121,8 @@ void intel_dmc_wl_init(struct drm_i915_private *i915)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 
 	/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
-	if (DISPLAY_VER(i915) < 20)
+	if (DISPLAY_VER(i915) < 20 ||
+	    !i915->display.params.enable_dmc_wl)
 		return;
 
 	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
-- 
2.39.2

[PATCH v5 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions

[Luca Coelho]

We only need DMC wakelocks when we allow DC5 and DC6 states.  Add the
calls to enable and disable DMC wakelock accordingly.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++++++
 drivers/gpu/drm/i915/display/intel_dmc.c                | 4 ++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index e4de40228997..7f4b7602cf02 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -17,6 +17,7 @@
 #include "intel_dkl_phy.h"
 #include "intel_dkl_phy_regs.h"
 #include "intel_dmc.h"
+#include "intel_dmc_wl.h"
 #include "intel_dp_aux_regs.h"
 #include "intel_dpio_phy.h"
 #include "intel_dpll.h"
@@ -821,6 +822,8 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv)
 		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
 			     0, SKL_SELECT_ALTERNATE_DC_EXIT);
 
+	intel_dmc_wl_enable(dev_priv);
+
 	gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5);
 }
 
@@ -850,6 +853,8 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv)
 		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
 			     0, SKL_SELECT_ALTERNATE_DC_EXIT);
 
+	intel_dmc_wl_enable(dev_priv);
+
 	gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
 }
 
@@ -970,6 +975,8 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv)
 	if (!HAS_DISPLAY(dev_priv))
 		return;
 
+	intel_dmc_wl_disable(dev_priv);
+
 	intel_cdclk_get_cdclk(dev_priv, &cdclk_config);
 	/* Can't read out voltage_level so can't use intel_cdclk_changed() */
 	drm_WARN_ON(&dev_priv->drm,
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index e61e9c1b8947..a34ff3383fd3 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -552,6 +552,8 @@ void intel_dmc_disable_program(struct drm_i915_private *i915)
 	pipedmc_clock_gating_wa(i915, true);
 	disable_all_event_handlers(i915);
 	pipedmc_clock_gating_wa(i915, false);
+
+	intel_dmc_wl_disable(i915);
 }
 
 void assert_dmc_loaded(struct drm_i915_private *i915)
@@ -1081,6 +1083,8 @@ void intel_dmc_suspend(struct drm_i915_private *i915)
 	if (dmc)
 		flush_work(&dmc->work);
 
+	intel_dmc_wl_disable(i915);
+
 	/* Drop the reference held in case DMC isn't loaded. */
 	if (!intel_dmc_has_payload(i915))
 		intel_dmc_runtime_pm_put(i915);
-- 
2.39.2

✓ CI.Patch_applied: success for drm/i915/display: DMC wakelock implementation (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/display: DMC wakelock implementation (rev6)
URL   : https://patchwork.freedesktop.org/series/128628/
State : success

== Summary ==

=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 13ece134d9f5 drm-tip: 2024y-04m-12d-12h-05m-15s UTC integration manifest
=== git am output follows ===
Applying: drm/i915/display: add support for DMC wakelocks
Applying: drm/i915/display: don't allow DMC wakelock on older hardware
Applying: drm/i915/display: add module parameter to enable DMC wakelock
Applying: drm/i915/display: tie DMC wakelock to DC5/6 state transitions

✗ CI.checkpatch: warning for drm/i915/display: DMC wakelock implementation (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/display: DMC wakelock implementation (rev6)
URL   : https://patchwork.freedesktop.org/series/128628/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c87357e7f6655908c0934a4f55fadf5b9aa9e88f
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cd5a399dc27d67173213f20de19138543b233672
Author: Luca Coelho <luciano.coelho@intel.com>
Date:   Fri Apr 12 12:41:48 2024 +0300

    drm/i915/display: tie DMC wakelock to DC5/6 state transitions
    
    We only need DMC wakelocks when we allow DC5 and DC6 states.  Add the
    calls to enable and disable DMC wakelock accordingly.
    
    Reviewed-by: Uma Shankar <uma.shankar@intel.com>
    Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
+ /mt/dim checkpatch 13ece134d9f58473658e6cd80cc23fba3a4fb0d3 drm-intel
381e51e3e0cb drm/i915/display: add support for DMC wakelocks
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in <module>
    from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in <module>
    from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:246: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#246: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 467 lines checked
6fa4fd562599 drm/i915/display: don't allow DMC wakelock on older hardware
2068afc5b281 drm/i915/display: add module parameter to enable DMC wakelock
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:120:
+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
+	"Enable DMC wakelock "

total: 0 errors, 0 warnings, 1 checks, 36 lines checked
cd5a399dc27d drm/i915/display: tie DMC wakelock to DC5/6 state transitions

✓ CI.KUnit: success for drm/i915/display: DMC wakelock implementation (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/display: DMC wakelock implementation (rev6)
URL   : https://patchwork.freedesktop.org/series/128628/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:44:39] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:44:43] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
../arch/x86/um/user-offsets.c:17:6: warning: no previous prototype for ‘foo’ [-Wmissing-prototypes]
   17 | void foo(void)
      |      ^~~
In file included from ../arch/um/kernel/asm-offsets.c:1:
../arch/x86/um/shared/sysdep/kernel-offsets.h:9:6: warning: no previous prototype for ‘foo’ [-Wmissing-prototypes]
    9 | void foo(void)
      |      ^~~
../arch/x86/um/bugs_64.c:9:6: warning: no previous prototype for ‘arch_check_bugs’ [-Wmissing-prototypes]
    9 | void arch_check_bugs(void)
      |      ^~~~~~~~~~~~~~~
../arch/x86/um/bugs_64.c:13:6: warning: no previous prototype for ‘arch_examine_signal’ [-Wmissing-prototypes]
   13 | void arch_examine_signal(int sig, struct uml_pt_regs *regs)
      |      ^~~~~~~~~~~~~~~~~~~
../arch/x86/um/fault.c:18:5: warning: no previous prototype for ‘arch_fixup’ [-Wmissing-prototypes]
   18 | int arch_fixup(unsigned long address, struct uml_pt_regs *regs)
      |     ^~~~~~~~~~
../arch/x86/um/os-Linux/registers.c:146:15: warning: no previous prototype for ‘get_thread_reg’ [-Wmissing-prototypes]
  146 | unsigned long get_thread_reg(int reg, jmp_buf *buf)
      |               ^~~~~~~~~~~~~~
../arch/x86/um/vdso/um_vdso.c:16:5: warning: no previous prototype for ‘__vdso_clock_gettime’ [-Wmissing-prototypes]
   16 | int __vdso_clock_gettime(clockid_t clock, struct __kernel_old_timespec *ts)
      |     ^~~~~~~~~~~~~~~~~~~~
../arch/x86/um/vdso/um_vdso.c:30:5: warning: no previous prototype for ‘__vdso_gettimeofday’ [-Wmissing-prototypes]
   30 | int __vdso_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz)
      |     ^~~~~~~~~~~~~~~~~~~
../arch/x86/um/vdso/um_vdso.c:44:21: warning: no previous prototype for ‘__vdso_time’ [-Wmissing-prototypes]
   44 | __kernel_old_time_t __vdso_time(__kernel_old_time_t *t)
      |                     ^~~~~~~~~~~
../arch/x86/um/vdso/um_vdso.c:57:1: warning: no previous prototype for ‘__vdso_getcpu’ [-Wmissing-prototypes]
   57 | __vdso_getcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *unused)
      | ^~~~~~~~~~~~~
../arch/um/os-Linux/skas/process.c:107:6: warning: no previous prototype for ‘wait_stub_done’ [-Wmissing-prototypes]
  107 | void wait_stub_done(int pid)
      |      ^~~~~~~~~~~~~~
../arch/um/os-Linux/skas/process.c:683:6: warning: no previous prototype for ‘__switch_mm’ [-Wmissing-prototypes]
  683 | void __switch_mm(struct mm_id *mm_idp)
      |      ^~~~~~~~~~~
../arch/x86/um/os-Linux/mcontext.c:7:6: warning: no previous prototype for ‘get_regs_from_mc’ [-Wmissing-prototypes]
    7 | void get_regs_from_mc(struct uml_pt_regs *regs, mcontext_t *mc)
      |      ^~~~~~~~~~~~~~~~
../arch/um/kernel/skas/process.c:36:12: warning: no previous prototype for ‘start_uml’ [-Wmissing-prototypes]
   36 | int __init start_uml(void)
      |            ^~~~~~~~~
../arch/um/os-Linux/main.c:187:7: warning: no previous prototype for ‘__wrap_malloc’ [-Wmissing-prototypes]
  187 | void *__wrap_malloc(int size)
      |       ^~~~~~~~~~~~~
../arch/um/os-Linux/main.c:208:7: warning: no previous prototype for ‘__wrap_calloc’ [-Wmissing-prototypes]
  208 | void *__wrap_calloc(int n, int size)
      |       ^~~~~~~~~~~~~
../arch/um/os-Linux/main.c:222:6: warning: no previous prototype for ‘__wrap_free’ [-Wmissing-prototypes]
  222 | void __wrap_free(void *ptr)
      |      ^~~~~~~~~~~
../arch/um/kernel/skas/mmu.c:17:5: warning: no previous prototype for ‘init_new_context’ [-Wmissing-prototypes]
   17 | int init_new_context(struct task_struct *task, struct mm_struct *mm)
      |     ^~~~~~~~~~~~~~~~
../arch/um/kernel/skas/mmu.c:60:6: warning: no previous prototype for ‘destroy_context’ [-Wmissing-prototypes]
   60 | void destroy_context(struct mm_struct *mm)
      |      ^~~~~~~~~~~~~~~
../arch/um/os-Linux/mem.c:28:6: warning: no previous prototype for ‘kasan_map_memory’ [-Wmissing-prototypes]
   28 | void kasan_map_memory(void *start, size_t len)
      |      ^~~~~~~~~~~~~~~~
../arch/um/os-Linux/mem.c:212:13: warning: no previous prototype for ‘check_tmpexec’ [-Wmissing-prototypes]
  212 | void __init check_tmpexec(void)
      |             ^~~~~~~~~~~~~
../arch/um/os-Linux/signal.c:75:6: warning: no previous prototype for ‘sig_handler’ [-Wmissing-prototypes]
   75 | void sig_handler(int sig, struct siginfo *si, mcontext_t *mc)
      |      ^~~~~~~~~~~
../arch/um/os-Linux/signal.c:111:6: warning: no previous prototype for ‘timer_alarm_handler’ [-Wmissing-prototypes]
  111 | void timer_alarm_handler(int sig, struct siginfo *unused_si, mcontext_t *mc)
      |      ^~~~~~~~~~~~~~~~~~~
../arch/um/os-Linux/start_up.c:301:12: warning: no previous prototype for ‘parse_iomem’ [-Wmissing-prototypes]
  301 | int __init parse_iomem(char *str, int *add)
      |            ^~~~~~~~~~~
../arch/x86/um/ptrace_64.c:111:5: warning: no previous prototype for ‘poke_user’ [-Wmissing-prototypes]
  111 | int poke_user(struct task_struct *child, long addr, long data)
      |     ^~~~~~~~~
../arch/x86/um/ptrace_64.c:171:5: warning: no previous prototype for ‘peek_user’ [-Wmissing-prototypes]
  171 | int peek_user(struct task_struct *child, long addr, long data)
      |     ^~~~~~~~~
../arch/x86/um/signal.c:560:6: warning: no previous prototype for ‘sys_rt_sigreturn’ [-Wmissing-prototypes]
  560 | long sys_rt_sigreturn(void)
      |      ^~~~~~~~~~~~~~~~
../arch/um/kernel/mem.c:202:8: warning: no previous prototype for ‘pgd_alloc’ [-Wmissing-prototypes]
  202 | pgd_t *pgd_alloc(struct mm_struct *mm)
      |        ^~~~~~~~~
../arch/um/kernel/mem.c:215:7: warning: no previous prototype for ‘uml_kmalloc’ [-Wmissing-prototypes]
  215 | void *uml_kmalloc(int size, int flags)
      |       ^~~~~~~~~~~
../arch/x86/um/syscalls_64.c:48:6: warning: no previous prototype for ‘arch_switch_to’ [-Wmissing-prototypes]
   48 | void arch_switch_to(struct task_struct *to)
      |      ^~~~~~~~~~~~~~
../arch/um/kernel/process.c:51:5: warning: no previous prototype for ‘pid_to_processor_id’ [-Wmissing-prototypes]
   51 | int pid_to_processor_id(int pid)
      |     ^~~~~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:87:7: warning: no previous prototype for ‘__switch_to’ [-Wmissing-prototypes]
   87 | void *__switch_to(struct task_struct *from, struct task_struct *to)
      |       ^~~~~~~~~~~
../arch/um/kernel/process.c:140:6: warning: no previous prototype for ‘fork_handler’ [-Wmissing-prototypes]
  140 | void fork_handler(void)
      |      ^~~~~~~~~~~~
../arch/um/kernel/process.c:217:6: warning: no previous prototype for ‘arch_cpu_idle’ [-Wmissing-prototypes]
  217 | void arch_cpu_idle(void)
      |      ^~~~~~~~~~~~~
../arch/um/kernel/process.c:253:5: warning: no previous prototype for ‘copy_to_user_proc’ [-Wmissing-prototypes]
  253 | int copy_to_user_proc(void __user *to, void *from, int size)
      |     ^~~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:263:5: warning: no previous prototype for ‘clear_user_proc’ [-Wmissing-prototypes]
  263 | int clear_user_proc(void __user *buf, int size)
      |     ^~~~~~~~~~~~~~~
../arch/um/kernel/process.c:271:6: warning: no previous prototype for ‘set_using_sysemu’ [-Wmissing-prototypes]
  271 | void set_using_sysemu(int value)
      |      ^~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:278:5: warning: no previous prototype for ‘get_using_sysemu’ [-Wmissing-prototypes]
  278 | int get_using_sysemu(void)
      |     ^~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:316:12: warning: no previous prototype for ‘make_proc_sysemu’ [-Wmissing-prototypes]
  316 | int __init make_proc_sysemu(void)
      |            ^~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:348:15: warning: no previous prototype for ‘arch_align_stack’ [-Wmissing-prototypes]
  348 | unsigned long arch_align_stack(unsigned long sp)
      |               ^~~~~~~~~~~~~~~~
../arch/um/kernel/reboot.c:45:6: warning: no previous prototype for ‘machine_restart’ [-Wmissing-prototypes]
   45 | void machine_restart(char * __unused)
      |      ^~~~~~~~~~~~~~~
../arch/um/kernel/reboot.c:51:6: warning: no previous prototype for ‘machine_power_off’ [-Wmissing-prototypes]
   51 | void machine_power_off(void)
      |      ^~~~~~~~~~~~~~~~~
../arch/um/kernel/reboot.c:57:6: warning: no previous prototype for ‘machine_halt’ [-Wmissing-prototypes]
   57 | void machine_halt(void)
      |      ^~~~~~~~~~~~
../arch/um/kernel/tlb.c:579:6: warning: no previous prototype for ‘flush_tlb_mm_range’ [-Wmissing-prototypes]
  579 | void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
      |      ^~~~~~~~~~~~~~~~~~
../arch/um/kernel/tlb.c:594:6: warning: no previous prototype for ‘force_flush_all’ [-Wmissing-prototypes]
  594 | void force_flush_all(void)
      |      ^~~~~~~~~~~~~~~
../arch/um/kernel/um_arch.c:408:19: warning: no previous prototype for ‘read_initrd’ [-Wmissing-prototypes]
  408 | int __init __weak read_initrd(void)
      |                   ^~~~~~~~~~~
../arch/um/kernel/um_arch.c:461:7: warning: no previous prototype for ‘text_poke’ [-Wmissing-prototypes]
  461 | void *text_poke(void *addr, const void *opcode, size_t len)
      |       ^~~~~~~~~
../arch/um/kernel/um_arch.c:473:6: warning: no previous prototype for ‘text_poke_sync’ [-Wmissing-prototypes]
  473 | void text_poke_sync(void)
      |      ^~~~~~~~~~~~~~
../arch/um/kernel/kmsg_dump.c:60:12: warning: no previous prototype for ‘kmsg_dumper_stdout_init’ [-Wmissing-prototypes]
   60 | int __init kmsg_dumper_stdout_init(void)
      |            ^~~~~~~~~~~~~~~~~~~~~~~
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
  156 | u64 ioread64_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
  163 | u64 ioread64_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
  170 | u64 ioread64be_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
  178 | u64 ioread64be_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
  264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
  272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
  280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
  288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~
stty: 'standard input': Inappropriate ioctl for device

[12:45:08] Starting KUnit Kernel (1/1)...
[12:45:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:45:08] =================== guc_dbm (7 subtests) ===================
[12:45:08] [PASSED] test_empty
[12:45:08] [PASSED] test_default
[12:45:08] ======================== test_size  ========================
[12:45:08] [PASSED] 4
[12:45:08] [PASSED] 8
[12:45:08] [PASSED] 32
[12:45:08] [PASSED] 256
[12:45:08] ==================== [PASSED] test_size ====================
[12:45:08] ======================= test_reuse  ========================
[12:45:08] [PASSED] 4
[12:45:08] [PASSED] 8
[12:45:08] [PASSED] 32
[12:45:08] [PASSED] 256
[12:45:08] =================== [PASSED] test_reuse ====================
[12:45:08] =================== test_range_overlap  ====================
[12:45:08] [PASSED] 4
[12:45:08] [PASSED] 8
[12:45:08] [PASSED] 32
[12:45:08] [PASSED] 256
[12:45:08] =============== [PASSED] test_range_overlap ================
[12:45:08] =================== test_range_compact  ====================
[12:45:08] [PASSED] 4
[12:45:08] [PASSED] 8
[12:45:08] [PASSED] 32
[12:45:08] [PASSED] 256
[12:45:08] =============== [PASSED] test_range_compact ================
[12:45:08] ==================== test_range_spare  =====================
[12:45:08] [PASSED] 4
[12:45:08] [PASSED] 8
[12:45:08] [PASSED] 32
[12:45:08] [PASSED] 256
[12:45:08] ================ [PASSED] test_range_spare =================
[12:45:08] ===================== [PASSED] guc_dbm =====================
[12:45:08] =================== guc_idm (6 subtests) ===================
[12:45:08] [PASSED] bad_init
[12:45:08] [PASSED] no_init
[12:45:08] [PASSED] init_fini
[12:45:08] [PASSED] check_used
[12:45:08] [PASSED] check_quota
[12:45:08] [PASSED] check_all
[12:45:08] ===================== [PASSED] guc_idm =====================
[12:45:08] ================== no_relay (3 subtests) ===================
[12:45:08] [PASSED] xe_drops_guc2pf_if_not_ready
[12:45:08] [PASSED] xe_drops_guc2vf_if_not_ready
[12:45:08] [PASSED] xe_rejects_send_if_not_ready
[12:45:08] ==================== [PASSED] no_relay =====================
[12:45:08] ================== pf_relay (14 subtests) ==================
[12:45:08] [PASSED] pf_rejects_guc2pf_too_short
[12:45:08] [PASSED] pf_rejects_guc2pf_too_long
[12:45:08] [PASSED] pf_rejects_guc2pf_no_payload
[12:45:08] [PASSED] pf_fails_no_payload
[12:45:08] [PASSED] pf_fails_bad_origin
[12:45:08] [PASSED] pf_fails_bad_type
[12:45:08] [PASSED] pf_txn_reports_error
[12:45:08] [PASSED] pf_txn_sends_pf2guc
[12:45:08] [PASSED] pf_sends_pf2guc
[12:45:08] [SKIPPED] pf_loopback_nop
[12:45:08] [SKIPPED] pf_loopback_echo
[12:45:08] [SKIPPED] pf_loopback_fail
[12:45:08] [SKIPPED] pf_loopback_busy
[12:45:08] [SKIPPED] pf_loopback_retry
[12:45:08] ==================== [PASSED] pf_relay =====================
[12:45:08] ================== vf_relay (3 subtests) ===================
[12:45:08] [PASSED] vf_rejects_guc2vf_too_short
[12:45:08] [PASSED] vf_rejects_guc2vf_too_long
[12:45:08] [PASSED] vf_rejects_guc2vf_no_payload
[12:45:08] ==================== [PASSED] vf_relay =====================
[12:45:08] ===================== lmtt (1 subtest) =====================
[12:45:08] ======================== test_ops  =========================
[12:45:08] [PASSED] 2-level
[12:45:08] [PASSED] multi-level
[12:45:08] ==================== [PASSED] test_ops =====================
[12:45:08] ====================== [PASSED] lmtt =======================
[12:45:08] ==================== xe_bo (2 subtests) ====================
[12:45:08] [SKIPPED] xe_ccs_migrate_kunit
[12:45:08] [SKIPPED] xe_bo_evict_kunit
[12:45:08] ===================== [SKIPPED] xe_bo ======================
[12:45:08] ================== xe_dma_buf (1 subtest) ==================
[12:45:08] [SKIPPED] xe_dma_buf_kunit
[12:45:08] =================== [SKIPPED] xe_dma_buf ===================
[12:45:08] ================== xe_migrate (1 subtest) ==================
[12:45:08] [SKIPPED] xe_migrate_sanity_kunit
[12:45:08] =================== [SKIPPED] xe_migrate ===================
[12:45:08] =================== xe_mocs (2 subtests) ===================
[12:45:08] [SKIPPED] xe_live_mocs_kernel_kunit
[12:45:08] [SKIPPED] xe_live_mocs_reset_kunit
[12:45:08] ==================== [SKIPPED] xe_mocs =====================
[12:45:08] =================== xe_pci (2 subtests) ====================
[12:45:08] [PASSED] xe_gmdid_graphics_ip
[12:45:08] [PASSED] xe_gmdid_media_ip
[12:45:08] ===================== [PASSED] xe_pci ======================
[12:45:08] ==================== xe_rtp (1 subtest) ====================
[12:45:08] ================== xe_rtp_process_tests  ===================
[12:45:08] [PASSED] coalesce-same-reg
[12:45:08] [PASSED] no-match-no-add
[12:45:08] [PASSED] no-match-no-add-multiple-rules
[12:45:08] [PASSED] two-regs-two-entries
[12:45:08] [PASSED] clr-one-set-other
[12:45:08] [PASSED] set-field
[12:45:08] [PASSED] conflict-duplicate
[12:45:08] [PASSED] conflict-not-disjoint
[12:45:08] [PASSED] conflict-reg-type
[12:45:08] ============== [PASSED] xe_rtp_process_tests ===============
[12:45:08] ===================== [PASSED] xe_rtp ======================
[12:45:08] ==================== xe_wa (1 subtest) =====================
[12:45:08] ======================== xe_wa_gt  =========================
[12:45:08] [PASSED] TIGERLAKE (B0)
[12:45:08] [PASSED] DG1 (A0)
[12:45:08] [PASSED] DG1 (B0)
[12:45:08] [PASSED] ALDERLAKE_S (A0)
[12:45:08] [PASSED] ALDERLAKE_S (B0)
[12:45:08] [PASSED] ALDERLAKE_S (C0)
[12:45:08] [PASSED] ALDERLAKE_S (D0)
[12:45:08] [PASSED] ALDERLAKE_P (A0)
[12:45:08] [PASSED] ALDERLAKE_P (B0)
[12:45:08] [PASSED] ALDERLAKE_P (C0)
[12:45:08] [PASSED] ALDERLAKE_S_RPLS (D0)
[12:45:08] [PASSED] ALDERLAKE_P_RPLU (E0)
[12:45:08] [PASSED] DG2_G10 (C0)
[12:45:08] [PASSED] DG2_G11 (B1)
[12:45:08] [PASSED] DG2_G12 (A1)
[12:45:08] [PASSED] METEORLAKE (g:A0, m:A0)
[12:45:08] [PASSED] METEORLAKE (g:A0, m:A0)
[12:45:08] [PASSED] METEORLAKE (g:A0, m:A0)
[12:45:08] [PASSED] LUNARLAKE (g:A0, m:A0)
[12:45:08] [PASSED] LUNARLAKE (g:B0, m:A0)
[12:45:08] ==================== [PASSED] xe_wa_gt =====================
[12:45:08] ====================== [PASSED] xe_wa ======================
[12:45:08] ============================================================
[12:45:08] Testing complete. Ran 87 tests: passed: 76, skipped: 11
[12:45:08] Elapsed time: 29.384s total, 4.224s configuring, 24.839s building, 0.287s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:45:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:45:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
In file included from ../arch/um/kernel/asm-offsets.c:1:
../arch/x86/um/shared/sysdep/kernel-offsets.h:9:6: warning: no previous prototype for ‘foo’ [-Wmissing-prototypes]
    9 | void foo(void)
      |      ^~~
../arch/x86/um/ptrace_64.c:111:5: warning: no previous prototype for ‘poke_user’ [-Wmissing-prototypes]
  111 | int poke_user(struct task_struct *child, long addr, long data)
      |     ^~~~~~~~~
../arch/x86/um/ptrace_64.c:171:5: warning: no previous prototype for ‘peek_user’ [-Wmissing-prototypes]
  171 | int peek_user(struct task_struct *child, long addr, long data)
      |     ^~~~~~~~~
../arch/x86/um/signal.c:560:6: warning: no previous prototype for ‘sys_rt_sigreturn’ [-Wmissing-prototypes]
  560 | long sys_rt_sigreturn(void)
      |      ^~~~~~~~~~~~~~~~
../arch/um/kernel/mem.c:202:8: warning: no previous prototype for ‘pgd_alloc’ [-Wmissing-prototypes]
  202 | pgd_t *pgd_alloc(struct mm_struct *mm)
      |        ^~~~~~~~~
../arch/um/kernel/mem.c:215:7: warning: no previous prototype for ‘uml_kmalloc’ [-Wmissing-prototypes]
  215 | void *uml_kmalloc(int size, int flags)
      |       ^~~~~~~~~~~
../arch/um/kernel/process.c:51:5: warning: no previous prototype for ‘pid_to_processor_id’ [-Wmissing-prototypes]
   51 | int pid_to_processor_id(int pid)
      |     ^~~~~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:87:7: warning: no previous prototype for ‘__switch_to’ [-Wmissing-prototypes]
   87 | void *__switch_to(struct task_struct *from, struct task_struct *to)
      |       ^~~~~~~~~~~
../arch/um/kernel/process.c:140:6: warning: no previous prototype for ‘fork_handler’ [-Wmissing-prototypes]
  140 | void fork_handler(void)
      |      ^~~~~~~~~~~~
../arch/um/kernel/process.c:217:6: warning: no previous prototype for ‘arch_cpu_idle’ [-Wmissing-prototypes]
  217 | void arch_cpu_idle(void)
      |      ^~~~~~~~~~~~~
../arch/um/kernel/process.c:253:5: warning: no previous prototype for ‘copy_to_user_proc’ [-Wmissing-prototypes]
  253 | int copy_to_user_proc(void __user *to, void *from, int size)
      |     ^~~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:263:5: warning: no previous prototype for ‘clear_user_proc’ [-Wmissing-prototypes]
  263 | int clear_user_proc(void __user *buf, int size)
      |     ^~~~~~~~~~~~~~~
../arch/um/kernel/process.c:271:6: warning: no previous prototype for ‘set_using_sysemu’ [-Wmissing-prototypes]
  271 | void set_using_sysemu(int value)
      |      ^~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:278:5: warning: no previous prototype for ‘get_using_sysemu’ [-Wmissing-prototypes]
  278 | int get_using_sysemu(void)
      |     ^~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:316:12: warning: no previous prototype for ‘make_proc_sysemu’ [-Wmissing-prototypes]
  316 | int __init make_proc_sysemu(void)
      |            ^~~~~~~~~~~~~~~~
../arch/um/kernel/process.c:348:15: warning: no previous prototype for ‘arch_align_stack’ [-Wmissing-prototypes]
  348 | unsigned long arch_align_stack(unsigned long sp)
      |               ^~~~~~~~~~~~~~~~
../arch/um/kernel/reboot.c:45:6: warning: no previous prototype for ‘machine_restart’ [-Wmissing-prototypes]
   45 | void machine_restart(char * __unused)
      |      ^~~~~~~~~~~~~~~
../arch/um/kernel/reboot.c:51:6: warning: no previous prototype for ‘machine_power_off’ [-Wmissing-prototypes]
   51 | void machine_power_off(void)
      |      ^~~~~~~~~~~~~~~~~
../arch/um/kernel/reboot.c:57:6: warning: no previous prototype for ‘machine_halt’ [-Wmissing-prototypes]
   57 | void machine_halt(void)
      |      ^~~~~~~~~~~~
../arch/x86/um/syscalls_64.c:48:6: warning: no previous prototype for ‘arch_switch_to’ [-Wmissing-prototypes]
   48 | void arch_switch_to(struct task_struct *to)
      |      ^~~~~~~~~~~~~~
../arch/um/kernel/tlb.c:579:6: warning: no previous prototype for ‘flush_tlb_mm_range’ [-Wmissing-prototypes]
  579 | void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
      |      ^~~~~~~~~~~~~~~~~~
../arch/um/kernel/tlb.c:594:6: warning: no previous prototype for ‘force_flush_all’ [-Wmissing-prototypes]
  594 | void force_flush_all(void)
      |      ^~~~~~~~~~~~~~~
../arch/um/kernel/um_arch.c:408:19: warning: no previous prototype for ‘read_initrd’ [-Wmissing-prototypes]
  408 | int __init __weak read_initrd(void)
      |                   ^~~~~~~~~~~
../arch/um/kernel/um_arch.c:461:7: warning: no previous prototype for ‘text_poke’ [-Wmissing-prototypes]
  461 | void *text_poke(void *addr, const void *opcode, size_t len)
      |       ^~~~~~~~~
../arch/um/kernel/um_arch.c:473:6: warning: no previous prototype for ‘text_poke_sync’ [-Wmissing-prototypes]
  473 | void text_poke_sync(void)
      |      ^~~~~~~~~~~~~~
../arch/um/kernel/kmsg_dump.c:60:12: warning: no previous prototype for ‘kmsg_dumper_stdout_init’ [-Wmissing-prototypes]
   60 | int __init kmsg_dumper_stdout_init(void)
      |            ^~~~~~~~~~~~~~~~~~~~~~~
../arch/um/kernel/skas/process.c:36:12: warning: no previous prototype for ‘start_uml’ [-Wmissing-prototypes]
   36 | int __init start_uml(void)
      |            ^~~~~~~~~
../arch/um/kernel/skas/mmu.c:17:5: warning: no previous prototype for ‘init_new_context’ [-Wmissing-prototypes]
   17 | int init_new_context(struct task_struct *task, struct mm_struct *mm)
      |     ^~~~~~~~~~~~~~~~
../arch/um/kernel/skas/mmu.c:60:6: warning: no previous prototype for ‘destroy_context’ [-Wmissing-prototypes]
   60 | void destroy_context(struct mm_struct *mm)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
  156 | u64 ioread64_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
  163 | u64 ioread64_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
  170 | u64 ioread64be_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
  178 | u64 ioread64be_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
  264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
  272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
  280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
  288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~

[12:45:31] Starting KUnit Kernel (1/1)...
[12:45:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:45:31] ============ drm_test_pick_cmdline (2 subtests) ============
[12:45:31] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:45:31] =============== drm_test_pick_cmdline_named  ===============
[12:45:31] [PASSED] NTSC
[12:45:31] [PASSED] NTSC-J
[12:45:31] [PASSED] PAL
[12:45:31] [PASSED] PAL-M
[12:45:31] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:45:31] ============== [PASSED] drm_test_pick_cmdline ==============
[12:45:31] ================== drm_buddy (6 subtests) ==================
[12:45:31] [PASSED] drm_test_buddy_alloc_limit
[12:45:31] [PASSED] drm_test_buddy_alloc_optimistic
[12:45:31] [PASSED] drm_test_buddy_alloc_pessimistic
[12:45:31] [PASSED] drm_test_buddy_alloc_pathological
[12:45:31] [PASSED] drm_test_buddy_alloc_contiguous
[12:45:31] [PASSED] drm_test_buddy_alloc_range_bias
[12:45:31] ==================== [PASSED] drm_buddy ====================
[12:45:31] ============= drm_cmdline_parser (40 subtests) =============
[12:45:31] [PASSED] drm_test_cmdline_force_d_only
[12:45:31] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:45:31] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:45:31] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:45:31] [PASSED] drm_test_cmdline_force_e_only
[12:45:31] [PASSED] drm_test_cmdline_res
[12:45:31] [PASSED] drm_test_cmdline_res_vesa
[12:45:31] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:45:31] [PASSED] drm_test_cmdline_res_rblank
[12:45:31] [PASSED] drm_test_cmdline_res_bpp
[12:45:31] [PASSED] drm_test_cmdline_res_refresh
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:45:31] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:45:31] [PASSED] drm_test_cmdline_res_margins_force_on
[12:45:31] [PASSED] drm_test_cmdline_res_vesa_margins
[12:45:31] [PASSED] drm_test_cmdline_name
[12:45:31] [PASSED] drm_test_cmdline_name_bpp
[12:45:31] [PASSED] drm_test_cmdline_name_option
[12:45:31] [PASSED] drm_test_cmdline_name_bpp_option
[12:45:31] [PASSED] drm_test_cmdline_rotate_0
[12:45:31] [PASSED] drm_test_cmdline_rotate_90
[12:45:31] [PASSED] drm_test_cmdline_rotate_180
[12:45:31] [PASSED] drm_test_cmdline_rotate_270
[12:45:31] [PASSED] drm_test_cmdline_hmirror
[12:45:31] [PASSED] drm_test_cmdline_vmirror
[12:45:31] [PASSED] drm_test_cmdline_margin_options
[12:45:31] [PASSED] drm_test_cmdline_multiple_options
[12:45:31] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:45:31] [PASSED] drm_test_cmdline_extra_and_option
[12:45:31] [PASSED] drm_test_cmdline_freestanding_options
[12:45:31] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:45:31] [PASSED] drm_test_cmdline_panel_orientation
[12:45:31] ================ drm_test_cmdline_invalid  =================
[12:45:31] [PASSED] margin_only
[12:45:31] [PASSED] interlace_only
[12:45:31] [PASSED] res_missing_x
[12:45:31] [PASSED] res_missing_y
[12:45:31] [PASSED] res_bad_y
[12:45:31] [PASSED] res_missing_y_bpp
[12:45:31] [PASSED] res_bad_bpp
[12:45:31] [PASSED] res_bad_refresh
[12:45:31] [PASSED] res_bpp_refresh_force_on_off
[12:45:31] [PASSED] res_invalid_mode
[12:45:31] [PASSED] res_bpp_wrong_place_mode
[12:45:31] [PASSED] name_bpp_refresh
[12:45:31] [PASSED] name_refresh
[12:45:31] [PASSED] name_refresh_wrong_mode
[12:45:31] [PASSED] name_refresh_invalid_mode
[12:45:31] [PASSED] rotate_multiple
[12:45:31] [PASSED] rotate_invalid_val
[12:45:31] [PASSED] rotate_truncated
[12:45:31] [PASSED] invalid_option
[12:45:31] [PASSED] invalid_tv_option
[12:45:31] [PASSED] truncated_tv_option
[12:45:31] ============ [PASSED] drm_test_cmdline_invalid =============
[12:45:31] =============== drm_test_cmdline_tv_options  ===============
[12:45:31] [PASSED] NTSC
[12:45:31] [PASSED] NTSC_443
[12:45:31] [PASSED] NTSC_J
[12:45:31] [PASSED] PAL
[12:45:31] [PASSED] PAL_M
[12:45:31] [PASSED] PAL_N
[12:45:31] [PASSED] SECAM
[12:45:31] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:45:31] =============== [PASSED] drm_cmdline_parser ================
[12:45:31] ============= drmm_connector_init (3 subtests) =============
[12:45:31] [PASSED] drm_test_drmm_connector_init
[12:45:31] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:45:31] ========= drm_test_drmm_connector_init_type_valid  =========
[12:45:31] [PASSED] Unknown
[12:45:31] [PASSED] VGA
[12:45:31] [PASSED] DVI-I
[12:45:31] [PASSED] DVI-D
[12:45:31] [PASSED] DVI-A
[12:45:31] [PASSED] Composite
[12:45:31] [PASSED] SVIDEO
[12:45:31] [PASSED] LVDS
[12:45:31] [PASSED] Component
[12:45:31] [PASSED] DIN
[12:45:31] [PASSED] DP
[12:45:31] [PASSED] HDMI-A
[12:45:31] [PASSED] HDMI-B
[12:45:31] [PASSED] TV
[12:45:31] [PASSED] eDP
[12:45:31] [PASSED] Virtual
[12:45:31] [PASSED] DSI
[12:45:31] [PASSED] DPI
[12:45:31] [PASSED] Writeback
[12:45:31] [PASSED] SPI
[12:45:31] [PASSED] USB
[12:45:31] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:45:31] =============== [PASSED] drmm_connector_init ===============
[12:45:31] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:45:31] ========== drm_test_get_tv_mode_from_name_valid  ===========
[12:45:31] [PASSED] NTSC
[12:45:31] [PASSED] NTSC-443
[12:45:31] [PASSED] NTSC-J
[12:45:31] [PASSED] PAL
[12:45:31] [PASSED] PAL-M
[12:45:31] [PASSED] PAL-N
[12:45:31] [PASSED] SECAM
[12:45:31] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:45:31] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:45:31] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:45:31] ============= drm_damage_helper (21 subtests) ==============
[12:45:31] [PASSED] drm_test_damage_iter_no_damage
[12:45:31] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:45:31] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:45:31] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:45:31] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:45:31] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:45:31] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:45:31] [PASSED] drm_test_damage_iter_simple_damage
[12:45:31] [PASSED] drm_test_damage_iter_single_damage
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:45:31] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:45:31] [PASSED] drm_test_damage_iter_damage
[12:45:31] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:45:31] [PASSED] drm_test_damage_iter_damage_one_outside
[12:45:31] [PASSED] drm_test_damage_iter_damage_src_moved
[12:45:31] [PASSED] drm_test_damage_iter_damage_not_visible
[12:45:31] ================ [PASSED] drm_damage_helper ================
[12:45:31] ============== drm_dp_mst_helper (3 subtests) ==============
[12:45:31] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[12:45:31] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:45:31] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:45:31] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:45:31] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:45:31] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:45:31] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:45:31] ============== drm_test_dp_mst_calc_pbn_div  ===============
[12:45:31] [PASSED] Link rate 2000000 lane count 4
[12:45:31] [PASSED] Link rate 2000000 lane count 2
[12:45:31] [PASSED] Link rate 2000000 lane count 1
[12:45:31] [PASSED] Link rate 1350000 lane count 4
[12:45:31] [PASSED] Link rate 1350000 lane count 2
[12:45:31] [PASSED] Link rate 1350000 lane count 1
[12:45:31] [PASSED] Link rate 1000000 lane count 4
[12:45:31] [PASSED] Link rate 1000000 lane count 2
[12:45:31] [PASSED] Link rate 1000000 lane count 1
[12:45:31] [PASSED] Link rate 810000 lane count 4
[12:45:31] [PASSED] Link rate 810000 lane count 2
[12:45:31] [PASSED] Link rate 810000 lane count 1
[12:45:31] [PASSED] Link rate 540000 lane count 4
[12:45:31] [PASSED] Link rate 540000 lane count 2
[12:45:31] [PASSED] Link rate 540000 lane count 1
[12:45:31] [PASSED] Link rate 270000 lane count 4
[12:45:31] [PASSED] Link rate 270000 lane count 2
[12:45:31] [PASSED] Link rate 270000 lane count 1
[12:45:31] [PASSED] Link rate 162000 lane count 4
[12:45:31] [PASSED] Link rate 162000 lane count 2
[12:45:31] [PASSED] Link rate 162000 lane count 1
[12:45:31] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:45:31] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[12:45:31] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:45:31] [PASSED] DP_POWER_UP_PHY with port number
[12:45:31] [PASSED] DP_POWER_DOWN_PHY with port number
[12:45:31] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:45:31] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:45:31] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:45:31] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:45:31] [PASSED] DP_QUERY_PAYLOAD with port number
[12:45:31] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:45:31] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:45:31] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:45:31] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:45:31] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:45:31] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:45:31] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:45:31] [PASSED] DP_REMOTE_I2C_READ with port number
[12:45:31] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:45:31] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:45:31] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:45:31] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:45:31] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:45:31] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:45:31] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:45:31] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:45:31] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:45:31] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:45:31] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:45:31] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:45:31] ================ [PASSED] drm_dp_mst_helper ================
[12:45:31] ================== drm_exec (7 subtests) ===================
[12:45:31] [PASSED] sanitycheck
[12:45:31] [PASSED] test_lock
[12:45:31] [PASSED] test_lock_unlock
[12:45:31] [PASSED] test_duplicates
[12:45:31] [PASSED] test_prepare
[12:45:31] [PASSED] test_prepare_array
[12:45:31] [PASSED] test_multiple_loops
[12:45:31] ==================== [PASSED] drm_exec =====================
[12:45:31] =========== drm_format_helper_test (17 subtests) ===========
[12:45:31] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:45:31] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:45:31] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:45:31] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:45:31] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:45:31] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:45:31] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:45:31] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:45:31] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:45:31] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:45:31] ============== drm_test_fb_xrgb8888_to_mono  ===============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:45:31] ==================== drm_test_fb_swab  =====================
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ================ [PASSED] drm_test_fb_swab =================
[12:45:31] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:45:31] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[12:45:31] [PASSED] single_pixel_source_buffer
[12:45:31] [PASSED] single_pixel_clip_rectangle
[12:45:31] [PASSED] well_known_colors
[12:45:31] [PASSED] destination_pitch
[12:45:31] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:45:31] ================= drm_test_fb_clip_offset  =================
[12:45:31] [PASSED] pass through
[12:45:31] [PASSED] horizontal offset
[12:45:31] [PASSED] vertical offset
[12:45:31] [PASSED] horizontal and vertical offset
[12:45:31] [PASSED] horizontal offset (custom pitch)
[12:45:31] [PASSED] vertical offset (custom pitch)
[12:45:31] [PASSED] horizontal and vertical offset (custom pitch)
[12:45:31] ============= [PASSED] drm_test_fb_clip_offset =============
[12:45:31] ============== drm_test_fb_build_fourcc_list  ==============
[12:45:31] [PASSED] no native formats
[12:45:31] [PASSED] XRGB8888 as native format
[12:45:31] [PASSED] remove duplicates
[12:45:31] [PASSED] convert alpha formats
[12:45:31] [PASSED] random formats
[12:45:31] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[12:45:31] =================== drm_test_fb_memcpy  ====================
[12:45:31] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:45:31] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:45:31] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:45:31] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:45:31] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:45:31] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:45:31] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:45:31] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:45:31] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:45:31] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:45:31] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:45:31] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:45:31] =============== [PASSED] drm_test_fb_memcpy ================
[12:45:31] ============= [PASSED] drm_format_helper_test ==============
[12:45:31] ================= drm_format (18 subtests) =================
[12:45:31] [PASSED] drm_test_format_block_width_invalid
[12:45:31] [PASSED] drm_test_format_block_width_one_plane
[12:45:31] [PASSED] drm_test_format_block_width_two_plane
[12:45:31] [PASSED] drm_test_format_block_width_three_plane
[12:45:31] [PASSED] drm_test_format_block_width_tiled
[12:45:31] [PASSED] drm_test_format_block_height_invalid
[12:45:31] [PASSED] drm_test_format_block_height_one_plane
[12:45:31] [PASSED] drm_test_format_block_height_two_plane
[12:45:31] [PASSED] drm_test_format_block_height_three_plane
[12:45:31] [PASSED] drm_test_format_block_height_tiled
[12:45:31] [PASSED] drm_test_format_min_pitch_invalid
[12:45:31] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:45:31] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:45:31] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:45:31] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:45:31] [PASSED] drm_test_format_min_pitch_two_plane
[12:45:31] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:45:31] [PASSED] drm_test_format_min_pitch_tiled
[12:45:31] =================== [PASSED] drm_format ====================
[12:45:31] =============== drm_framebuffer (1 subtest) ================
[12:45:31] =============== drm_test_framebuffer_create  ===============
[12:45:31] [PASSED] ABGR8888 normal sizes
[12:45:31] [PASSED] ABGR8888 max sizes
[12:45:31] [PASSED] ABGR8888 pitch greater than min required
[12:45:31] [PASSED] ABGR8888 pitch less than min required
[12:45:31] [PASSED] ABGR8888 Invalid width
[12:45:31] [PASSED] ABGR8888 Invalid buffer handle
[12:45:31] [PASSED] No pixel format
[12:45:31] [PASSED] ABGR8888 Width 0
[12:45:31] [PASSED] ABGR8888 Height 0
[12:45:31] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:45:31] [PASSED] ABGR8888 Large buffer offset
[12:45:31] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:45:31] [PASSED] ABGR8888 Valid buffer modifier
[12:45:31] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:45:31] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] NV12 Normal sizes
[12:45:31] [PASSED] NV12 Max sizes
[12:45:31] [PASSED] NV12 Invalid pitch
[12:45:31] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:45:31] [PASSED] NV12 different  modifier per-plane
[12:45:31] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:45:31] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] NV12 Modifier for inexistent plane
[12:45:31] [PASSED] NV12 Handle for inexistent plane
[12:45:31] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:45:31] [PASSED] YVU420 Normal sizes
[12:45:31] [PASSED] YVU420 Max sizes
[12:45:31] [PASSED] YVU420 Invalid pitch
[12:45:31] [PASSED] YVU420 Different pitches
[12:45:31] [PASSED] YVU420 Different buffer offsets/pitches
[12:45:31] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:45:31] [PASSED] YVU420 Valid modifier
[12:45:31] [PASSED] YVU420 Different modifiers per plane
[12:45:31] [PASSED] YVU420 Modifier for inexistent plane
[12:45:31] [PASSED] X0L2 Normal sizes
[12:45:31] [PASSED] X0L2 Max sizes
[12:45:31] [PASSED] X0L2 Invalid pitch
[12:45:31] [PASSED] X0L2 Pitch greater than minimum required
[12:45:31] [PASSED] X0L2 Handle for inexistent plane
[12:45:31] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:45:31] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:45:31] [PASSED] X0L2 Valid modifier
[12:45:31] [PASSED] X0L2 Modifier for inexistent plane
[12:45:31] =========== [PASSED] drm_test_framebuffer_create ===========
[12:45:31] ================= [PASSED] drm_framebuffer =================
[12:45:31] ================ drm_gem_shmem (8 subtests) ================
[12:45:31] [PASSED] drm_gem_shmem_test_obj_create
[12:45:31] [PASSED] drm_gem_shmem_test_obj_create_private
[12:45:31] [PASSED] drm_gem_shmem_test_pin_pages
[12:45:31] [PASSED] drm_gem_shmem_test_vmap
[12:45:31] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:45:31] [PASSED] drm_gem_shmem_test_get_sg_table
[12:45:31] [PASSED] drm_gem_shmem_test_madvise
[12:45:31] [PASSED] drm_gem_shmem_test_purge
[12:45:31] ================== [PASSED] drm_gem_shmem ==================
[12:45:31] ================= drm_managed (2 subtests) =================
[12:45:31] [PASSED] drm_test_managed_release_action
[12:45:31] [PASSED] drm_test_managed_run_action
[12:45:31] =================== [PASSED] drm_managed ===================
[12:45:31] =================== drm_mm (6 subtests) ====================
[12:45:31] [PASSED] drm_test_mm_init
[12:45:31] [PASSED] drm_test_mm_debug
[12:45:31] [PASSED] drm_test_mm_align32
[12:45:31] [PASSED] drm_test_mm_align64
[12:45:31] [PASSED] drm_test_mm_lowest
[12:45:31] [PASSED] drm_test_mm_highest
[12:45:31] ===================== [PASSED] drm_mm ======================
[12:45:31] ============= drm_modes_analog_tv (4 subtests) =============
[12:45:31] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:45:31] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:45:31] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:45:31] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:45:31] =============== [PASSED] drm_modes_analog_tv ===============
[12:45:31] ============== drm_plane_helper (2 subtests) ===============
[12:45:31] =============== drm_test_check_plane_state  ================
[12:45:31] [PASSED] clipping_simple
[12:45:31] [PASSED] clipping_rotate_reflect
[12:45:31] [PASSED] positioning_simple
[12:45:31] [PASSED] upscaling
[12:45:31] [PASSED] downscaling
[12:45:31] [PASSED] rounding1
[12:45:31] [PASSED] rounding2
[12:45:31] [PASSED] rounding3
[12:45:31] [PASSED] rounding4
[12:45:31] =========== [PASSED] drm_test_check_plane_state ============
[12:45:31] =========== drm_test_check_invalid_plane_state  ============
[12:45:31] [PASSED] positioning_invalid
[12:45:31] [PASSED] upscaling_invalid
[12:45:31] [PASSED] downscaling_invalid
[12:45:31] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:45:31] ================ [PASSED] drm_plane_helper =================
[12:45:31] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:45:31] ====== drm_test_connector_helper_tv_get_modes_check  =======
[12:45:31] [PASSED] None
[12:45:31] [PASSED] PAL
[12:45:31] [PASSED] NTSC
[12:45:31] [PASSED] Both, NTSC Default
[12:45:31] [PASSED] Both, PAL Default
[12:45:31] [PASSED] Both, NTSC Default, with PAL on command-line
[12:45:31] [PASSED] Both, PAL Default, with NTSC on command-line
[12:45:31] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:45:31] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:45:31] ================== drm_rect (9 subtests) ===================
[12:45:31] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:45:31] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:45:31] [PASSED] drm_test_rect_clip_scaled_clipped
[12:45:31] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
stty: 'standard input': Inappropriate ioctl for device
[12:45:31] ================= drm_test_rect_intersect  =================
[12:45:31] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:45:31] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:45:31] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:45:31] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:45:31] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:45:31] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:45:31] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:45:31] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:45:31] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:45:31] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:45:31] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:45:31] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:45:31] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:45:31] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:45:31] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:45:31] ============= [PASSED] drm_test_rect_intersect =============
[12:45:31] ================ drm_test_rect_calc_hscale  ================
[12:45:31] [PASSED] normal use
[12:45:31] [PASSED] out of max range
[12:45:31] [PASSED] out of min range
[12:45:31] [PASSED] zero dst
[12:45:31] [PASSED] negative src
[12:45:31] [PASSED] negative dst
[12:45:31] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:45:31] ================ drm_test_rect_calc_vscale  ================
[12:45:31] [PASSED] normal use
[12:45:31] [PASSED] out of max range
[12:45:31] [PASSED] out of min range
[12:45:31] [PASSED] zero dst
[12:45:31] [PASSED] negative src
[12:45:31] [PASSED] negative dst
[12:45:31] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:45:31] ================== drm_test_rect_rotate  ===================
[12:45:31] [PASSED] reflect-x
[12:45:31] [PASSED] reflect-y
[12:45:31] [PASSED] rotate-0
[12:45:31] [PASSED] rotate-90
[12:45:31] [PASSED] rotate-180
[12:45:31] [PASSED] rotate-270
[12:45:31] ============== [PASSED] drm_test_rect_rotate ===============
[12:45:31] ================ drm_test_rect_rotate_inv  =================
[12:45:31] [PASSED] reflect-x
[12:45:31] [PASSED] reflect-y
[12:45:31] [PASSED] rotate-0
[12:45:31] [PASSED] rotate-90
[12:45:31] [PASSED] rotate-180
[12:45:31] [PASSED] rotate-270
[12:45:31] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:45:31] ==================== [PASSED] drm_rect =====================
[12:45:31] ============================================================
[12:45:31] Testing complete. Ran 416 tests: passed: 416
[12:45:31] Elapsed time: 23.164s total, 1.708s configuring, 21.329s building, 0.124s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel