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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Murthy, Arun R" <arun.r.murthy@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: "Deak, Imre" <imre.deak@intel.com>
Subject: RE: [PATCH v5 1/2] drm/i915/display/dp: Remove support for UHBR13.5
Date: Mon, 14 Apr 2025 12:46:34 +0300	[thread overview]
Message-ID: <87o6wzt6rp.fsf@intel.com> (raw)
In-Reply-To: <IA0PR11MB7307CE76BA7C7B1E79003E11BAB32@IA0PR11MB7307.namprd11.prod.outlook.com>

On Mon, 14 Apr 2025, "Murthy, Arun R" <arun.r.murthy@intel.com> wrote:
> Any comments?
> Gentle Reminder!

This is the level of clarity and accuracy I was hoping for in the commit
message:

"""
Subject: drm/i915/dp: DG2 does not support UHBR 13.5

DG2 does not actually support UHBR 13.5 link rate. Reduce DG2 max link
rate to UHBR 10, and drop UHBR 13.5 from the supported source rates for
DG2.

The VBT on DG2 platforms should already limit the max link rate to UHBR
10, but be defensive about it.
"""

>
> Thanks and Regards,
> Arun R Murthy
> --------------------
>
>> -----Original Message-----
>> From: Murthy, Arun R <arun.r.murthy@intel.com>
>> Sent: Friday, April 4, 2025 10:25 AM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Jani Nikula <jani.nikula@linux.intel.com>; Deak, Imre
>> <imre.deak@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>
>> Subject: [PATCH v5 1/2] drm/i915/display/dp: Remove support for UHBR13.5
>> 
>> The retimer issue for UHBR13.5 is fixed in BMG.
>> So for all platforms lesser than BMG(XE2_HPD/DISPLAY_VERx100 1401) disable
>> UHBR13.5.
>> commit caf3d748f646 ("drm/i915/dp: Remove support for UHBR13.5")
>> removes UHBR13.5 for MTL.
>> 
>> v2: Reframed the commit msg (Jani)
>> v4: Reframed the commit msg & update the max rate supported (Jani)
>> v5: Reframed the commit msg (Jani)
>> 
>> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index
>> f21f9b441fc2a4e644c69410e6ec6b3d37907478..92bca701a989b03e2ad4b3d9
>> e7d0a9ef12567e5a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -481,7 +481,7 @@ bool intel_dp_has_joiner(struct intel_dp *intel_dp)
>> 
>>  static int dg2_max_source_rate(struct intel_dp *intel_dp)  {
>> -	return intel_dp_is_edp(intel_dp) ? 810000 : 1350000;
>> +	return intel_dp_is_edp(intel_dp) ? 810000 : 1000000;
>>  }
>> 
>>  static int icl_max_source_rate(struct intel_dp *intel_dp) @@ -550,7 +550,7
>> @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
>>  	};
>>  	static const int icl_rates[] = {
>>  		162000, 216000, 270000, 324000, 432000, 540000, 648000,
>> 810000,
>> -		1000000, 1350000,
>> +		1000000,
>>  	};
>>  	static const int bxt_rates[] = {
>>  		162000, 216000, 243000, 270000, 324000, 432000, 540000
>> 
>> --
>> 2.25.1
>

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-04-14  9:46 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-04  4:55 [PATCH v5 0/2] Remove support for UHBR13.5 Arun R Murthy
2025-04-04  4:55 ` [PATCH v5 1/2] drm/i915/display/dp: " Arun R Murthy
2025-04-04 12:34   ` Jani Nikula
2025-04-14  5:37   ` Murthy, Arun R
2025-04-14  9:46     ` Jani Nikula [this message]
2025-04-04  4:55 ` [PATCH v5 2/2] drm/i915/display/dp: Remove the uhbr13.5 pll state values Arun R Murthy
2025-04-14  9:49   ` Jani Nikula
2025-04-04  7:11 ` ✓ CI.Patch_applied: success for Remove support for UHBR13.5 Patchwork
2025-04-04  7:11 ` ✓ CI.checkpatch: " Patchwork
2025-04-04  7:12 ` ✓ CI.KUnit: " Patchwork
2025-04-04  7:29 ` ✓ CI.Build: " Patchwork
2025-04-04  7:31 ` ✓ CI.Hooks: " Patchwork
2025-04-04  7:33 ` ✓ CI.checksparse: " Patchwork
2025-04-04  8:19 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-04 18:35 ` ✗ Xe.CI.Full: failure " Patchwork

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