From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1307BEB64DA for ; Thu, 6 Jul 2023 01:12:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 98F6D10E086; Thu, 6 Jul 2023 01:12:10 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id EBB9F10E086 for ; Thu, 6 Jul 2023 01:12:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688605929; x=1720141929; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=TeC/UN+N1TnRJ80MIvQ/ccdAJucJYUdwcKY2BH3dN/U=; b=Mdl06G3Z47JcrErL0aUnprRZ6HjXzshZDsIBz1il2hmNDKwdPZjp+3Ky J2jfrRNbJ+n0duu8r+VRb+RiVYZ/EE66V1jfw57meRt0p1Wqk13DQSJKj nByU6eSOsdDZKr7Xp74nXhPfnw/VJauHFGtyqd2JReO83WW5K8OpnkYJp JLsThkgu9o8kNsMp4GZeYRhbDsaIbR2tNgqPFTbJlkB8lsdBqccrxPy8k kkAWESxQIhScYOtfk7ziWNK8HGtn0ZugsndxpcanT0dd2JdBZLSWiltJv u3gtd2Hk6xR9KQpA/V9K8AMd/AM0iWrHAyhvyIDLJ2//8AiFpsQ1FDruH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10762"; a="353312629" X-IronPort-AV: E=Sophos;i="6.01,184,1684825200"; d="scan'208";a="353312629" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2023 18:12:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10762"; a="1049899329" X-IronPort-AV: E=Sophos;i="6.01,184,1684825200"; d="scan'208";a="1049899329" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.1.248]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2023 18:12:07 -0700 Date: Wed, 05 Jul 2023 17:55:24 -0700 Message-ID: <87pm55dfk3.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Aravind Iddamsetty In-Reply-To: <20230627122113.1472532-2-aravind.iddamsetty@intel.com> References: <20230627122113.1472532-1-aravind.iddamsetty@intel.com> <20230627122113.1472532-2-aravind.iddamsetty@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-xe] [PATCH v2 1/2] drm/xe: Get GT clock to nanosecs X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-xe@lists.freedesktop.org Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, 27 Jun 2023 05:21:12 -0700, Aravind Iddamsetty wrote: > Hi Aravind, > Helpers to get GT clock to nanosecs > > Signed-off-by: Aravind Iddamsetty > --- > drivers/gpu/drm/xe/xe_gt_clock.c | 10 ++++++++++ > drivers/gpu/drm/xe/xe_gt_clock.h | 4 +++- > 2 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/xe/xe_gt_clock.c b/drivers/gpu/drm/xe/xe_gt_clock.c > index 7cf11078ff57..3689c7d5cf53 100644 > --- a/drivers/gpu/drm/xe/xe_gt_clock.c > +++ b/drivers/gpu/drm/xe/xe_gt_clock.c > @@ -78,3 +78,13 @@ int xe_gt_clock_init(struct xe_gt *gt) > gt->info.clock_freq = freq; > return 0; > } > + > +static u64 div_u64_roundup(u64 nom, u32 den) s/num/nom/ > +{ > + return div_u64(nom + den - 1, den); > +} > + Shouldn't need this function. Look at DIV_ROUND_CLOSEST_ULL in math.h or DIV64_U64_ROUND_CLOSEST or DIV64_U64_ROUND_UP in math64.h. > +u64 xe_gt_clock_interval_to_ns(const struct xe_gt *gt, u64 count) > +{ > + return div_u64_roundup(count * NSEC_PER_SEC, gt->info.clock_freq); > +} > diff --git a/drivers/gpu/drm/xe/xe_gt_clock.h b/drivers/gpu/drm/xe/xe_gt_clock.h > index 511923afd224..91fc9b7e83f5 100644 > --- a/drivers/gpu/drm/xe/xe_gt_clock.h > +++ b/drivers/gpu/drm/xe/xe_gt_clock.h > @@ -6,8 +6,10 @@ > #ifndef _XE_GT_CLOCK_H_ > #define _XE_GT_CLOCK_H_ > > +#include > + > struct xe_gt; > > int xe_gt_clock_init(struct xe_gt *gt); > - > +u64 xe_gt_clock_interval_to_ns(const struct xe_gt *gt, u64 count); > #endif > -- > 2.25.1 > Ashutosh