From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6DAD6CD4842 for ; Mon, 11 May 2026 19:00:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DED010E87B; Mon, 11 May 2026 19:00:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="UKrrr6y5"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9F99010E87B for ; Mon, 11 May 2026 19:00:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778526017; x=1810062017; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=ppy2ro9w/VS6l5Wcv4dNMD9vfmior2eoHMxr93hgxss=; b=UKrrr6y5xMPAU2X0+riCVXj+02uX0XpXDDb1MZDsYiWPbDk4/lGVZpsL Ej52pmeEKsNRvQizr2X0oTsvI62/ErxKubzi8cWI4MnKYzYUJJAOiOqZ6 s/IdNoJ+chqnJtTRkxmh5YxZGQ7gc7h3h8BDu9hWDh3BMFfjZ5vcdjHbt eEXDjxbi+tOl7V9z1mYo3slKD5w5XDt+yLK4C0YMRIjMIFTohtqq7l8fz mwB9MkD1Ydl4SWqPpn4yFpy3PKiUjABDksP6L9WTdBbxiqf65r0M1mdk3 JfTnUIioxY/g1i9Mqq68f5kCpsjHdTxGGSwCxXe1BfJTO/H7nBxsR2HD7 Q==; X-CSE-ConnectionGUID: eMuU0ipASHW6Yxv/M5nG+g== X-CSE-MsgGUID: dAZI2OQhQ/KiJlZdomwaxQ== X-IronPort-AV: E=McAfee;i="6800,10657,11783"; a="83273291" X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="83273291" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 12:00:17 -0700 X-CSE-ConnectionGUID: pwdUZ8ORSVyWAqHm7p2J2w== X-CSE-MsgGUID: 4z8wRtQeTfiyFVxLKnq3iA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="275670656" Received: from bwrockwe-mobl.amr.corp.intel.com (HELO adixit-MOBL3.intel.com) ([10.125.70.219]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 12:00:17 -0700 Date: Mon, 11 May 2026 12:00:16 -0700 Message-ID: <87se7xydof.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa Cc: Subject: Re: [PATCH 3/4] drm/xe/oa: Add val arg to xe_oa_is_valid_config_reg In-Reply-To: References: <20260430161459.2892545-1-ashutosh.dixit@intel.com> <20260430161459.2892545-4-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, 11 May 2026 11:31:44 -0700, Umesh Nerlige Ramappa wrote: > > On Thu, Apr 30, 2026 at 09:14:58AM -0700, Ashutosh Dixit wrote: > > Add val arg to xe_oa_is_valid_config_reg so that register values can also > > be verified, in addition to register address. Value verification is needed > > to implement MERTOA Wa_14026779378. > > > > Signed-off-by: Ashutosh Dixit > > --- > > drivers/gpu/drm/xe/xe_oa.c | 18 +++++++++--------- > > 1 file changed, 9 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > index 13458050907ad..7e1e8a86d19c0 100644 > > --- a/drivers/gpu/drm/xe/xe_oa.c > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > @@ -2249,7 +2249,7 @@ static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr) > > return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs); > > } > > > > -static bool xe_oa_is_valid_config_reg_addr(struct xe_oa *oa, u32 addr) > > +static bool xe_oa_is_valid_config_reg(struct xe_oa *oa, u32 addr, u32 val) > > { > > return xe_oa_is_valid_flex_addr(oa, addr) || > > xe_oa_is_valid_b_counter_addr(oa, addr) || > > But val is not being used here. Maybe we can drop it and revive it when we > actually know what to compare the val against? Hi Umesh, It is used in the next patch, as mentioned in the commit message. This patch is just to separate out the refactor from the actual wa (which is implemented in the next patch). Thanks. > > @@ -2257,7 +2257,7 @@ static bool xe_oa_is_valid_config_reg_addr(struct xe_oa *oa, u32 addr) > > } > > > > static struct xe_oa_reg * > > -xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr), > > +xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr, u32 val), > > u32 __user *regs, u32 n_regs) > > { > > struct xe_oa_reg *oa_regs; > > @@ -2275,16 +2275,16 @@ xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr), > > if (err) > > goto addr_err; > > > > - if (!is_valid(oa, addr)) { > > - drm_dbg(&oa->xe->drm, "Invalid oa_reg address: %X\n", addr); > > - err = -EINVAL; > > - goto addr_err; > > - } > > - > > err = get_user(value, regs + 1); > > if (err) > > goto addr_err; > > > > + if (!is_valid(oa, addr, value)) { > > + drm_dbg(&oa->xe->drm, "Invalid oa_reg addr/value: %#x %#x\n", addr, value); > > + err = -EINVAL; > > + goto addr_err; > > + } > > + > > oa_regs[i].addr = XE_REG(addr); > > oa_regs[i].value = value; > > > > @@ -2383,7 +2383,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, u64 data, struct drm_file *fi > > memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid)); > > > > oa_config->regs_len = arg->n_regs; > > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_config_reg_addr, > > + regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_config_reg, > > u64_to_user_ptr(arg->regs_ptr), > > arg->n_regs); > > if (IS_ERR(regs)) { > > -- > > 2.54.0 > >