From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC819C4332F for ; Mon, 13 Nov 2023 21:15:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 721A510E009; Mon, 13 Nov 2023 21:15:52 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id A3FE210E009 for ; Mon, 13 Nov 2023 21:15:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1699910150; x=1731446150; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=pKE9rY8YHojNb0CXrGKWkCtfDjGTIt7eXo1Z3+vTdhk=; b=hYJVWa0P/B6BKy0WNAa3lqSj3Ss8E56EZM9vNgZbnH+4hc76CbgmmaSv CTLRarj5JEsEl/7CtnNBIKQfH9gxYJHvfO5ZiHWyRr5J9napIJo6YHbIu +8tytDNzLDwlAMXgF4MiNC9qudzuP+StUMNqQJt/AJjYHgIOr4MpG5xgR BjS06gXDUOw21iJqtBYpktYSQhpauhojmPeqsu/bmEd16r5U+lB7sPpUC x5fzf+1YMYc7HhGf/ziVjbrHTI9aTGOfg0ou0adCX3CrApPlC8skz0jpo 4fN/AB9o8aMKXIoNimJ6QtHCP3W+yfqFrLlWgZgzCbKO1LbzcTPaM6T0X Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10893"; a="370709145" X-IronPort-AV: E=Sophos;i="6.03,299,1694761200"; d="scan'208";a="370709145" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2023 13:15:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10893"; a="714333222" X-IronPort-AV: E=Sophos;i="6.03,299,1694761200"; d="scan'208";a="714333222" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.201.134]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2023 13:15:48 -0800 Date: Mon, 13 Nov 2023 13:15:47 -0800 Message-ID: <87v8a5fj7g.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: intel-xe@lists.freedesktop.org In-Reply-To: <877cmqhbg2.wl-ashutosh.dixit@intel.com> References: <20231109170754.3836109-1-ashutosh.dixit@intel.com> <877cmqhbg2.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-xe] [PATCH] drm/xe/rtp: Fix displayed whitelisted register range X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matt Roper , Lucas De Marchi Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, 09 Nov 2023 13:19:09 -0800, Dixit, Ashutosh wrote: > > On Thu, 09 Nov 2023 09:07:54 -0800, Ashutosh Dixit wrote: > > > > Fix displayed whitelisted register range. For example, with: > > > > XE_RTP_ACTIONS(WHITELIST(0xdafc, RING_FORCE_TO_NONPRIV_RANGE_4)) > > > > Before we would show: > > xe REG[0xdaf0-0xdaff]: allow read access > > > > With this patch we show: > > xe REG[0xdafc-0xdb0b]: allow read access > > Please ignore this patch for now. I am still looking into this. Please ignore this patch. The previous code is correct according to Bspec 45925 / Bspec 60340. The confusion was there because there seems to be some change in register whitelisting in Xe2. Prior to Xe2 it appears the alignment mentioned in bits 1:0 (of the above Bspec links) was not enforced. E.g. the statement: XE_RTP_ACTIONS(WHITELIST(0xdafc, RING_FORCE_TO_NONPRIV_RANGE_4)) whitelisted registers 0xdafc, 0xdb00, 0xdb04, 0xdb08 with a single nonpriv slot. This seems to have changed in Xe2, where the above statement whitelists registers 0xdaf0, 0xdaf4, 0xdaf8, 0xdafc instead, following Bspec. Therefore in Xe2 we need two slots to whitelist these registers as follows: XE_RTP_ACTIONS(WHITELIST(0xdafc, RING_FORCE_TO_NONPRIV_RANGE_1)) XE_RTP_ACTIONS(WHITELIST(0xdb00, RING_FORCE_TO_NONPRIV_RANGE_4)) So the patch assumes the behavior which is present in generations prior to Xe2 (but has changed Xe2 onwards, at least as far as I can tell). In any case, please ignore this patch, let's keep the previous code which follows Bspec from Xe2 onwards. Thanks. -- Ashutosh