Re: [PATCH 3/4] drm/xe: Move engines' LRC programming RTP table off the stack

[Gustavo Sousa <gustavo.sousa@intel.com>]

Matt Roper <matthew.d.roper@intel.com> writes:

> On Tue, Jun 16, 2026 at 12:21:53PM -0700, Matt Roper wrote:
>> The 'lrc_setup' RTP table was allocated on the stack because it wasn't
>> truly constant and needed to calculate the proper value for BLIT_CCTL at
>> runtime based on other stack variables.  Using the FIELD_SET_FUNC action
>> allows us to make the table itself truly constant and move it off the
>> stack; the BLIT_CCTL value is now calculated during RTP table
>> processing.
>> 
>> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_hw_engine.c | 60 ++++++++++++++++++++-------------------
>>  1 file changed, 31 insertions(+), 29 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
>> index 98265293f2dc..0b688b851b71 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
>> @@ -337,39 +337,41 @@ static bool xe_rtp_cfeg_wmtp_disabled(const struct xe_device *xe,
>>  	return xe_mmio_read32(&hwe->gt->mmio, XEHP_FUSE4) & CFEG_WMTP_DISABLE;
>>  }
>>  
>> +static u32 blit_cctl_val(struct xe_gt *gt, struct xe_hw_engine *hwe)
>> +{
>> +	return REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, gt->mocs.uc_index) |
>> +		REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, gt->mocs.uc_index);
>> +}
>> +
>> +const struct xe_rtp_table_sr lrc_setup = XE_RTP_TABLE_SR(
>
> This (and the table in the next patch) should have been 'static.'  I

With the addition of the "static" keyword for lrc_setup,

    Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

> initially had VISIBLE_IF_KUNIT here, but decided to drop that
> until/unless we actually have kunit tests that operate on them.
>
>
> Matt
>
>> +	/*
>> +	 * Some blitter commands do not have a field for MOCS, those
>> +	 * commands will use MOCS index pointed by BLIT_CCTL.
>> +	 * BLIT_CCTL registers are needed to be programmed to un-cached.
>> +	 */
>> +	{ XE_RTP_NAME("BLIT_CCTL_default_MOCS"),
>> +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1274),
>> +		       ENGINE_CLASS(COPY)),
>> +	  XE_RTP_ACTIONS(FIELD_SET_FUNC(BLIT_CCTL(0),
>> +					BLIT_CCTL_DST_MOCS_MASK |
>> +					BLIT_CCTL_SRC_MOCS_MASK,
>> +					blit_cctl_val,
>> +					XE_RTP_ACTION_FLAG(ENGINE_BASE)))
>> +	},
>> +	/* Disable WMTP if HW doesn't support it */
>> +	{ XE_RTP_NAME("DISABLE_WMTP_ON_UNSUPPORTED_HW"),
>> +	  XE_RTP_RULES(FUNC(xe_rtp_cfeg_wmtp_disabled)),
>> +	  XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(0),
>> +				   PREEMPT_GPGPU_LEVEL_MASK,
>> +				   PREEMPT_GPGPU_THREAD_GROUP_LEVEL)),
>> +	  XE_RTP_ENTRY_FLAG(FOREACH_ENGINE)
>> +	},
>> +);
>> +
>>  static void
>>  hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
>>  {
>> -	struct xe_gt *gt = hwe->gt;
>> -	const u8 mocs_write_idx = gt->mocs.uc_index;
>> -	const u8 mocs_read_idx = gt->mocs.uc_index;
>> -	u32 blit_cctl_val = REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, mocs_write_idx) |
>> -			    REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, mocs_read_idx);
>>  	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
>> -	const struct xe_rtp_table_sr lrc_setup = XE_RTP_TABLE_SR(
>> -		/*
>> -		 * Some blitter commands do not have a field for MOCS, those
>> -		 * commands will use MOCS index pointed by BLIT_CCTL.
>> -		 * BLIT_CCTL registers are needed to be programmed to un-cached.
>> -		 */
>> -		{ XE_RTP_NAME("BLIT_CCTL_default_MOCS"),
>> -		  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1274),
>> -			       ENGINE_CLASS(COPY)),
>> -		  XE_RTP_ACTIONS(FIELD_SET(BLIT_CCTL(0),
>> -				 BLIT_CCTL_DST_MOCS_MASK |
>> -				 BLIT_CCTL_SRC_MOCS_MASK,
>> -				 blit_cctl_val,
>> -				 XE_RTP_ACTION_FLAG(ENGINE_BASE)))
>> -		},
>> -		/* Disable WMTP if HW doesn't support it */
>> -		{ XE_RTP_NAME("DISABLE_WMTP_ON_UNSUPPORTED_HW"),
>> -		  XE_RTP_RULES(FUNC(xe_rtp_cfeg_wmtp_disabled)),
>> -		  XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(0),
>> -					   PREEMPT_GPGPU_LEVEL_MASK,
>> -					   PREEMPT_GPGPU_THREAD_GROUP_LEVEL)),
>> -		  XE_RTP_ENTRY_FLAG(FOREACH_ENGINE)
>> -		},
>> -	);
>>  
>>  	xe_rtp_process_to_sr(&ctx, &lrc_setup, &hwe->reg_lrc, true);
>>  }
>> 
>> -- 
>> 2.54.0
>> 
>
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation