From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CB56EE01F8 for ; Wed, 11 Sep 2024 00:40:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2783610E343; Wed, 11 Sep 2024 00:40:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="PEAvZ/GK"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D60410E343 for ; Wed, 11 Sep 2024 00:40:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726015206; x=1757551206; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=5jjg1sYvkAn6J1gTu5AT2btrJPgqosV0pGxoe++v6v0=; b=PEAvZ/GKFVJ4VHy/NCCrswViddx0sd8OvMU0oar99ZoHnf3hgG9NuBKy tmcAdMWqkeQT39B0vIRSp7C61tUuBb15timWiEvLT8ar5RGPUOPu/7OtF nZ1bwvqrRsQTT81v1bgz6wM3Skd9KJXyKdjgQgB4pwYaaDCUkoKsoqw5C FFpxWTreMk/CaeFIPYxXo3i1ldWJ5vY2+HfpKumY3c1+bSR3ANFWgMsJm l2iaAsUdGh+cbdRHula1VQ9GvxD0/Z/SPGiE4WXkV6071/XP73CSYSOu7 8/G52zu+bzyOfV+Fj9YLLAzUu7i3tsTIqA1Lw5kCWCNO4xjzdwzrCp3Ye g==; X-CSE-ConnectionGUID: KxGE3C6HQd+vSbbH0aVqrg== X-CSE-MsgGUID: uyxpKw43QCyNrQRrtwIBZg== X-IronPort-AV: E=McAfee;i="6700,10204,11191"; a="28682418" X-IronPort-AV: E=Sophos;i="6.10,218,1719903600"; d="scan'208";a="28682418" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2024 17:40:04 -0700 X-CSE-ConnectionGUID: B2HGgpGnQCm3o9vVSoLvrw== X-CSE-MsgGUID: 4Ir3Qb0BQVqJka/OdTJRpA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,218,1719903600"; d="scan'208";a="67708440" Received: from ayeshaha-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.125.96.188]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2024 17:40:04 -0700 Date: Tue, 10 Sep 2024 17:40:02 -0700 Message-ID: <87wmjjyqe5.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Lucas De Marchi Cc: intel-xe@lists.freedesktop.org, Umesh Nerlige Ramappa , Jose Souza , Jonathan Cavitt Subject: Re: [PATCH] drm/xe/oa: Enable Xe2+ PES disaggregation In-Reply-To: References: <20240909165933.2638765-1-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, 10 Sep 2024 10:04:32 -0700, Lucas De Marchi wrote: > Hi Lucas, We had a whole email thread to figure this out :/ > On Mon, Sep 09, 2024 at 09:59:33AM GMT, Ashutosh Dixit wrote: > > Xe2+ PES disaggregation for OAG needs to be enabled to obtain disaggregated > > metrics when disaggregated data is needed. There is no uapi impact of this > > it looks like the *control* for disaggregated data is only available on > xe2 Correct, that is why the check below (also this is available only for OAG, not say for OAM): if (GRAPHICS_VER(stream->oa->xe) >= 20 && stream->hwe->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAG) > and we always use disaggregated, right? No we don't, please see below. > > > change. > > > > v2: Minor change to commit message > > > > Bspec: 61101 > > "Note: After enabling desired disaggregation mode/s using this control > field, PES MODE_SELECT field is used to configure appropriate > disaggregation mode of corresponding PEC." > > Apparently MODE_SELECT == Aggregated is the hw default for xe2. Don't > we need to program anything else? So the code in this patch only enables disaggregation, this additional step (PES_MODE_SELECT) is still needed to actually use disaggregation. However this second step is done via OA configurations which come in from userspace (using add_config observation stream op). So userspace can request either aggregated or disaggregated data depending on the OA config it programs. The goal of this patch is only to enable disaggregation so userspace can use it if they want, otherwise they can't, they can only use aggregated. That is why this is a "Fix", since this was missed out previously. > > Fixes: e936f885f1e9 ("drm/xe/oa/uapi: Expose OA stream fd") > > Signed-off-by: Ashutosh Dixit > > Cc: stable@vger.kernel.org > > If double checking above and this is sufficient, feel free to add my Thanks, done! Reviewed-by: Lucas De Marchi > > --- > > drivers/gpu/drm/xe/regs/xe_oa_regs.h | 1 + > > drivers/gpu/drm/xe/xe_oa.c | 4 ++++ > > 2 files changed, 5 insertions(+) > > > > diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h > > index 1189f5a540a82..a9b0091cb7ee1 100644 > > --- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h > > +++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h > > @@ -52,6 +52,7 @@ > > #define OAG_OABUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */ > > > > #define OAG_OACONTROL XE_REG(0xdaf4) > > +#define OAG_OACONTROL_OA_PES_DISAG_EN REG_GENMASK(27, 22) > > #define OAG_OACONTROL_OA_CCS_SELECT_MASK REG_GENMASK(18, 16) > > #define OAG_OACONTROL_OA_COUNTER_SEL_MASK REG_GENMASK(4, 2) > > #define OAG_OACONTROL_OA_COUNTER_ENABLE REG_BIT(0) > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c > > index 63286ed8457fa..0369cc016f6ab 100644 > > --- a/drivers/gpu/drm/xe/xe_oa.c > > +++ b/drivers/gpu/drm/xe/xe_oa.c > > @@ -440,6 +440,10 @@ static void xe_oa_enable(struct xe_oa_stream *stream) > > val = __format_to_oactrl(format, regs->oa_ctrl_counter_select_mask) | > > __oa_ccs_select(stream) | OAG_OACONTROL_OA_COUNTER_ENABLE; > > > > + if (GRAPHICS_VER(stream->oa->xe) >= 20 && > > + stream->hwe->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAG) > > + val |= OAG_OACONTROL_OA_PES_DISAG_EN; > > + > > xe_mmio_write32(stream->gt, regs->oa_ctrl, val); > > } > > > > -- > > 2.41.0 > >