From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Govindapillai, Vinod" <vinod.govindapillai@intel.com>,
"Murthy, Arun R" <arun.r.murthy@intel.com>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCHv2] drm/i915/display: BMG supports UHBR13.5
Date: Wed, 28 Aug 2024 14:21:40 +0300 [thread overview]
Message-ID: <87y14gyjsr.fsf@intel.com> (raw)
In-Reply-To: <88c9b678401c4151881fb747b3414d312254dfc4.camel@intel.com>
On Wed, 28 Aug 2024, "Govindapillai, Vinod" <vinod.govindapillai@intel.com> wrote:
> Hi,
>
> Do we need this? There is this patch already https://patchwork.freedesktop.org/patch/592161/
mtl_rates doesn't have 1350000.
BR,
Jani.
>
> Looks like we are supposed to iterate source_rates using "intel_dp->num_source_rates"
>
> If you are keeping this, then may be we need a separate max_rate call for bmg for better clarity?
> Now there is a separate source_rates for bmg but a max_rate using mtl_max_rate()!
>
> BR
> Vinod
>
>
> On Tue, 2024-08-27 at 13:42 +0530, Arun R Murthy wrote:
>> UHBR20 is not supported by battlemage and the maximum link rate
>> supported is UHBR13.5
>>
>> v2: Replace IS_DGFX with IS_BATTLEMAGE (Jani)
>>
>> HSD: 16023263677
>> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++++++--
>> 1 file changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 789c2f78826d..99a365a945ae 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -528,6 +528,10 @@ static void
>> intel_dp_set_source_rates(struct intel_dp *intel_dp)
>> {
>> /* The values must be in increasing order */
>> + static const int bmg_rates[] = {
>> + 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
>> + 810000, 1000000, 1350000,
>> + };
>> static const int mtl_rates[] = {
>> 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
>> 810000, 1000000, 2000000,
>> @@ -558,8 +562,13 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
>> intel_dp->source_rates || intel_dp->num_source_rates);
>>
>> if (DISPLAY_VER(dev_priv) >= 14) {
>> - source_rates = mtl_rates;
>> - size = ARRAY_SIZE(mtl_rates);
>> + if (IS_BATTLEMAGE(dev_priv)) {
>> + source_rates = bmg_rates;
>> + size = ARRAY_SIZE(bmg_rates);
>> + } else {
>> + source_rates = mtl_rates;
>> + size = ARRAY_SIZE(mtl_rates);
>> + }
>> max_rate = mtl_max_source_rate(intel_dp);
>> } else if (DISPLAY_VER(dev_priv) >= 11) {
>> source_rates = icl_rates;
>
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-08-28 11:21 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 8:12 [PATCHv2] drm/i915/display: BMG supports UHBR13.5 Arun R Murthy
2024-08-27 8:29 ` ✓ CI.Patch_applied: success for drm/i915/display: BMG supports UHBR13.5 (rev2) Patchwork
2024-08-27 8:29 ` ✓ CI.checkpatch: " Patchwork
2024-08-27 8:30 ` ✓ CI.KUnit: " Patchwork
2024-08-27 8:42 ` ✓ CI.Build: " Patchwork
2024-08-27 8:44 ` ✓ CI.Hooks: " Patchwork
2024-08-27 8:45 ` ✗ CI.checksparse: warning " Patchwork
2024-08-27 9:04 ` ✓ CI.BAT: success " Patchwork
2024-08-27 12:54 ` [PATCHv2] drm/i915/display: BMG supports UHBR13.5 Kahola, Mika
2024-08-27 14:39 ` ✗ CI.FULL: failure for drm/i915/display: BMG supports UHBR13.5 (rev2) Patchwork
2024-08-28 10:02 ` [PATCHv2] drm/i915/display: BMG supports UHBR13.5 Govindapillai, Vinod
2024-08-28 11:21 ` Jani Nikula [this message]
2024-08-29 12:19 ` Jani Nikula
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