From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AF22CD6E79 for ; Tue, 9 Jun 2026 03:51:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F0F0F10E077; Tue, 9 Jun 2026 03:51:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="LTZj25GY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9FC6E10E077 for ; Tue, 9 Jun 2026 03:51:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780977117; x=1812513117; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=gX3EPmN0kyC13668DVazgAsrc89P2gqIB0FE7HWUKx4=; b=LTZj25GYj6WcoMnBPMOd004HCYvcVBBjKh0hW2WiWc/CoImnoPuYoW82 Y/r6Ylb/bSfrKHlsVUGTK4tD89CWpk9FVwk/3GyOZA6tVOQGPiOrp4zk1 MGKF05Y+Fxu68R0R1bBBrlovchajbPMxS7YoAoXHanMpIa0wbmrFwKgLw 0O5/6JHeWKDqMyTyVIoMA76f+ifsIzfXnJByJKqQG5+LiPuhY2ladPVwP 8hoFoufXlpNM9khnui5pPjlZid6x7Hp+KxRqwzmdmj54Eco1XYkj9N6T0 auNhX/AI+bQ+4hy8Oqr5tuDLCFjbOZwdIk97jUyRK4EWFWELQ+/7UnaDf Q==; X-CSE-ConnectionGUID: GuKMnyO+Sai0sOb3vspJAg== X-CSE-MsgGUID: LVEH5Uw8TWuZ4HsWTMMMcQ== X-IronPort-AV: E=McAfee;i="6800,10657,11811"; a="99147173" X-IronPort-AV: E=Sophos;i="6.24,195,1774335600"; d="scan'208";a="99147173" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2026 20:51:56 -0700 X-CSE-ConnectionGUID: judtWSyHTw2YUKtkoQS+FA== X-CSE-MsgGUID: vSm/DKhISlm7weF8xy4VBA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,195,1774335600"; d="scan'208";a="244602346" Received: from yujinche-mobl1.amr.corp.intel.com (HELO adixit-MOBL3.intel.com) ([10.125.133.82]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2026 20:51:56 -0700 Date: Mon, 08 Jun 2026 20:51:55 -0700 Message-ID: <87zf14qskk.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa Cc: Subject: Re: [PATCH 3/9] drm/xe/rtp: Keep track of non-OA nonpriv slots In-Reply-To: <8733z9mzpo.wl-ashutosh.dixit@intel.com> References: <20260518234716.1540123-1-ashutosh.dixit@intel.com> <20260518234716.1540123-4-ashutosh.dixit@intel.com> <877bomlzc7.wl-ashutosh.dixit@intel.com> <8733z9mzpo.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Fri, 29 May 2026 18:51:47 -0700, Dixit, Ashutosh wrote: > > On Fri, 29 May 2026 16:24:30 -0700, Umesh Nerlige Ramappa wrote: > > > > On Fri, May 29, 2026 at 01:45:12PM -0700, Dixit, Ashutosh wrote: > > > On Fri, 29 May 2026 11:30:34 -0700, Umesh Nerlige Ramappa wrote: > > >> > > >> On Mon, May 18, 2026 at 04:47:10PM -0700, Ashutosh Dixit wrote: > > >> > In order to dynamically whitelist/dewhitelist OA registers on OA stream > > >> > open/close, we need to keep track of nonpriv slots occupied by non-OA > > >> > register whitelists. > > >> > > >> Can we maintain the slot index within hwe, so that the caller does not need > > >> to keep track of it? I am assuming this will only be used in the probe > > >> path. For all other paths the *_sr registers are used directly which > > >> already have the registre<->slot association stored within them. > > >> > > >> i.e. > > >> > > >> hwe->slot; > > > > > > Hmm, when I first wrote the code, I had this in hwe: hwe->nonpriv_slots. > > > But later realized it is only needed in xe_reg_whitelist_process_engine(), > > > so moved it to the local variable nonpriv_slots there. > > > > > > Also, nonpriv_slots is actually number of slots occupied by non-OA > > > registers. So if it part of hwe, the question becomes more complicated: > > > what do we store there, number of slots excluding OA or including OA? Since > > > we only need number of slots excluding OA. > > > > I would just think of it as the next available nonpriv slot for the caller > > to use. It's just a state w.r.t the hwe. When you let the caller (even if > > internal to the KMD) manage it, it's prone to errors - not about this > > series or current code, but in general. > > OK, will do this in v2. Thanks. I have done it but note that, because OA registers are added to two lists (oa_sr and reg_sr), some involvement from the caller cannot be eliminated. Hopefully the arguments and return value from whitelist_apply_to_hwe() in v2 are sufficient to clarify this involvement of the caller. > > > > > > > Therefore, to avoid these complications, I decided that the best way was a > > > temporary local variable. > > > > > > What do you think we'd gain by maintaining it as part of hwe? If things > > > change later, we could add it, but for now the local variable seems > > > sufficient? > > > > > > > > Thanks. > > > -- > > > Ashutosh > > > > > >> > > > >> > Signed-off-by: Ashutosh Dixit > > >> > --- > > >> > drivers/gpu/drm/xe/xe_reg_whitelist.c | 8 ++++++-- > > >> > 1 file changed, 6 insertions(+), 2 deletions(-) > > >> > > > >> > diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c > > >> > index 6cc81f53fc601..1e788e2ee4014 100644 > > >> > --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c > > >> > +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c > > >> > @@ -159,7 +159,7 @@ static const struct xe_rtp_entry_sr oa_whitelist[] = { > > >> > }, > > >> > }; > > >> > > > >> > -static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) > > >> > +static int whitelist_apply_to_hwe(struct xe_hw_engine *hwe) > > >> > { > > >> > struct xe_reg_sr *sr = &hwe->reg_whitelist; > > >> > struct xe_reg_sr_entry *entry; > > >> > @@ -191,6 +191,8 @@ static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) > > >> > > > >> > slot++; > > >> > } > > >> > + > > >> > + return slot; > > >> > } > > >> > > > >> > /** > > >> > @@ -203,11 +205,13 @@ static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) > > >> > */ > > >> > void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe) > > >> > { > > >> > + int nonpriv_slots; > > >> > + > > >> > struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); > > >> > > > >> > xe_rtp_process_to_sr(&ctx, register_whitelist, ARRAY_SIZE(register_whitelist), > > >> > &hwe->reg_whitelist, false); > > >> > - whitelist_apply_to_hwe(hwe); > > >> > + nonpriv_slots = whitelist_apply_to_hwe(hwe); > > >> > > > >> > xe_rtp_process_to_sr(&ctx, oa_whitelist, ARRAY_SIZE(oa_whitelist), > > >> > &hwe->oa_whitelist, false); > > >> > -- > > >> > 2.54.0 > > >> >