From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9741CCD1BF for ; Tue, 28 Oct 2025 21:53:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7940F10E676; Tue, 28 Oct 2025 21:53:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="fbKjrVpS"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4AAD10E677 for ; Tue, 28 Oct 2025 21:53:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761688382; x=1793224382; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=tBplOnsDHJHOde1PRU4cJYheyRAH2Gd6Rib86vH8+nQ=; b=fbKjrVpSFDVgoZy0CaPQWAbJSGiSH16eTLgANqo+v/OgI1zeXsimWrPJ KAtIusJ8G4aU4vqgJ2zUImMGRdUPpyKYJMXXpFD4HBgDCK4yXw4FG2MRz rnzRLOIFr7BzLvjYiT3XyGkryUt3uliNMlLijRMXfE5PDi+fE6flUyHZa Nqv5hpGNGoT1wdLdFc08NBrO865IhKRrYTvD2qvmt6UjtkfLYgThkv0eu gLu85IQ6ApHUnaUroM99+SsS+I7CKe+sslxw3+34ZS8fOA+IF9VLlGufC 3i6cuy1BGd5raTHawSIYe+JhtlNVC8mrmFoZtsYeEmR4CBPQo+j3Jva1j Q==; X-CSE-ConnectionGUID: Os/mZ/frQ1mgtct2OMLDUQ== X-CSE-MsgGUID: o/4jV9/EQiycBYsByb1gGQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="75145380" X-IronPort-AV: E=Sophos;i="6.19,262,1754982000"; d="scan'208";a="75145380" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 14:53:02 -0700 X-CSE-ConnectionGUID: Pxl/vkrGRxiBZtjB8qC5pQ== X-CSE-MsgGUID: jVTPR1ajR3qPKEnWu735CA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,262,1754982000"; d="scan'208";a="184713898" Received: from unknown (HELO adixit-MOBL3.intel.com) ([10.241.243.227]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 14:53:02 -0700 Date: Tue, 28 Oct 2025 14:53:01 -0700 Message-ID: <87zf9an16q.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Lucas De Marchi Cc: intel-xe@lists.freedesktop.org, Lukasz Laguna Subject: Re: [PATCH 07/12] drm/xe: Add device flag to indicate standalone MERT In-Reply-To: <20251021-cri-v1-7-bf11e61d9f49@intel.com> References: <20251021-cri-v1-0-bf11e61d9f49@intel.com> <20251021-cri-v1-7-bf11e61d9f49@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, 21 Oct 2025 22:17:39 -0700, Lucas De Marchi wrote: > > From: Lukasz Laguna > > The MERT subsystem manages memory accesses between host and device. On > the Crescent Island platform, it requires direct management by the > driver. > > Introduce a device flag and corresponding helpers to identify platforms > with standalone MERT, enabling proper initialization and handling. Looks like all future dGfx products may or may not have this, so we need a has_mert flag, such as introduced here. So this LGTM: Reviewed-by: Ashutosh Dixit > > Signed-off-by: Lukasz Laguna > Signed-off-by: Lucas De Marchi > --- > drivers/gpu/drm/xe/xe_device.h | 5 +++++ > drivers/gpu/drm/xe/xe_device_types.h | 2 ++ > drivers/gpu/drm/xe/xe_pci.c | 2 ++ > drivers/gpu/drm/xe/xe_pci_types.h | 1 + > 4 files changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h > index 32cc6323b7f64..6604b89330d51 100644 > --- a/drivers/gpu/drm/xe/xe_device.h > +++ b/drivers/gpu/drm/xe/xe_device.h > @@ -172,6 +172,11 @@ static inline bool xe_device_has_lmtt(struct xe_device *xe) > return IS_DGFX(xe); > } > > +static inline bool xe_device_has_mert(struct xe_device *xe) > +{ > + return xe->info.has_mert; > +} > + > u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size); > > void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p); > diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h > index f1e3b16897d1b..fb401809fae5a 100644 > --- a/drivers/gpu/drm/xe/xe_device_types.h > +++ b/drivers/gpu/drm/xe/xe_device_types.h > @@ -305,6 +305,8 @@ struct xe_device { > * pcode mailbox commands. > */ > u8 has_mbx_power_limits:1; > + /** @info.has_mert: Device has standalone MERT */ > + u8 has_mert:1; > /** @info.has_pxp: Device has PXP support */ > u8 has_pxp:1; > /** @info.has_range_tlb_inval: Has range based TLB invalidations */ > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c > index 000bb30b97712..ef27d17d904b8 100644 > --- a/drivers/gpu/drm/xe/xe_pci.c > +++ b/drivers/gpu/drm/xe/xe_pci.c > @@ -403,6 +403,7 @@ static const struct xe_device_desc cri_desc = { > .has_display = false, > .has_flat_ccs = false, > .has_mbx_power_limits = true, > + .has_mert = true, > .has_sriov = true, > .max_gt_per_tile = 2, > .require_force_probe = true, > @@ -669,6 +670,7 @@ static int xe_info_init_early(struct xe_device *xe, > xe->info.has_heci_cscfi = desc->has_heci_cscfi; > xe->info.has_late_bind = desc->has_late_bind; > xe->info.has_llc = desc->has_llc; > + xe->info.has_mert = desc->has_mert; > xe->info.has_pxp = desc->has_pxp; > xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) && > desc->has_sriov; > diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h > index a4451bdc79fb3..3e3bcdd1d1cf1 100644 > --- a/drivers/gpu/drm/xe/xe_pci_types.h > +++ b/drivers/gpu/drm/xe/xe_pci_types.h > @@ -46,6 +46,7 @@ struct xe_device_desc { > u8 has_late_bind:1; > u8 has_llc:1; > u8 has_mbx_power_limits:1; > + u8 has_mert:1; > u8 has_pxp:1; > u8 has_sriov:1; > u8 needs_scratch:1; > > -- > 2.51.0 >