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From: Julia Filipchuk <julia.filipchuk@intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: Matthew Brost <matthew.brost@intel.com>
Subject: Re: [PATCH v7 1/1] drm/xe: Enable Wa_14025515070
Date: Tue, 3 Mar 2026 16:40:35 -0800	[thread overview]
Message-ID: <8ee6b7eb-4183-46c9-a4f4-7fbad37e9d2b@intel.com> (raw)
In-Reply-To: <07735a9f-cfbd-4aa0-bafb-b57cd126782d@intel.com>

On 3/3/2026 2:58 PM, Daniele Ceraolo Spurio wrote:
> 
> 
> On 2/24/2026 9:47 AM, Julia Filipchuk wrote:
>> Corrects a failure on context switch. On registration of context with
>> indirect ring state will correct state of targeted and idle command
>> streamers.
>>
>> This Wa requires GuC 70.53+ (uapi 1.26+).  If indirect_ring_state is
>> enabled and Wa is unavailable, notify and disable indirect_ring_state.
>>
>> Added additional XE_RTP_PASTE macros for expansion of longer rules.
>>
>> Signed-off-by: Julia Filipchuk <julia.filipchuk@intel.com>
>> ---
>>   drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 1 +
>>   drivers/gpu/drm/xe/xe_guc.c           | 8 ++++++++
>>   drivers/gpu/drm/xe/xe_guc_ads.c       | 3 +++
>>   drivers/gpu/drm/xe/xe_rtp_helpers.h   | 2 ++
>>   drivers/gpu/drm/xe/xe_wa_oob.rules    | 7 +++++++
>>   5 files changed, 21 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/
>> guc_klvs_abi.h
>> index e33bd622ab44..f0815500177b 100644
>> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
>> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
>> @@ -496,6 +496,7 @@ enum xe_guc_klv_ids {
>>       GUC_WA_KLV_WAKE_POWER_DOMAINS_FOR_OUTBOUND_MMIO                    =
>> 0x900a,
>>       GUC_WA_KLV_RESET_BB_STACK_PTR_ON_VF_SWITCH                    = 0x900b,
>>       GUC_WA_KLV_RESTORE_UNSAVED_MEDIA_CONTROL_REG                    = 0x900c,
>> +    GUC_WA_KLV_CLR_CS_INDIRECT_RING_STATE_IF_IDLE_AT_CTX_REG            =
>> 0x900e,
>>   };
>>     #endif
>> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>> index 54d2fc780127..0c14e321bd67 100644
>> --- a/drivers/gpu/drm/xe/xe_guc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc.c
>> @@ -777,6 +777,14 @@ int xe_guc_init(struct xe_guc *guc)
>>       if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 14, 0))
>>           xe->info.has_page_reclaim_hw_assist = false;
>>   +    /* Disable indirect_ring_state if missing GuC 70.53+ WA 14025515070. */
>> +    if (gt->info.has_indirect_ring_state
>> +        && XE_GT_WA(gt, 14025515070)
>> +        && GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 26, 0)) {
> 
> Nit for style: we usually break the lines after the && (checkpatch is also
> flagging this).
> with that fixed:
> 
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Daniele
Adjusted in v8. Thanks for the comment. Turns out I was not providing enough
arguments to checkpatch.pl for the correct results.

  reply	other threads:[~2026-03-04  0:40 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-24 17:47 [PATCH v7 0/1] drm/xe: Enable Wa_14025515070, Enable indirect ring state for XE2+ Julia Filipchuk
2026-02-24 17:47 ` [PATCH v7 1/1] drm/xe: Enable Wa_14025515070 Julia Filipchuk
2026-03-03 22:58   ` Daniele Ceraolo Spurio
2026-03-04  0:40     ` Julia Filipchuk [this message]
2026-02-24 18:26 ` ✗ CI.checkpatch: warning for drm/xe: Enable Wa_14025515070, Enable indirect ring state for XE2+ (rev7) Patchwork
2026-02-24 18:28 ` ✓ CI.KUnit: success " Patchwork
2026-02-24 19:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-25  3:20 ` ✓ Xe.CI.FULL: " Patchwork

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